1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Instruction Selector for the X86 target *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_GLOBALISEL_PREDICATE_BITSET
10const unsigned MAX_SUBTARGET_PREDICATES = 142;
11using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>;
12#endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
13
14#ifdef GET_GLOBALISEL_TEMPORARIES_DECL
15 mutable MatcherState State;
16 typedef ComplexRendererFns(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
17 typedef void(X86InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
18 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo;
19 static X86InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
20 static X86InstructionSelector::CustomRendererFn CustomRenderers[];
21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
22 bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
23 bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
24 const uint8_t *getMatchTable() const override;
25 bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override;
26 bool testSimplePredicate(unsigned PredicateID) const override;
27 bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override;
28#endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
29
30#ifdef GET_GLOBALISEL_TEMPORARIES_INIT
31, State(0),
32ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
33#endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
34
35#ifdef GET_GLOBALISEL_IMPL
36// LLT Objects.
37enum {
38 GILLT_s1,
39 GILLT_s8,
40 GILLT_s16,
41 GILLT_s32,
42 GILLT_s64,
43 GILLT_s80,
44 GILLT_s128,
45 GILLT_v2s1,
46 GILLT_v2s64,
47 GILLT_v4s1,
48 GILLT_v4s32,
49 GILLT_v4s64,
50 GILLT_v8s1,
51 GILLT_v8s16,
52 GILLT_v8s32,
53 GILLT_v8s64,
54 GILLT_v16s1,
55 GILLT_v16s8,
56 GILLT_v16s16,
57 GILLT_v16s32,
58 GILLT_v32s1,
59 GILLT_v32s8,
60 GILLT_v32s16,
61 GILLT_v64s1,
62 GILLT_v64s8,
63};
64const static size_t NumTypeObjects = 25;
65const static LLT TypeObjects[] = {
66 LLT::scalar(1),
67 LLT::scalar(8),
68 LLT::scalar(16),
69 LLT::scalar(32),
70 LLT::scalar(64),
71 LLT::scalar(80),
72 LLT::scalar(128),
73 LLT::vector(ElementCount::getFixed(2), 1),
74 LLT::vector(ElementCount::getFixed(2), 64),
75 LLT::vector(ElementCount::getFixed(4), 1),
76 LLT::vector(ElementCount::getFixed(4), 32),
77 LLT::vector(ElementCount::getFixed(4), 64),
78 LLT::vector(ElementCount::getFixed(8), 1),
79 LLT::vector(ElementCount::getFixed(8), 16),
80 LLT::vector(ElementCount::getFixed(8), 32),
81 LLT::vector(ElementCount::getFixed(8), 64),
82 LLT::vector(ElementCount::getFixed(16), 1),
83 LLT::vector(ElementCount::getFixed(16), 8),
84 LLT::vector(ElementCount::getFixed(16), 16),
85 LLT::vector(ElementCount::getFixed(16), 32),
86 LLT::vector(ElementCount::getFixed(32), 1),
87 LLT::vector(ElementCount::getFixed(32), 8),
88 LLT::vector(ElementCount::getFixed(32), 16),
89 LLT::vector(ElementCount::getFixed(64), 1),
90 LLT::vector(ElementCount::getFixed(64), 8),
91};
92
93// Bits for subtarget features that participate in instruction matching.
94enum SubtargetFeatureBits : uint8_t {
95 Feature_TruePredicateBit = 60,
96 Feature_HasEGPRBit = 5,
97 Feature_NoEGPRBit = 4,
98 Feature_HasNDDBit = 6,
99 Feature_NoNDDBit = 26,
100 Feature_HasCFBit = 29,
101 Feature_HasCMOVBit = 28,
102 Feature_NoCMOVBit = 128,
103 Feature_HasMMXBit = 104,
104 Feature_HasSSE1Bit = 46,
105 Feature_UseSSE1Bit = 53,
106 Feature_HasSSE2Bit = 45,
107 Feature_UseSSE2Bit = 54,
108 Feature_HasSSE3Bit = 37,
109 Feature_UseSSE3Bit = 63,
110 Feature_HasSSSE3Bit = 105,
111 Feature_UseSSSE3Bit = 64,
112 Feature_UseSSE41Bit = 61,
113 Feature_UseSSE42Bit = 67,
114 Feature_HasSSE4ABit = 77,
115 Feature_NoAVXBit = 73,
116 Feature_HasAVXBit = 55,
117 Feature_HasAVX2Bit = 49,
118 Feature_HasAVX1OnlyBit = 47,
119 Feature_HasEVEX512Bit = 135,
120 Feature_HasAVX512Bit = 90,
121 Feature_UseAVXBit = 51,
122 Feature_NoAVX512Bit = 42,
123 Feature_HasCDIBit = 94,
124 Feature_HasVPOPCNTDQBit = 98,
125 Feature_HasDQIBit = 92,
126 Feature_NoDQIBit = 65,
127 Feature_HasBWIBit = 93,
128 Feature_NoBWIBit = 62,
129 Feature_HasVLXBit = 91,
130 Feature_NoVLXBit = 41,
131 Feature_NoVLX_Or_NoBWIBit = 59,
132 Feature_HasVNNIBit = 100,
133 Feature_HasVP2INTERSECTBit = 102,
134 Feature_HasBF16Bit = 103,
135 Feature_HasFP16Bit = 96,
136 Feature_HasAVXVNNIINT16Bit = 89,
137 Feature_HasAVXVNNIINT8Bit = 84,
138 Feature_HasAVXVNNIBit = 78,
139 Feature_NoVLX_Or_NoVNNIBit = 79,
140 Feature_HasBITALGBit = 101,
141 Feature_HasPOPCNTBit = 66,
142 Feature_HasAESBit = 70,
143 Feature_HasVAESBit = 72,
144 Feature_NoVLX_Or_NoVAESBit = 71,
145 Feature_HasFXSRBit = 38,
146 Feature_HasX87Bit = 36,
147 Feature_HasXSAVEBit = 117,
148 Feature_HasXSAVEOPTBit = 118,
149 Feature_HasXSAVECBit = 119,
150 Feature_HasXSAVESBit = 120,
151 Feature_HasPCLMULBit = 74,
152 Feature_NoVLX_Or_NoVPCLMULQDQBit = 75,
153 Feature_HasVPCLMULQDQBit = 76,
154 Feature_HasGFNIBit = 81,
155 Feature_HasFMABit = 39,
156 Feature_HasFMA4Bit = 43,
157 Feature_NoFMA4Bit = 40,
158 Feature_HasXOPBit = 44,
159 Feature_HasTBMBit = 25,
160 Feature_NoTBMBit = 133,
161 Feature_HasLWPBit = 12,
162 Feature_HasMOVBEBit = 3,
163 Feature_NoNDD_Or_NoMOVBEBit = 2,
164 Feature_HasRDRANDBit = 7,
165 Feature_HasF16CBit = 80,
166 Feature_HasFSGSBaseBit = 121,
167 Feature_HasLZCNTBit = 9,
168 Feature_HasBMIBit = 10,
169 Feature_HasBMI2Bit = 11,
170 Feature_NoBMI2Bit = 132,
171 Feature_HasVBMIBit = 95,
172 Feature_HasVBMI2Bit = 99,
173 Feature_HasIFMABit = 97,
174 Feature_HasAVXIFMABit = 82,
175 Feature_NoVLX_Or_NoIFMABit = 83,
176 Feature_HasRTMBit = 107,
177 Feature_HasSHABit = 69,
178 Feature_HasSHA512Bit = 86,
179 Feature_HasSM3Bit = 87,
180 Feature_HasRDSEEDBit = 8,
181 Feature_HasSSEPrefetchBit = 56,
182 Feature_HasPREFETCHIBit = 20,
183 Feature_HasPrefetchWBit = 106,
184 Feature_HasMWAITXBit = 131,
185 Feature_HasCLDEMOTEBit = 24,
186 Feature_HasMOVDIRIBit = 14,
187 Feature_HasMOVDIR64BBit = 15,
188 Feature_HasPTWRITEBit = 124,
189 Feature_FPStackf32Bit = 34,
190 Feature_FPStackf64Bit = 35,
191 Feature_HasSM4Bit = 88,
192 Feature_HasCLFLUSHBit = 57,
193 Feature_HasCLFLUSHOPTBit = 22,
194 Feature_HasCLWBBit = 23,
195 Feature_HasWBNOINVDBit = 116,
196 Feature_HasRDPIDBit = 123,
197 Feature_HasWAITPKGBit = 13,
198 Feature_HasINVPCIDBit = 122,
199 Feature_HasCX8Bit = 129,
200 Feature_HasCX16Bit = 130,
201 Feature_HasENQCMDBit = 16,
202 Feature_HasAMXFP16Bit = 112,
203 Feature_HasCMPCCXADDBit = 21,
204 Feature_HasAVXNECONVERTBit = 85,
205 Feature_HasKLBit = 108,
206 Feature_HasRAOINTBit = 114,
207 Feature_HasSERIALIZEBit = 17,
208 Feature_HasTSXLDTRKBit = 18,
209 Feature_HasAMXTILEBit = 109,
210 Feature_HasAMXBF16Bit = 111,
211 Feature_HasAMXINT8Bit = 110,
212 Feature_HasAMXCOMPLEXBit = 113,
213 Feature_HasUINTRBit = 19,
214 Feature_HasUSERMSRBit = 115,
215 Feature_HasCRC32Bit = 68,
216 Feature_Not64BitModeBit = 0,
217 Feature_In64BitModeBit = 1,
218 Feature_IsLP64Bit = 126,
219 Feature_NotLP64Bit = 125,
220 Feature_NotWin64WithoutFPBit = 127,
221 Feature_IsPSBit = 137,
222 Feature_NotPSBit = 136,
223 Feature_KernelCodeBit = 138,
224 Feature_NearDataBit = 140,
225 Feature_IsNotPICBit = 139,
226 Feature_OptForSizeBit = 50,
227 Feature_OptForMinSizeBit = 48,
228 Feature_OptForSpeedBit = 134,
229 Feature_UseIncDecBit = 27,
230 Feature_NoSSE41_Or_OptForSizeBit = 52,
231 Feature_CallImmAddrBit = 141,
232 Feature_FavorMemIndirectCallBit = 30,
233 Feature_HasFastSHLDRotateBit = 33,
234 Feature_HasMFenceBit = 58,
235 Feature_UseIndirectThunkCallsBit = 32,
236 Feature_NotUseIndirectThunkCallsBit = 31,
237};
238
239PredicateBitset X86InstructionSelector::
240computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const {
241 PredicateBitset Features{};
242 if (true)
243 Features.set(Feature_TruePredicateBit);
244 if (Subtarget->hasEGPR())
245 Features.set(Feature_HasEGPRBit);
246 if (!Subtarget->hasEGPR())
247 Features.set(Feature_NoEGPRBit);
248 if (Subtarget->hasNDD())
249 Features.set(Feature_HasNDDBit);
250 if (!Subtarget->hasNDD())
251 Features.set(Feature_NoNDDBit);
252 if (Subtarget->hasCF())
253 Features.set(Feature_HasCFBit);
254 if (Subtarget->canUseCMOV())
255 Features.set(Feature_HasCMOVBit);
256 if (!Subtarget->canUseCMOV())
257 Features.set(Feature_NoCMOVBit);
258 if (Subtarget->hasMMX())
259 Features.set(Feature_HasMMXBit);
260 if (Subtarget->hasSSE1())
261 Features.set(Feature_HasSSE1Bit);
262 if (Subtarget->hasSSE1() && !Subtarget->hasAVX())
263 Features.set(Feature_UseSSE1Bit);
264 if (Subtarget->hasSSE2())
265 Features.set(Feature_HasSSE2Bit);
266 if (Subtarget->hasSSE2() && !Subtarget->hasAVX())
267 Features.set(Feature_UseSSE2Bit);
268 if (Subtarget->hasSSE3())
269 Features.set(Feature_HasSSE3Bit);
270 if (Subtarget->hasSSE3() && !Subtarget->hasAVX())
271 Features.set(Feature_UseSSE3Bit);
272 if (Subtarget->hasSSSE3())
273 Features.set(Feature_HasSSSE3Bit);
274 if (Subtarget->hasSSSE3() && !Subtarget->hasAVX())
275 Features.set(Feature_UseSSSE3Bit);
276 if (Subtarget->hasSSE41() && !Subtarget->hasAVX())
277 Features.set(Feature_UseSSE41Bit);
278 if (Subtarget->hasSSE42() && !Subtarget->hasAVX())
279 Features.set(Feature_UseSSE42Bit);
280 if (Subtarget->hasSSE4A())
281 Features.set(Feature_HasSSE4ABit);
282 if (!Subtarget->hasAVX())
283 Features.set(Feature_NoAVXBit);
284 if (Subtarget->hasAVX())
285 Features.set(Feature_HasAVXBit);
286 if (Subtarget->hasAVX2())
287 Features.set(Feature_HasAVX2Bit);
288 if (Subtarget->hasAVX() && !Subtarget->hasAVX2())
289 Features.set(Feature_HasAVX1OnlyBit);
290 if (Subtarget->hasEVEX512())
291 Features.set(Feature_HasEVEX512Bit);
292 if (Subtarget->hasAVX512())
293 Features.set(Feature_HasAVX512Bit);
294 if (Subtarget->hasAVX() && !Subtarget->hasAVX512())
295 Features.set(Feature_UseAVXBit);
296 if (!Subtarget->hasAVX512())
297 Features.set(Feature_NoAVX512Bit);
298 if (Subtarget->hasCDI())
299 Features.set(Feature_HasCDIBit);
300 if (Subtarget->hasVPOPCNTDQ())
301 Features.set(Feature_HasVPOPCNTDQBit);
302 if (Subtarget->hasDQI())
303 Features.set(Feature_HasDQIBit);
304 if (!Subtarget->hasDQI())
305 Features.set(Feature_NoDQIBit);
306 if (Subtarget->hasBWI())
307 Features.set(Feature_HasBWIBit);
308 if (!Subtarget->hasBWI())
309 Features.set(Feature_NoBWIBit);
310 if (Subtarget->hasVLX())
311 Features.set(Feature_HasVLXBit);
312 if (!Subtarget->hasVLX())
313 Features.set(Feature_NoVLXBit);
314 if (!Subtarget->hasVLX() || !Subtarget->hasBWI())
315 Features.set(Feature_NoVLX_Or_NoBWIBit);
316 if (Subtarget->hasVNNI())
317 Features.set(Feature_HasVNNIBit);
318 if (Subtarget->hasVP2INTERSECT())
319 Features.set(Feature_HasVP2INTERSECTBit);
320 if (Subtarget->hasBF16())
321 Features.set(Feature_HasBF16Bit);
322 if (Subtarget->hasFP16())
323 Features.set(Feature_HasFP16Bit);
324 if (Subtarget->hasAVXVNNIINT16())
325 Features.set(Feature_HasAVXVNNIINT16Bit);
326 if (Subtarget->hasAVXVNNIINT8())
327 Features.set(Feature_HasAVXVNNIINT8Bit);
328 if (Subtarget->hasAVXVNNI())
329 Features.set(Feature_HasAVXVNNIBit);
330 if (!Subtarget->hasVLX() || !Subtarget->hasVNNI())
331 Features.set(Feature_NoVLX_Or_NoVNNIBit);
332 if (Subtarget->hasBITALG())
333 Features.set(Feature_HasBITALGBit);
334 if (Subtarget->hasPOPCNT())
335 Features.set(Feature_HasPOPCNTBit);
336 if (Subtarget->hasAES())
337 Features.set(Feature_HasAESBit);
338 if (Subtarget->hasVAES())
339 Features.set(Feature_HasVAESBit);
340 if (!Subtarget->hasVLX() || !Subtarget->hasVAES())
341 Features.set(Feature_NoVLX_Or_NoVAESBit);
342 if (Subtarget->hasFXSR())
343 Features.set(Feature_HasFXSRBit);
344 if (Subtarget->hasX87())
345 Features.set(Feature_HasX87Bit);
346 if (Subtarget->hasXSAVE())
347 Features.set(Feature_HasXSAVEBit);
348 if (Subtarget->hasXSAVEOPT())
349 Features.set(Feature_HasXSAVEOPTBit);
350 if (Subtarget->hasXSAVEC())
351 Features.set(Feature_HasXSAVECBit);
352 if (Subtarget->hasXSAVES())
353 Features.set(Feature_HasXSAVESBit);
354 if (Subtarget->hasPCLMUL())
355 Features.set(Feature_HasPCLMULBit);
356 if (!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ())
357 Features.set(Feature_NoVLX_Or_NoVPCLMULQDQBit);
358 if (Subtarget->hasVPCLMULQDQ())
359 Features.set(Feature_HasVPCLMULQDQBit);
360 if (Subtarget->hasGFNI())
361 Features.set(Feature_HasGFNIBit);
362 if (Subtarget->hasFMA())
363 Features.set(Feature_HasFMABit);
364 if (Subtarget->hasFMA4())
365 Features.set(Feature_HasFMA4Bit);
366 if (!Subtarget->hasFMA4())
367 Features.set(Feature_NoFMA4Bit);
368 if (Subtarget->hasXOP())
369 Features.set(Feature_HasXOPBit);
370 if (Subtarget->hasTBM())
371 Features.set(Feature_HasTBMBit);
372 if (!Subtarget->hasTBM())
373 Features.set(Feature_NoTBMBit);
374 if (Subtarget->hasLWP())
375 Features.set(Feature_HasLWPBit);
376 if (Subtarget->hasMOVBE())
377 Features.set(Feature_HasMOVBEBit);
378 if (!Subtarget->hasNDD() || !Subtarget->hasMOVBE())
379 Features.set(Feature_NoNDD_Or_NoMOVBEBit);
380 if (Subtarget->hasRDRAND())
381 Features.set(Feature_HasRDRANDBit);
382 if (Subtarget->hasF16C())
383 Features.set(Feature_HasF16CBit);
384 if (Subtarget->hasFSGSBase())
385 Features.set(Feature_HasFSGSBaseBit);
386 if (Subtarget->hasLZCNT())
387 Features.set(Feature_HasLZCNTBit);
388 if (Subtarget->hasBMI())
389 Features.set(Feature_HasBMIBit);
390 if (Subtarget->hasBMI2())
391 Features.set(Feature_HasBMI2Bit);
392 if (!Subtarget->hasBMI2())
393 Features.set(Feature_NoBMI2Bit);
394 if (Subtarget->hasVBMI())
395 Features.set(Feature_HasVBMIBit);
396 if (Subtarget->hasVBMI2())
397 Features.set(Feature_HasVBMI2Bit);
398 if (Subtarget->hasIFMA())
399 Features.set(Feature_HasIFMABit);
400 if (Subtarget->hasAVXIFMA())
401 Features.set(Feature_HasAVXIFMABit);
402 if (!Subtarget->hasVLX() || !Subtarget->hasIFMA())
403 Features.set(Feature_NoVLX_Or_NoIFMABit);
404 if (Subtarget->hasRTM())
405 Features.set(Feature_HasRTMBit);
406 if (Subtarget->hasSHA())
407 Features.set(Feature_HasSHABit);
408 if (Subtarget->hasSHA512())
409 Features.set(Feature_HasSHA512Bit);
410 if (Subtarget->hasSM3())
411 Features.set(Feature_HasSM3Bit);
412 if (Subtarget->hasRDSEED())
413 Features.set(Feature_HasRDSEEDBit);
414 if (Subtarget->hasSSEPrefetch())
415 Features.set(Feature_HasSSEPrefetchBit);
416 if (Subtarget->hasPREFETCHI())
417 Features.set(Feature_HasPREFETCHIBit);
418 if (Subtarget->hasPrefetchW())
419 Features.set(Feature_HasPrefetchWBit);
420 if (Subtarget->hasMWAITX())
421 Features.set(Feature_HasMWAITXBit);
422 if (Subtarget->hasCLDEMOTE())
423 Features.set(Feature_HasCLDEMOTEBit);
424 if (Subtarget->hasMOVDIRI())
425 Features.set(Feature_HasMOVDIRIBit);
426 if (Subtarget->hasMOVDIR64B())
427 Features.set(Feature_HasMOVDIR64BBit);
428 if (Subtarget->hasPTWRITE())
429 Features.set(Feature_HasPTWRITEBit);
430 if (!Subtarget->hasSSE1())
431 Features.set(Feature_FPStackf32Bit);
432 if (!Subtarget->hasSSE2())
433 Features.set(Feature_FPStackf64Bit);
434 if (Subtarget->hasSM4())
435 Features.set(Feature_HasSM4Bit);
436 if (Subtarget->hasCLFLUSH())
437 Features.set(Feature_HasCLFLUSHBit);
438 if (Subtarget->hasCLFLUSHOPT())
439 Features.set(Feature_HasCLFLUSHOPTBit);
440 if (Subtarget->hasCLWB())
441 Features.set(Feature_HasCLWBBit);
442 if (Subtarget->hasWBNOINVD())
443 Features.set(Feature_HasWBNOINVDBit);
444 if (Subtarget->hasRDPID())
445 Features.set(Feature_HasRDPIDBit);
446 if (Subtarget->hasWAITPKG())
447 Features.set(Feature_HasWAITPKGBit);
448 if (Subtarget->hasINVPCID())
449 Features.set(Feature_HasINVPCIDBit);
450 if (Subtarget->hasCX8())
451 Features.set(Feature_HasCX8Bit);
452 if (Subtarget->hasCX16())
453 Features.set(Feature_HasCX16Bit);
454 if (Subtarget->hasENQCMD())
455 Features.set(Feature_HasENQCMDBit);
456 if (Subtarget->hasAMXFP16())
457 Features.set(Feature_HasAMXFP16Bit);
458 if (Subtarget->hasCMPCCXADD())
459 Features.set(Feature_HasCMPCCXADDBit);
460 if (Subtarget->hasAVXNECONVERT())
461 Features.set(Feature_HasAVXNECONVERTBit);
462 if (Subtarget->hasKL())
463 Features.set(Feature_HasKLBit);
464 if (Subtarget->hasRAOINT())
465 Features.set(Feature_HasRAOINTBit);
466 if (Subtarget->hasSERIALIZE())
467 Features.set(Feature_HasSERIALIZEBit);
468 if (Subtarget->hasTSXLDTRK())
469 Features.set(Feature_HasTSXLDTRKBit);
470 if (Subtarget->hasAMXTILE())
471 Features.set(Feature_HasAMXTILEBit);
472 if (Subtarget->hasAMXBF16())
473 Features.set(Feature_HasAMXBF16Bit);
474 if (Subtarget->hasAMXINT8())
475 Features.set(Feature_HasAMXINT8Bit);
476 if (Subtarget->hasAMXCOMPLEX())
477 Features.set(Feature_HasAMXCOMPLEXBit);
478 if (Subtarget->hasUINTR())
479 Features.set(Feature_HasUINTRBit);
480 if (Subtarget->hasUSERMSR())
481 Features.set(Feature_HasUSERMSRBit);
482 if (Subtarget->hasCRC32())
483 Features.set(Feature_HasCRC32Bit);
484 if (!Subtarget->is64Bit())
485 Features.set(Feature_Not64BitModeBit);
486 if (Subtarget->is64Bit())
487 Features.set(Feature_In64BitModeBit);
488 if (Subtarget->isTarget64BitLP64())
489 Features.set(Feature_IsLP64Bit);
490 if (!Subtarget->isTarget64BitLP64())
491 Features.set(Feature_NotLP64Bit);
492 if (Subtarget->isTargetPS())
493 Features.set(Feature_IsPSBit);
494 if (!Subtarget->isTargetPS())
495 Features.set(Feature_NotPSBit);
496 if (TM.getCodeModel() == CodeModel::Kernel)
497 Features.set(Feature_KernelCodeBit);
498 if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel)
499 Features.set(Feature_NearDataBit);
500 if (!TM.isPositionIndependent())
501 Features.set(Feature_IsNotPICBit);
502 if (Subtarget->isLegalToCallImmediateAddr())
503 Features.set(Feature_CallImmAddrBit);
504 if (!Subtarget->slowTwoMemOps())
505 Features.set(Feature_FavorMemIndirectCallBit);
506 if (Subtarget->hasFastSHLDRotate())
507 Features.set(Feature_HasFastSHLDRotateBit);
508 if (Subtarget->hasMFence())
509 Features.set(Feature_HasMFenceBit);
510 if (Subtarget->useIndirectThunkCalls())
511 Features.set(Feature_UseIndirectThunkCallsBit);
512 if (!Subtarget->useIndirectThunkCalls())
513 Features.set(Feature_NotUseIndirectThunkCallsBit);
514 return Features;
515}
516
517void X86InstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) {
518 AvailableFunctionFeatures = computeAvailableFunctionFeatures((const X86Subtarget *)&MF.getSubtarget(), &MF);
519}
520PredicateBitset X86InstructionSelector::
521computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const {
522 PredicateBitset Features{};
523 if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF))
524 Features.set(Feature_NotWin64WithoutFPBit);
525 if (shouldOptForSize(MF))
526 Features.set(Feature_OptForSizeBit);
527 if (MF->getFunction().hasMinSize())
528 Features.set(Feature_OptForMinSizeBit);
529 if (!shouldOptForSize(MF))
530 Features.set(Feature_OptForSpeedBit);
531 if (!Subtarget->slowIncDec() || shouldOptForSize(MF))
532 Features.set(Feature_UseIncDecBit);
533 if (shouldOptForSize(MF) || !Subtarget->hasSSE41())
534 Features.set(Feature_NoSSE41_Or_OptForSizeBit);
535 return Features;
536}
537
538// Feature bitsets.
539enum {
540 GIFBS_Invalid,
541 GIFBS_FPStackf32,
542 GIFBS_FPStackf64,
543 GIFBS_HasAVX,
544 GIFBS_HasAVX1Only,
545 GIFBS_HasAVX2,
546 GIFBS_HasAVX512,
547 GIFBS_HasAVXNECONVERT,
548 GIFBS_HasAVXVNNIINT16,
549 GIFBS_HasBITALG,
550 GIFBS_HasBWI,
551 GIFBS_HasCDI,
552 GIFBS_HasDQI,
553 GIFBS_HasFP16,
554 GIFBS_HasFastSHLDRotate,
555 GIFBS_HasKL,
556 GIFBS_HasLWP,
557 GIFBS_HasMFence,
558 GIFBS_HasMMX,
559 GIFBS_HasMOVBE,
560 GIFBS_HasMWAITX,
561 GIFBS_HasNDD,
562 GIFBS_HasPTWRITE,
563 GIFBS_HasRTM,
564 GIFBS_HasSERIALIZE,
565 GIFBS_HasSHA,
566 GIFBS_HasSHA512,
567 GIFBS_HasSM3,
568 GIFBS_HasSM4,
569 GIFBS_HasSSE1,
570 GIFBS_HasSSE2,
571 GIFBS_HasSSE3,
572 GIFBS_HasSSE4A,
573 GIFBS_HasTBM,
574 GIFBS_HasTSXLDTRK,
575 GIFBS_HasVLX,
576 GIFBS_HasVPOPCNTDQ,
577 GIFBS_HasWAITPKG,
578 GIFBS_HasWBNOINVD,
579 GIFBS_HasX87,
580 GIFBS_HasXOP,
581 GIFBS_In64BitMode,
582 GIFBS_IsPS,
583 GIFBS_NoDQI,
584 GIFBS_NoNDD,
585 GIFBS_NoNDD_Or_NoMOVBE,
586 GIFBS_Not64BitMode,
587 GIFBS_NotPS,
588 GIFBS_UseAVX,
589 GIFBS_UseSSE1,
590 GIFBS_UseSSE2,
591 GIFBS_UseSSE41,
592 GIFBS_UseSSSE3,
593 GIFBS_HasAES_HasAVX,
594 GIFBS_HasAES_NoAVX,
595 GIFBS_HasAMXBF16_In64BitMode,
596 GIFBS_HasAMXCOMPLEX_In64BitMode,
597 GIFBS_HasAMXFP16_In64BitMode,
598 GIFBS_HasAMXINT8_In64BitMode,
599 GIFBS_HasAMXTILE_In64BitMode,
600 GIFBS_HasAVX_In64BitMode,
601 GIFBS_HasAVX_NoBWI,
602 GIFBS_HasAVX_NoVLX,
603 GIFBS_HasAVX_NoVLX_Or_NoBWI,
604 GIFBS_HasAVX2_NoVLX,
605 GIFBS_HasAVX2_NoVLX_Or_NoBWI,
606 GIFBS_HasAVX512_HasVAES,
607 GIFBS_HasAVX512_HasVLX,
608 GIFBS_HasAVX512_HasVPCLMULQDQ,
609 GIFBS_HasAVX512_NoBWI,
610 GIFBS_HasAVX512_NoDQI,
611 GIFBS_HasBF16_HasVLX,
612 GIFBS_HasBITALG_HasVLX,
613 GIFBS_HasBMI_HasEGPR,
614 GIFBS_HasBMI_NoEGPR,
615 GIFBS_HasBMI2_HasEGPR,
616 GIFBS_HasBMI2_NoEGPR,
617 GIFBS_HasBWI_HasVLX,
618 GIFBS_HasCDI_HasVLX,
619 GIFBS_HasCRC32_NoEGPR,
620 GIFBS_HasDQI_HasVLX,
621 GIFBS_HasDQI_NoBWI,
622 GIFBS_HasFMA4_NoAVX512,
623 GIFBS_HasFMA4_NoVLX,
624 GIFBS_HasFP16_HasVLX,
625 GIFBS_HasFSGSBase_In64BitMode,
626 GIFBS_HasNDD_In64BitMode,
627 GIFBS_HasNDD_UseIncDec,
628 GIFBS_HasPCLMUL_NoAVX,
629 GIFBS_HasPTWRITE_In64BitMode,
630 GIFBS_HasRDPID_In64BitMode,
631 GIFBS_HasRDPID_Not64BitMode,
632 GIFBS_HasUINTR_In64BitMode,
633 GIFBS_HasUSERMSR_NoEGPR,
634 GIFBS_HasVAES_HasVLX,
635 GIFBS_HasVAES_NoVLX,
636 GIFBS_HasVLX_HasVPCLMULQDQ,
637 GIFBS_HasVLX_HasVPOPCNTDQ,
638 GIFBS_HasVPCLMULQDQ_NoVLX,
639 GIFBS_HasWAITPKG_In64BitMode,
640 GIFBS_HasWAITPKG_Not64BitMode,
641 GIFBS_In64BitMode_UseSSE2,
642 GIFBS_NoNDD_UseIncDec,
643 GIFBS_Not64BitMode_OptForSize,
644 GIFBS_NotWin64WithoutFP_OptForMinSize,
645 GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES,
646 GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ,
647 GIFBS_HasAVX512_HasEVEX512_NoVLX,
648 GIFBS_HasBITALG_HasEVEX512_NoVLX,
649 GIFBS_HasBWI_HasEVEX512_NoVLX,
650 GIFBS_HasCDI_HasEVEX512_NoVLX,
651 GIFBS_HasCRC32_HasEGPR_In64BitMode,
652 GIFBS_HasDQI_HasEVEX512_NoVLX,
653 GIFBS_HasDQI_HasVLX_NoBWI,
654 GIFBS_HasEGPR_HasUSERMSR_In64BitMode,
655 GIFBS_HasEVEX512_HasVPOPCNTDQ_NoVLX,
656 GIFBS_HasFMA_NoAVX512_NoFMA4,
657 GIFBS_HasFMA_NoFMA4_NoVLX,
658 GIFBS_HasMOVBE_HasNDD_In64BitMode,
659};
660constexpr static PredicateBitset FeatureBitsets[] {
661 {}, // GIFBS_Invalid
662 {Feature_FPStackf32Bit, },
663 {Feature_FPStackf64Bit, },
664 {Feature_HasAVXBit, },
665 {Feature_HasAVX1OnlyBit, },
666 {Feature_HasAVX2Bit, },
667 {Feature_HasAVX512Bit, },
668 {Feature_HasAVXNECONVERTBit, },
669 {Feature_HasAVXVNNIINT16Bit, },
670 {Feature_HasBITALGBit, },
671 {Feature_HasBWIBit, },
672 {Feature_HasCDIBit, },
673 {Feature_HasDQIBit, },
674 {Feature_HasFP16Bit, },
675 {Feature_HasFastSHLDRotateBit, },
676 {Feature_HasKLBit, },
677 {Feature_HasLWPBit, },
678 {Feature_HasMFenceBit, },
679 {Feature_HasMMXBit, },
680 {Feature_HasMOVBEBit, },
681 {Feature_HasMWAITXBit, },
682 {Feature_HasNDDBit, },
683 {Feature_HasPTWRITEBit, },
684 {Feature_HasRTMBit, },
685 {Feature_HasSERIALIZEBit, },
686 {Feature_HasSHABit, },
687 {Feature_HasSHA512Bit, },
688 {Feature_HasSM3Bit, },
689 {Feature_HasSM4Bit, },
690 {Feature_HasSSE1Bit, },
691 {Feature_HasSSE2Bit, },
692 {Feature_HasSSE3Bit, },
693 {Feature_HasSSE4ABit, },
694 {Feature_HasTBMBit, },
695 {Feature_HasTSXLDTRKBit, },
696 {Feature_HasVLXBit, },
697 {Feature_HasVPOPCNTDQBit, },
698 {Feature_HasWAITPKGBit, },
699 {Feature_HasWBNOINVDBit, },
700 {Feature_HasX87Bit, },
701 {Feature_HasXOPBit, },
702 {Feature_In64BitModeBit, },
703 {Feature_IsPSBit, },
704 {Feature_NoDQIBit, },
705 {Feature_NoNDDBit, },
706 {Feature_NoNDD_Or_NoMOVBEBit, },
707 {Feature_Not64BitModeBit, },
708 {Feature_NotPSBit, },
709 {Feature_UseAVXBit, },
710 {Feature_UseSSE1Bit, },
711 {Feature_UseSSE2Bit, },
712 {Feature_UseSSE41Bit, },
713 {Feature_UseSSSE3Bit, },
714 {Feature_HasAESBit, Feature_HasAVXBit, },
715 {Feature_HasAESBit, Feature_NoAVXBit, },
716 {Feature_HasAMXBF16Bit, Feature_In64BitModeBit, },
717 {Feature_HasAMXCOMPLEXBit, Feature_In64BitModeBit, },
718 {Feature_HasAMXFP16Bit, Feature_In64BitModeBit, },
719 {Feature_HasAMXINT8Bit, Feature_In64BitModeBit, },
720 {Feature_HasAMXTILEBit, Feature_In64BitModeBit, },
721 {Feature_HasAVXBit, Feature_In64BitModeBit, },
722 {Feature_HasAVXBit, Feature_NoBWIBit, },
723 {Feature_HasAVXBit, Feature_NoVLXBit, },
724 {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, },
725 {Feature_HasAVX2Bit, Feature_NoVLXBit, },
726 {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, },
727 {Feature_HasAVX512Bit, Feature_HasVAESBit, },
728 {Feature_HasAVX512Bit, Feature_HasVLXBit, },
729 {Feature_HasAVX512Bit, Feature_HasVPCLMULQDQBit, },
730 {Feature_HasAVX512Bit, Feature_NoBWIBit, },
731 {Feature_HasAVX512Bit, Feature_NoDQIBit, },
732 {Feature_HasBF16Bit, Feature_HasVLXBit, },
733 {Feature_HasBITALGBit, Feature_HasVLXBit, },
734 {Feature_HasBMIBit, Feature_HasEGPRBit, },
735 {Feature_HasBMIBit, Feature_NoEGPRBit, },
736 {Feature_HasBMI2Bit, Feature_HasEGPRBit, },
737 {Feature_HasBMI2Bit, Feature_NoEGPRBit, },
738 {Feature_HasBWIBit, Feature_HasVLXBit, },
739 {Feature_HasCDIBit, Feature_HasVLXBit, },
740 {Feature_HasCRC32Bit, Feature_NoEGPRBit, },
741 {Feature_HasDQIBit, Feature_HasVLXBit, },
742 {Feature_HasDQIBit, Feature_NoBWIBit, },
743 {Feature_HasFMA4Bit, Feature_NoAVX512Bit, },
744 {Feature_HasFMA4Bit, Feature_NoVLXBit, },
745 {Feature_HasFP16Bit, Feature_HasVLXBit, },
746 {Feature_HasFSGSBaseBit, Feature_In64BitModeBit, },
747 {Feature_HasNDDBit, Feature_In64BitModeBit, },
748 {Feature_HasNDDBit, Feature_UseIncDecBit, },
749 {Feature_HasPCLMULBit, Feature_NoAVXBit, },
750 {Feature_HasPTWRITEBit, Feature_In64BitModeBit, },
751 {Feature_HasRDPIDBit, Feature_In64BitModeBit, },
752 {Feature_HasRDPIDBit, Feature_Not64BitModeBit, },
753 {Feature_HasUINTRBit, Feature_In64BitModeBit, },
754 {Feature_HasUSERMSRBit, Feature_NoEGPRBit, },
755 {Feature_HasVAESBit, Feature_HasVLXBit, },
756 {Feature_HasVAESBit, Feature_NoVLXBit, },
757 {Feature_HasVLXBit, Feature_HasVPCLMULQDQBit, },
758 {Feature_HasVLXBit, Feature_HasVPOPCNTDQBit, },
759 {Feature_HasVPCLMULQDQBit, Feature_NoVLXBit, },
760 {Feature_HasWAITPKGBit, Feature_In64BitModeBit, },
761 {Feature_HasWAITPKGBit, Feature_Not64BitModeBit, },
762 {Feature_In64BitModeBit, Feature_UseSSE2Bit, },
763 {Feature_NoNDDBit, Feature_UseIncDecBit, },
764 {Feature_Not64BitModeBit, Feature_OptForSizeBit, },
765 {Feature_NotWin64WithoutFPBit, Feature_OptForMinSizeBit, },
766 {Feature_HasAESBit, Feature_HasAVXBit, Feature_NoVLX_Or_NoVAESBit, },
767 {Feature_HasAVXBit, Feature_HasPCLMULBit, Feature_NoVLX_Or_NoVPCLMULQDQBit, },
768 {Feature_HasAVX512Bit, Feature_HasEVEX512Bit, Feature_NoVLXBit, },
769 {Feature_HasBITALGBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, },
770 {Feature_HasBWIBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, },
771 {Feature_HasCDIBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, },
772 {Feature_HasCRC32Bit, Feature_HasEGPRBit, Feature_In64BitModeBit, },
773 {Feature_HasDQIBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, },
774 {Feature_HasDQIBit, Feature_HasVLXBit, Feature_NoBWIBit, },
775 {Feature_HasEGPRBit, Feature_HasUSERMSRBit, Feature_In64BitModeBit, },
776 {Feature_HasEVEX512Bit, Feature_HasVPOPCNTDQBit, Feature_NoVLXBit, },
777 {Feature_HasFMABit, Feature_NoAVX512Bit, Feature_NoFMA4Bit, },
778 {Feature_HasFMABit, Feature_NoFMA4Bit, Feature_NoVLXBit, },
779 {Feature_HasMOVBEBit, Feature_HasNDDBit, Feature_In64BitModeBit, },
780};
781
782// ComplexPattern predicates.
783enum {
784 GICP_Invalid,
785};
786// See constructor for table contents
787
788X86InstructionSelector::ComplexMatcherMemFn
789X86InstructionSelector::ComplexPredicateFns[] = {
790 nullptr, // GICP_Invalid
791};
792
793// PatFrag predicates.
794bool X86InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const {
795 const MachineFunction &MF = *MI.getParent()->getParent();
796 const MachineRegisterInfo &MRI = MF.getRegInfo();
797 const auto &Operands = State.RecordedOperands;
798 (void)Operands;
799 (void)MRI;
800 llvm_unreachable("Unknown predicate");
801 return false;
802}
803// PatFrag predicates.
804enum {
805 GICXXPred_I64_Predicate_AndMask64 = GICXXPred_Invalid + 1,
806 GICXXPred_I64_Predicate_BTCBTSMask64,
807 GICXXPred_I64_Predicate_BTRMask64,
808 GICXXPred_I64_Predicate_i16immSExt8,
809 GICXXPred_I64_Predicate_i32immSExt8,
810 GICXXPred_I64_Predicate_i64immSExt8,
811 GICXXPred_I64_Predicate_i64immSExt32,
812 GICXXPred_I64_Predicate_i64immZExt32,
813 GICXXPred_I64_Predicate_i64immZExt32SExt8,
814 GICXXPred_I64_Predicate_i64timmSExt32,
815 GICXXPred_I64_Predicate_immff00_ffff,
816};
817bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
818 switch (PredicateID) {
819 case GICXXPred_I64_Predicate_AndMask64: {
820
821 return isMask_64(Imm) && !isUInt<32>(Imm);
822
823 }
824 case GICXXPred_I64_Predicate_BTCBTSMask64: {
825
826 return !isInt<32>(Imm) && isPowerOf2_64(Imm);
827
828 }
829 case GICXXPred_I64_Predicate_BTRMask64: {
830
831 return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm);
832
833 }
834 case GICXXPred_I64_Predicate_i16immSExt8: {
835 return isInt<8>(Imm);
836 }
837 case GICXXPred_I64_Predicate_i32immSExt8: {
838 return isInt<8>(Imm);
839 }
840 case GICXXPred_I64_Predicate_i64immSExt8: {
841 return isInt<8>(Imm);
842 }
843 case GICXXPred_I64_Predicate_i64immSExt32: {
844 return isInt<32>(Imm);
845 }
846 case GICXXPred_I64_Predicate_i64immZExt32: {
847 return isUInt<32>(Imm);
848 }
849 case GICXXPred_I64_Predicate_i64immZExt32SExt8: {
850
851 return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm));
852
853 }
854 case GICXXPred_I64_Predicate_i64timmSExt32: {
855 return isInt<32>(Imm);
856 }
857 case GICXXPred_I64_Predicate_immff00_ffff: {
858
859 return Imm >= 0xff00 && Imm <= 0xffff;
860
861 }
862 }
863 llvm_unreachable("Unknown predicate");
864 return false;
865}
866// PatFrag predicates.
867enum {
868 GICXXPred_APFloat_Predicate_fpimm0 = GICXXPred_Invalid + 1,
869 GICXXPred_APFloat_Predicate_fpimm1,
870 GICXXPred_APFloat_Predicate_fpimmneg0,
871 GICXXPred_APFloat_Predicate_fpimmneg1,
872};
873bool X86InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
874 switch (PredicateID) {
875 case GICXXPred_APFloat_Predicate_fpimm0: {
876
877 return Imm.isExactlyValue(+0.0);
878
879 }
880 case GICXXPred_APFloat_Predicate_fpimm1: {
881
882 return Imm.isExactlyValue(+1.0);
883
884 }
885 case GICXXPred_APFloat_Predicate_fpimmneg0: {
886
887 return Imm.isExactlyValue(-0.0);
888
889 }
890 case GICXXPred_APFloat_Predicate_fpimmneg1: {
891
892 return Imm.isExactlyValue(-1.0);
893
894 }
895 }
896 llvm_unreachable("Unknown predicate");
897 return false;
898}
899// PatFrag predicates.
900bool X86InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
901 llvm_unreachable("Unknown predicate");
902 return false;
903}
904bool X86InstructionSelector::testSimplePredicate(unsigned) const {
905 llvm_unreachable("X86InstructionSelector does not support simple predicates!");
906 return false;
907}
908// Custom renderers.
909enum {
910 GICR_Invalid,
911};
912X86InstructionSelector::CustomRendererFn
913X86InstructionSelector::CustomRenderers[] = {
914 nullptr, // GICR_Invalid
915};
916
917bool X86InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
918 const PredicateBitset AvailableFeatures = getAvailableFeatures();
919 MachineIRBuilder B(I);
920 State.MIs.clear();
921 State.MIs.push_back(&I);
922
923 if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) {
924 return true;
925 }
926
927 return false;
928}
929
930bool X86InstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const {
931 llvm_unreachable("X86InstructionSelector does not support custom C++ actions!");
932}
933#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
934#define GIMT_Encode2(Val) uint8_t(Val), uint8_t((uint16_t)Val >> 8)
935#define GIMT_Encode4(Val) uint8_t(Val), uint8_t((uint32_t)Val >> 8), uint8_t((uint32_t)Val >> 16), uint8_t((uint32_t)Val >> 24)
936#define GIMT_Encode8(Val) uint8_t(Val), uint8_t((uint64_t)Val >> 8), uint8_t((uint64_t)Val >> 16), uint8_t((uint64_t)Val >> 24), uint8_t((uint64_t)Val >> 32), uint8_t((uint64_t)Val >> 40), uint8_t((uint64_t)Val >> 48), uint8_t((uint64_t)Val >> 56)
937#else
938#define GIMT_Encode2(Val) uint8_t((uint16_t)Val >> 8), uint8_t(Val)
939#define GIMT_Encode4(Val) uint8_t((uint32_t)Val >> 24), uint8_t((uint32_t)Val >> 16), uint8_t((uint32_t)Val >> 8), uint8_t(Val)
940#define GIMT_Encode8(Val) uint8_t((uint64_t)Val >> 56), uint8_t((uint64_t)Val >> 48), uint8_t((uint64_t)Val >> 40), uint8_t((uint64_t)Val >> 32), uint8_t((uint64_t)Val >> 24), uint8_t((uint64_t)Val >> 16), uint8_t((uint64_t)Val >> 8), uint8_t(Val)
941#endif
942const uint8_t *X86InstructionSelector::getMatchTable() const {
943 constexpr static uint8_t MatchTable0[] = {
944 GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(51), GIMT_Encode2(276), /*)*//*default:*//*Label 66*/ GIMT_Encode4(84904),
945 /*TargetOpcode::G_ADD*//*Label 0*/ GIMT_Encode4(910),
946 /*TargetOpcode::G_SUB*//*Label 1*/ GIMT_Encode4(3268),
947 /*TargetOpcode::G_MUL*//*Label 2*/ GIMT_Encode4(4860), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
948 /*TargetOpcode::G_AND*//*Label 3*/ GIMT_Encode4(6097),
949 /*TargetOpcode::G_OR*//*Label 4*/ GIMT_Encode4(11893),
950 /*TargetOpcode::G_XOR*//*Label 5*/ GIMT_Encode4(16261), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
951 /*TargetOpcode::G_CONCAT_VECTORS*//*Label 6*/ GIMT_Encode4(24600), GIMT_Encode4(0), GIMT_Encode4(0),
952 /*TargetOpcode::G_BITCAST*//*Label 7*/ GIMT_Encode4(24767), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
953 /*TargetOpcode::G_INTRINSIC_LRINT*//*Label 8*/ GIMT_Encode4(26506),
954 /*TargetOpcode::G_INTRINSIC_LLRINT*//*Label 9*/ GIMT_Encode4(27368), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
955 /*TargetOpcode::G_INTRINSIC*//*Label 10*/ GIMT_Encode4(27762),
956 /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 11*/ GIMT_Encode4(34032), GIMT_Encode4(0), GIMT_Encode4(0),
957 /*TargetOpcode::G_ANYEXT*//*Label 12*/ GIMT_Encode4(36792),
958 /*TargetOpcode::G_TRUNC*//*Label 13*/ GIMT_Encode4(37227),
959 /*TargetOpcode::G_CONSTANT*//*Label 14*/ GIMT_Encode4(38231),
960 /*TargetOpcode::G_FCONSTANT*//*Label 15*/ GIMT_Encode4(38841), GIMT_Encode4(0), GIMT_Encode4(0),
961 /*TargetOpcode::G_SEXT*//*Label 16*/ GIMT_Encode4(39294), GIMT_Encode4(0),
962 /*TargetOpcode::G_ZEXT*//*Label 17*/ GIMT_Encode4(40317),
963 /*TargetOpcode::G_SHL*//*Label 18*/ GIMT_Encode4(41235),
964 /*TargetOpcode::G_LSHR*//*Label 19*/ GIMT_Encode4(42423),
965 /*TargetOpcode::G_ASHR*//*Label 20*/ GIMT_Encode4(43403),
966 /*TargetOpcode::G_FSHL*//*Label 21*/ GIMT_Encode4(44383),
967 /*TargetOpcode::G_FSHR*//*Label 22*/ GIMT_Encode4(44759),
968 /*TargetOpcode::G_ROTR*//*Label 23*/ GIMT_Encode4(45135),
969 /*TargetOpcode::G_ROTL*//*Label 24*/ GIMT_Encode4(47141),
970 /*TargetOpcode::G_ICMP*//*Label 25*/ GIMT_Encode4(49149), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
971 /*TargetOpcode::G_SELECT*//*Label 26*/ GIMT_Encode4(50806), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
972 /*TargetOpcode::G_UMULH*//*Label 27*/ GIMT_Encode4(58706),
973 /*TargetOpcode::G_SMULH*//*Label 28*/ GIMT_Encode4(58953),
974 /*TargetOpcode::G_UADDSAT*//*Label 29*/ GIMT_Encode4(59200),
975 /*TargetOpcode::G_SADDSAT*//*Label 30*/ GIMT_Encode4(59650),
976 /*TargetOpcode::G_USUBSAT*//*Label 31*/ GIMT_Encode4(60100),
977 /*TargetOpcode::G_SSUBSAT*//*Label 32*/ GIMT_Encode4(60550), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
978 /*TargetOpcode::G_FADD*//*Label 33*/ GIMT_Encode4(61000),
979 /*TargetOpcode::G_FSUB*//*Label 34*/ GIMT_Encode4(62016),
980 /*TargetOpcode::G_FMUL*//*Label 35*/ GIMT_Encode4(63032),
981 /*TargetOpcode::G_FMA*//*Label 36*/ GIMT_Encode4(64048), GIMT_Encode4(0),
982 /*TargetOpcode::G_FDIV*//*Label 37*/ GIMT_Encode4(65176), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
983 /*TargetOpcode::G_FNEG*//*Label 38*/ GIMT_Encode4(66192),
984 /*TargetOpcode::G_FPEXT*//*Label 39*/ GIMT_Encode4(66315),
985 /*TargetOpcode::G_FPTRUNC*//*Label 40*/ GIMT_Encode4(66885),
986 /*TargetOpcode::G_FPTOSI*//*Label 41*/ GIMT_Encode4(67212),
987 /*TargetOpcode::G_FPTOUI*//*Label 42*/ GIMT_Encode4(67709),
988 /*TargetOpcode::G_SITOFP*//*Label 43*/ GIMT_Encode4(67911),
989 /*TargetOpcode::G_UITOFP*//*Label 44*/ GIMT_Encode4(69173),
990 /*TargetOpcode::G_FABS*//*Label 45*/ GIMT_Encode4(70023), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
991 /*TargetOpcode::G_SMIN*//*Label 46*/ GIMT_Encode4(70146),
992 /*TargetOpcode::G_SMAX*//*Label 47*/ GIMT_Encode4(71255),
993 /*TargetOpcode::G_UMIN*//*Label 48*/ GIMT_Encode4(72364),
994 /*TargetOpcode::G_UMAX*//*Label 49*/ GIMT_Encode4(73473),
995 /*TargetOpcode::G_ABS*//*Label 50*/ GIMT_Encode4(74582), GIMT_Encode4(0), GIMT_Encode4(0),
996 /*TargetOpcode::G_BR*//*Label 51*/ GIMT_Encode4(75455), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
997 /*TargetOpcode::G_CTTZ_ZERO_UNDEF*//*Label 52*/ GIMT_Encode4(75471),
998 /*TargetOpcode::G_CTLZ*//*Label 53*/ GIMT_Encode4(75585), GIMT_Encode4(0),
999 /*TargetOpcode::G_CTPOP*//*Label 54*/ GIMT_Encode4(76259),
1000 /*TargetOpcode::G_BSWAP*//*Label 55*/ GIMT_Encode4(77567), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1001 /*TargetOpcode::G_FSQRT*//*Label 56*/ GIMT_Encode4(77743), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1002 /*TargetOpcode::G_STRICT_FADD*//*Label 57*/ GIMT_Encode4(78695),
1003 /*TargetOpcode::G_STRICT_FSUB*//*Label 58*/ GIMT_Encode4(79711),
1004 /*TargetOpcode::G_STRICT_FMUL*//*Label 59*/ GIMT_Encode4(80727),
1005 /*TargetOpcode::G_STRICT_FDIV*//*Label 60*/ GIMT_Encode4(81743), GIMT_Encode4(0),
1006 /*TargetOpcode::G_STRICT_FMA*//*Label 61*/ GIMT_Encode4(82759),
1007 /*TargetOpcode::G_STRICT_FSQRT*//*Label 62*/ GIMT_Encode4(83887), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1008 /*TargetOpcode::G_TRAP*//*Label 63*/ GIMT_Encode4(84839),
1009 /*TargetOpcode::G_DEBUGTRAP*//*Label 64*/ GIMT_Encode4(84852),
1010 /*TargetOpcode::G_UBSANTRAP*//*Label 65*/ GIMT_Encode4(84888),
1011 // Label 0: @910
1012 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(25), /*)*//*default:*//*Label 83*/ GIMT_Encode4(3267),
1013 /*GILLT_s8*//*Label 67*/ GIMT_Encode4(1017),
1014 /*GILLT_s16*//*Label 68*/ GIMT_Encode4(1250),
1015 /*GILLT_s32*//*Label 69*/ GIMT_Encode4(1551),
1016 /*GILLT_s64*//*Label 70*/ GIMT_Encode4(1852), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1017 /*GILLT_v2s64*//*Label 71*/ GIMT_Encode4(2243), GIMT_Encode4(0),
1018 /*GILLT_v4s32*//*Label 72*/ GIMT_Encode4(2337),
1019 /*GILLT_v4s64*//*Label 73*/ GIMT_Encode4(2553), GIMT_Encode4(0),
1020 /*GILLT_v8s16*//*Label 74*/ GIMT_Encode4(2620),
1021 /*GILLT_v8s32*//*Label 75*/ GIMT_Encode4(2836),
1022 /*GILLT_v8s64*//*Label 76*/ GIMT_Encode4(2903), GIMT_Encode4(0),
1023 /*GILLT_v16s8*//*Label 77*/ GIMT_Encode4(2937),
1024 /*GILLT_v16s16*//*Label 78*/ GIMT_Encode4(3031),
1025 /*GILLT_v16s32*//*Label 79*/ GIMT_Encode4(3098), GIMT_Encode4(0),
1026 /*GILLT_v32s8*//*Label 80*/ GIMT_Encode4(3132),
1027 /*GILLT_v32s16*//*Label 81*/ GIMT_Encode4(3199), GIMT_Encode4(0),
1028 /*GILLT_v64s8*//*Label 82*/ GIMT_Encode4(3233),
1029 // Label 67: @1017
1030 GIM_Try, /*On fail goto*//*Label 84*/ GIMT_Encode4(1249),
1031 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
1032 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
1033 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
1034 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
1035 GIM_Try, /*On fail goto*//*Label 85*/ GIMT_Encode4(1060), // Rule ID 21273 //
1036 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1037 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1038 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src)
1039 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC8r),
1040 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1041 GIR_RootToRootCopy, /*OpIdx*/1, // src
1042 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1043 GIR_RootConstrainSelectedInstOperands,
1044 // GIR_Coverage, 21273,
1045 GIR_EraseRootFromParent_Done,
1046 // Label 85: @1060
1047 GIM_Try, /*On fail goto*//*Label 86*/ GIMT_Encode4(1084), // Rule ID 21277 //
1048 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1049 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1050 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src)
1051 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC8r),
1052 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1053 GIR_RootToRootCopy, /*OpIdx*/1, // src
1054 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1055 GIR_RootConstrainSelectedInstOperands,
1056 // GIR_Coverage, 21277,
1057 GIR_EraseRootFromParent_Done,
1058 // Label 86: @1084
1059 GIM_Try, /*On fail goto*//*Label 87*/ GIMT_Encode4(1108), // Rule ID 21363 //
1060 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1061 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1062 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src)
1063 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC8r_ND),
1064 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1065 GIR_RootToRootCopy, /*OpIdx*/1, // src
1066 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1067 GIR_RootConstrainSelectedInstOperands,
1068 // GIR_Coverage, 21363,
1069 GIR_EraseRootFromParent_Done,
1070 // Label 87: @1108
1071 GIM_Try, /*On fail goto*//*Label 88*/ GIMT_Encode4(1132), // Rule ID 21367 //
1072 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1073 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1074 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src)
1075 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC8r_ND),
1076 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1077 GIR_RootToRootCopy, /*OpIdx*/1, // src
1078 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1079 GIR_RootConstrainSelectedInstOperands,
1080 // GIR_Coverage, 21367,
1081 GIR_EraseRootFromParent_Done,
1082 // Label 88: @1132
1083 GIM_Try, /*On fail goto*//*Label 89*/ GIMT_Encode4(1165), // Rule ID 21211 //
1084 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1085 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1086 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1087 // MIs[1] Operand 1
1088 // No operand predicates
1089 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1090 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
1091 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8ri),
1092 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1093 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1094 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1095 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1096 GIR_RootConstrainSelectedInstOperands,
1097 // GIR_Coverage, 21211,
1098 GIR_EraseRootFromParent_Done,
1099 // Label 89: @1165
1100 GIM_Try, /*On fail goto*//*Label 90*/ GIMT_Encode4(1198), // Rule ID 21301 //
1101 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1102 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1103 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1104 // MIs[1] Operand 1
1105 // No operand predicates
1106 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1107 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
1108 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8ri_ND),
1109 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1110 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1111 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1112 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1113 GIR_RootConstrainSelectedInstOperands,
1114 // GIR_Coverage, 21301,
1115 GIR_EraseRootFromParent_Done,
1116 // Label 90: @1198
1117 GIM_Try, /*On fail goto*//*Label 91*/ GIMT_Encode4(1223), // Rule ID 21203 //
1118 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1119 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
1120 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
1121 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD8rr),
1122 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1123 GIR_RootConstrainSelectedInstOperands,
1124 // GIR_Coverage, 21203,
1125 GIR_Done,
1126 // Label 91: @1223
1127 GIM_Try, /*On fail goto*//*Label 92*/ GIMT_Encode4(1248), // Rule ID 21293 //
1128 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1129 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
1130 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
1131 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD8rr_ND),
1132 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1133 GIR_RootConstrainSelectedInstOperands,
1134 // GIR_Coverage, 21293,
1135 GIR_Done,
1136 // Label 92: @1248
1137 GIM_Reject,
1138 // Label 84: @1249
1139 GIM_Reject,
1140 // Label 68: @1250
1141 GIM_Try, /*On fail goto*//*Label 93*/ GIMT_Encode4(1550),
1142 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
1143 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
1144 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
1145 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
1146 GIM_Try, /*On fail goto*//*Label 94*/ GIMT_Encode4(1303), // Rule ID 21013 //
1147 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1148 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128),
1149 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] })
1150 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri),
1151 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1152 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1153 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128),
1154 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1155 GIR_RootConstrainSelectedInstOperands,
1156 // GIR_Coverage, 21013,
1157 GIR_EraseRootFromParent_Done,
1158 // Label 94: @1303
1159 GIM_Try, /*On fail goto*//*Label 95*/ GIMT_Encode4(1337), // Rule ID 21019 //
1160 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1161 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128),
1162 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] })
1163 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri_ND),
1164 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1165 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1166 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128),
1167 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1168 GIR_RootConstrainSelectedInstOperands,
1169 // GIR_Coverage, 21019,
1170 GIR_EraseRootFromParent_Done,
1171 // Label 95: @1337
1172 GIM_Try, /*On fail goto*//*Label 96*/ GIMT_Encode4(1361), // Rule ID 21274 //
1173 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1174 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1175 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
1176 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC16r),
1177 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1178 GIR_RootToRootCopy, /*OpIdx*/1, // src
1179 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1180 GIR_RootConstrainSelectedInstOperands,
1181 // GIR_Coverage, 21274,
1182 GIR_EraseRootFromParent_Done,
1183 // Label 96: @1361
1184 GIM_Try, /*On fail goto*//*Label 97*/ GIMT_Encode4(1385), // Rule ID 21278 //
1185 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1186 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1187 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
1188 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC16r),
1189 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1190 GIR_RootToRootCopy, /*OpIdx*/1, // src
1191 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1192 GIR_RootConstrainSelectedInstOperands,
1193 // GIR_Coverage, 21278,
1194 GIR_EraseRootFromParent_Done,
1195 // Label 97: @1385
1196 GIM_Try, /*On fail goto*//*Label 98*/ GIMT_Encode4(1409), // Rule ID 21364 //
1197 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1198 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1199 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
1200 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC16r_ND),
1201 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1202 GIR_RootToRootCopy, /*OpIdx*/1, // src
1203 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1204 GIR_RootConstrainSelectedInstOperands,
1205 // GIR_Coverage, 21364,
1206 GIR_EraseRootFromParent_Done,
1207 // Label 98: @1409
1208 GIM_Try, /*On fail goto*//*Label 99*/ GIMT_Encode4(1433), // Rule ID 21368 //
1209 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1210 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1211 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
1212 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC16r_ND),
1213 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1214 GIR_RootToRootCopy, /*OpIdx*/1, // src
1215 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1216 GIR_RootConstrainSelectedInstOperands,
1217 // GIR_Coverage, 21368,
1218 GIR_EraseRootFromParent_Done,
1219 // Label 99: @1433
1220 GIM_Try, /*On fail goto*//*Label 100*/ GIMT_Encode4(1466), // Rule ID 21212 //
1221 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1222 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1223 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1224 // MIs[1] Operand 1
1225 // No operand predicates
1226 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1227 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
1228 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16ri),
1229 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1230 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1231 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1232 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1233 GIR_RootConstrainSelectedInstOperands,
1234 // GIR_Coverage, 21212,
1235 GIR_EraseRootFromParent_Done,
1236 // Label 100: @1466
1237 GIM_Try, /*On fail goto*//*Label 101*/ GIMT_Encode4(1499), // Rule ID 21302 //
1238 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1239 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1240 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1241 // MIs[1] Operand 1
1242 // No operand predicates
1243 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1244 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
1245 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16ri_ND),
1246 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1247 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1248 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1249 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1250 GIR_RootConstrainSelectedInstOperands,
1251 // GIR_Coverage, 21302,
1252 GIR_EraseRootFromParent_Done,
1253 // Label 101: @1499
1254 GIM_Try, /*On fail goto*//*Label 102*/ GIMT_Encode4(1524), // Rule ID 21204 //
1255 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1256 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
1257 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
1258 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD16rr),
1259 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1260 GIR_RootConstrainSelectedInstOperands,
1261 // GIR_Coverage, 21204,
1262 GIR_Done,
1263 // Label 102: @1524
1264 GIM_Try, /*On fail goto*//*Label 103*/ GIMT_Encode4(1549), // Rule ID 21294 //
1265 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1266 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
1267 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
1268 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD16rr_ND),
1269 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1270 GIR_RootConstrainSelectedInstOperands,
1271 // GIR_Coverage, 21294,
1272 GIR_Done,
1273 // Label 103: @1549
1274 GIM_Reject,
1275 // Label 93: @1550
1276 GIM_Reject,
1277 // Label 69: @1551
1278 GIM_Try, /*On fail goto*//*Label 104*/ GIMT_Encode4(1851),
1279 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
1280 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
1281 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
1282 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
1283 GIM_Try, /*On fail goto*//*Label 105*/ GIMT_Encode4(1604), // Rule ID 21014 //
1284 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1285 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128),
1286 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] })
1287 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri),
1288 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1289 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1290 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128),
1291 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1292 GIR_RootConstrainSelectedInstOperands,
1293 // GIR_Coverage, 21014,
1294 GIR_EraseRootFromParent_Done,
1295 // Label 105: @1604
1296 GIM_Try, /*On fail goto*//*Label 106*/ GIMT_Encode4(1638), // Rule ID 21020 //
1297 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1298 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128),
1299 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] })
1300 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri_ND),
1301 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1302 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1303 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128),
1304 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1305 GIR_RootConstrainSelectedInstOperands,
1306 // GIR_Coverage, 21020,
1307 GIR_EraseRootFromParent_Done,
1308 // Label 106: @1638
1309 GIM_Try, /*On fail goto*//*Label 107*/ GIMT_Encode4(1662), // Rule ID 21275 //
1310 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1311 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1312 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
1313 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC32r),
1314 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1315 GIR_RootToRootCopy, /*OpIdx*/1, // src
1316 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1317 GIR_RootConstrainSelectedInstOperands,
1318 // GIR_Coverage, 21275,
1319 GIR_EraseRootFromParent_Done,
1320 // Label 107: @1662
1321 GIM_Try, /*On fail goto*//*Label 108*/ GIMT_Encode4(1686), // Rule ID 21279 //
1322 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1323 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1324 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
1325 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC32r),
1326 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1327 GIR_RootToRootCopy, /*OpIdx*/1, // src
1328 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1329 GIR_RootConstrainSelectedInstOperands,
1330 // GIR_Coverage, 21279,
1331 GIR_EraseRootFromParent_Done,
1332 // Label 108: @1686
1333 GIM_Try, /*On fail goto*//*Label 109*/ GIMT_Encode4(1710), // Rule ID 21365 //
1334 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1335 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1336 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
1337 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC32r_ND),
1338 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1339 GIR_RootToRootCopy, /*OpIdx*/1, // src
1340 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1341 GIR_RootConstrainSelectedInstOperands,
1342 // GIR_Coverage, 21365,
1343 GIR_EraseRootFromParent_Done,
1344 // Label 109: @1710
1345 GIM_Try, /*On fail goto*//*Label 110*/ GIMT_Encode4(1734), // Rule ID 21369 //
1346 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1347 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1348 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
1349 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC32r_ND),
1350 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1351 GIR_RootToRootCopy, /*OpIdx*/1, // src
1352 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1353 GIR_RootConstrainSelectedInstOperands,
1354 // GIR_Coverage, 21369,
1355 GIR_EraseRootFromParent_Done,
1356 // Label 110: @1734
1357 GIM_Try, /*On fail goto*//*Label 111*/ GIMT_Encode4(1767), // Rule ID 21213 //
1358 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1359 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1360 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1361 // MIs[1] Operand 1
1362 // No operand predicates
1363 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1364 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
1365 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32ri),
1366 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1367 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1368 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1369 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1370 GIR_RootConstrainSelectedInstOperands,
1371 // GIR_Coverage, 21213,
1372 GIR_EraseRootFromParent_Done,
1373 // Label 111: @1767
1374 GIM_Try, /*On fail goto*//*Label 112*/ GIMT_Encode4(1800), // Rule ID 21303 //
1375 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1376 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1377 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1378 // MIs[1] Operand 1
1379 // No operand predicates
1380 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1381 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
1382 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32ri_ND),
1383 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1384 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1385 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1386 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1387 GIR_RootConstrainSelectedInstOperands,
1388 // GIR_Coverage, 21303,
1389 GIR_EraseRootFromParent_Done,
1390 // Label 112: @1800
1391 GIM_Try, /*On fail goto*//*Label 113*/ GIMT_Encode4(1825), // Rule ID 21205 //
1392 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1393 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
1394 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
1395 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD32rr),
1396 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1397 GIR_RootConstrainSelectedInstOperands,
1398 // GIR_Coverage, 21205,
1399 GIR_Done,
1400 // Label 113: @1825
1401 GIM_Try, /*On fail goto*//*Label 114*/ GIMT_Encode4(1850), // Rule ID 21295 //
1402 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1403 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
1404 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
1405 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD32rr_ND),
1406 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1407 GIR_RootConstrainSelectedInstOperands,
1408 // GIR_Coverage, 21295,
1409 GIR_Done,
1410 // Label 114: @1850
1411 GIM_Reject,
1412 // Label 104: @1851
1413 GIM_Reject,
1414 // Label 70: @1852
1415 GIM_Try, /*On fail goto*//*Label 115*/ GIMT_Encode4(2242),
1416 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
1417 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
1418 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
1419 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
1420 GIM_Try, /*On fail goto*//*Label 116*/ GIMT_Encode4(1905), // Rule ID 21015 //
1421 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1422 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128),
1423 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] })
1424 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32),
1425 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1426 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1427 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128),
1428 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1429 GIR_RootConstrainSelectedInstOperands,
1430 // GIR_Coverage, 21015,
1431 GIR_EraseRootFromParent_Done,
1432 // Label 116: @1905
1433 GIM_Try, /*On fail goto*//*Label 117*/ GIMT_Encode4(1939), // Rule ID 21021 //
1434 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1435 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128),
1436 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] })
1437 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32_ND),
1438 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1439 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1440 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128),
1441 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1442 GIR_RootConstrainSelectedInstOperands,
1443 // GIR_Coverage, 21021,
1444 GIR_EraseRootFromParent_Done,
1445 // Label 117: @1939
1446 GIM_Try, /*On fail goto*//*Label 118*/ GIMT_Encode4(1980), // Rule ID 21031 //
1447 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1448 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(2147483648),
1449 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] })
1450 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32),
1451 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1452 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1453 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-2147483648),
1454 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1455 GIR_RootConstrainSelectedInstOperands,
1456 // GIR_Coverage, 21031,
1457 GIR_EraseRootFromParent_Done,
1458 // Label 118: @1980
1459 GIM_Try, /*On fail goto*//*Label 119*/ GIMT_Encode4(2021), // Rule ID 21033 //
1460 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1461 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(2147483648),
1462 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] })
1463 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32_ND),
1464 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1465 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1466 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-2147483648),
1467 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1468 GIR_RootConstrainSelectedInstOperands,
1469 // GIR_Coverage, 21033,
1470 GIR_EraseRootFromParent_Done,
1471 // Label 119: @2021
1472 GIM_Try, /*On fail goto*//*Label 120*/ GIMT_Encode4(2045), // Rule ID 21276 //
1473 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1474 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1475 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
1476 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC64r),
1477 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1478 GIR_RootToRootCopy, /*OpIdx*/1, // src
1479 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1480 GIR_RootConstrainSelectedInstOperands,
1481 // GIR_Coverage, 21276,
1482 GIR_EraseRootFromParent_Done,
1483 // Label 120: @2045
1484 GIM_Try, /*On fail goto*//*Label 121*/ GIMT_Encode4(2069), // Rule ID 21280 //
1485 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec),
1486 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1487 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
1488 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC64r),
1489 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1490 GIR_RootToRootCopy, /*OpIdx*/1, // src
1491 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1492 GIR_RootConstrainSelectedInstOperands,
1493 // GIR_Coverage, 21280,
1494 GIR_EraseRootFromParent_Done,
1495 // Label 121: @2069
1496 GIM_Try, /*On fail goto*//*Label 122*/ GIMT_Encode4(2093), // Rule ID 21366 //
1497 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1498 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1499 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
1500 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC64r_ND),
1501 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1502 GIR_RootToRootCopy, /*OpIdx*/1, // src
1503 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1504 GIR_RootConstrainSelectedInstOperands,
1505 // GIR_Coverage, 21366,
1506 GIR_EraseRootFromParent_Done,
1507 // Label 122: @2093
1508 GIM_Try, /*On fail goto*//*Label 123*/ GIMT_Encode4(2117), // Rule ID 21370 //
1509 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec),
1510 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
1511 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
1512 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC64r_ND),
1513 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1514 GIR_RootToRootCopy, /*OpIdx*/1, // src
1515 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1516 GIR_RootConstrainSelectedInstOperands,
1517 // GIR_Coverage, 21370,
1518 GIR_EraseRootFromParent_Done,
1519 // Label 123: @2117
1520 GIM_Try, /*On fail goto*//*Label 124*/ GIMT_Encode4(2154), // Rule ID 21214 //
1521 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1522 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1523 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1524 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
1525 // MIs[1] Operand 1
1526 // No operand predicates
1527 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1528 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (ADD64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
1529 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD64ri32),
1530 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1531 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1532 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1533 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1534 GIR_RootConstrainSelectedInstOperands,
1535 // GIR_Coverage, 21214,
1536 GIR_EraseRootFromParent_Done,
1537 // Label 124: @2154
1538 GIM_Try, /*On fail goto*//*Label 125*/ GIMT_Encode4(2191), // Rule ID 21304 //
1539 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1540 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1541 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
1542 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
1543 // MIs[1] Operand 1
1544 // No operand predicates
1545 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1546 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (ADD64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
1547 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD64ri32_ND),
1548 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1549 GIR_RootToRootCopy, /*OpIdx*/1, // src1
1550 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1551 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
1552 GIR_RootConstrainSelectedInstOperands,
1553 // GIR_Coverage, 21304,
1554 GIR_EraseRootFromParent_Done,
1555 // Label 125: @2191
1556 GIM_Try, /*On fail goto*//*Label 126*/ GIMT_Encode4(2216), // Rule ID 21206 //
1557 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
1558 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
1559 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
1560 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD64rr),
1561 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1562 GIR_RootConstrainSelectedInstOperands,
1563 // GIR_Coverage, 21206,
1564 GIR_Done,
1565 // Label 126: @2216
1566 GIM_Try, /*On fail goto*//*Label 127*/ GIMT_Encode4(2241), // Rule ID 21296 //
1567 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
1568 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
1569 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
1570 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD64rr_ND),
1571 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
1572 GIR_RootConstrainSelectedInstOperands,
1573 // GIR_Coverage, 21296,
1574 GIR_Done,
1575 // Label 127: @2241
1576 GIM_Reject,
1577 // Label 115: @2242
1578 GIM_Reject,
1579 // Label 71: @2243
1580 GIM_Try, /*On fail goto*//*Label 128*/ GIMT_Encode4(2336),
1581 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
1582 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
1583 GIM_Try, /*On fail goto*//*Label 129*/ GIMT_Encode4(2281), // Rule ID 2488 //
1584 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
1585 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1586 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1587 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1588 // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
1589 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQrr),
1590 GIR_RootConstrainSelectedInstOperands,
1591 // GIR_Coverage, 2488,
1592 GIR_Done,
1593 // Label 129: @2281
1594 GIM_Try, /*On fail goto*//*Label 130*/ GIMT_Encode4(2308), // Rule ID 2490 //
1595 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
1596 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1597 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1598 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1599 // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
1600 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDQrr),
1601 GIR_RootConstrainSelectedInstOperands,
1602 // GIR_Coverage, 2490,
1603 GIR_Done,
1604 // Label 130: @2308
1605 GIM_Try, /*On fail goto*//*Label 131*/ GIMT_Encode4(2335), // Rule ID 4603 //
1606 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
1607 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1608 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1609 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1610 // (add:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
1611 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQZ128rr),
1612 GIR_RootConstrainSelectedInstOperands,
1613 // GIR_Coverage, 4603,
1614 GIR_Done,
1615 // Label 131: @2335
1616 GIM_Reject,
1617 // Label 128: @2336
1618 GIM_Reject,
1619 // Label 72: @2337
1620 GIM_Try, /*On fail goto*//*Label 132*/ GIMT_Encode4(2552),
1621 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
1622 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
1623 GIM_Try, /*On fail goto*//*Label 133*/ GIMT_Encode4(2409), // Rule ID 16369 //
1624 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
1625 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1626 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1627 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL),
1628 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1629 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1630 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1631 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1632 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1633 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1634 // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2), VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
1635 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDDrr),
1636 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1637 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1638 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1639 GIR_RootToRootCopy, /*OpIdx*/2, // src3
1640 GIR_RootConstrainSelectedInstOperands,
1641 // GIR_Coverage, 16369,
1642 GIR_EraseRootFromParent_Done,
1643 // Label 133: @2409
1644 GIM_Try, /*On fail goto*//*Label 134*/ GIMT_Encode4(2470), // Rule ID 23610 //
1645 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
1646 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1647 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1648 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1649 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL),
1650 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1651 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1652 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1653 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1654 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1655 // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src3, (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
1656 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDDrr),
1657 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1658 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1659 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1660 GIR_RootToRootCopy, /*OpIdx*/1, // src3
1661 GIR_RootConstrainSelectedInstOperands,
1662 // GIR_Coverage, 23610,
1663 GIR_EraseRootFromParent_Done,
1664 // Label 134: @2470
1665 GIM_Try, /*On fail goto*//*Label 135*/ GIMT_Encode4(2497), // Rule ID 2482 //
1666 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
1667 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1668 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1669 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1670 // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
1671 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDrr),
1672 GIR_RootConstrainSelectedInstOperands,
1673 // GIR_Coverage, 2482,
1674 GIR_Done,
1675 // Label 135: @2497
1676 GIM_Try, /*On fail goto*//*Label 136*/ GIMT_Encode4(2524), // Rule ID 2484 //
1677 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
1678 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1679 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1680 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1681 // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
1682 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDDrr),
1683 GIR_RootConstrainSelectedInstOperands,
1684 // GIR_Coverage, 2484,
1685 GIR_Done,
1686 // Label 136: @2524
1687 GIM_Try, /*On fail goto*//*Label 137*/ GIMT_Encode4(2551), // Rule ID 4630 //
1688 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
1689 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1690 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1691 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1692 // (add:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
1693 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDZ128rr),
1694 GIR_RootConstrainSelectedInstOperands,
1695 // GIR_Coverage, 4630,
1696 GIR_Done,
1697 // Label 137: @2551
1698 GIM_Reject,
1699 // Label 132: @2552
1700 GIM_Reject,
1701 // Label 73: @2553
1702 GIM_Try, /*On fail goto*//*Label 138*/ GIMT_Encode4(2619),
1703 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
1704 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
1705 GIM_Try, /*On fail goto*//*Label 139*/ GIMT_Encode4(2591), // Rule ID 2492 //
1706 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
1707 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1708 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1709 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1710 // (add:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPADDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
1711 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQYrr),
1712 GIR_RootConstrainSelectedInstOperands,
1713 // GIR_Coverage, 2492,
1714 GIR_Done,
1715 // Label 139: @2591
1716 GIM_Try, /*On fail goto*//*Label 140*/ GIMT_Encode4(2618), // Rule ID 4594 //
1717 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
1718 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1719 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1720 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1721 // (add:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPADDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
1722 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQZ256rr),
1723 GIR_RootConstrainSelectedInstOperands,
1724 // GIR_Coverage, 4594,
1725 GIR_Done,
1726 // Label 140: @2618
1727 GIM_Reject,
1728 // Label 138: @2619
1729 GIM_Reject,
1730 // Label 74: @2620
1731 GIM_Try, /*On fail goto*//*Label 141*/ GIMT_Encode4(2835),
1732 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
1733 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
1734 GIM_Try, /*On fail goto*//*Label 142*/ GIMT_Encode4(2692), // Rule ID 16368 //
1735 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
1736 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1737 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1738 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL),
1739 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1740 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1741 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1742 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1743 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1744 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1745 // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2), VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
1746 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWWrr),
1747 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1748 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1749 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1750 GIR_RootToRootCopy, /*OpIdx*/2, // src3
1751 GIR_RootConstrainSelectedInstOperands,
1752 // GIR_Coverage, 16368,
1753 GIR_EraseRootFromParent_Done,
1754 // Label 142: @2692
1755 GIM_Try, /*On fail goto*//*Label 143*/ GIMT_Encode4(2753), // Rule ID 23609 //
1756 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
1757 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1758 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1759 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1760 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL),
1761 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1762 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1763 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1764 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1765 GIM_CheckIsSafeToFold, /*NumInsns*/1,
1766 // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src3, (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
1767 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWWrr),
1768 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1769 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1770 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1771 GIR_RootToRootCopy, /*OpIdx*/1, // src3
1772 GIR_RootConstrainSelectedInstOperands,
1773 // GIR_Coverage, 23609,
1774 GIR_EraseRootFromParent_Done,
1775 // Label 143: @2753
1776 GIM_Try, /*On fail goto*//*Label 144*/ GIMT_Encode4(2780), // Rule ID 2476 //
1777 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
1778 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1779 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1780 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1781 // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
1782 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWrr),
1783 GIR_RootConstrainSelectedInstOperands,
1784 // GIR_Coverage, 2476,
1785 GIR_Done,
1786 // Label 144: @2780
1787 GIM_Try, /*On fail goto*//*Label 145*/ GIMT_Encode4(2807), // Rule ID 2478 //
1788 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
1789 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1790 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1791 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1792 // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
1793 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDWrr),
1794 GIR_RootConstrainSelectedInstOperands,
1795 // GIR_Coverage, 2478,
1796 GIR_Done,
1797 // Label 145: @2807
1798 GIM_Try, /*On fail goto*//*Label 146*/ GIMT_Encode4(2834), // Rule ID 4651 //
1799 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
1800 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1801 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1802 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1803 // (add:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
1804 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWZ128rr),
1805 GIR_RootConstrainSelectedInstOperands,
1806 // GIR_Coverage, 4651,
1807 GIR_Done,
1808 // Label 146: @2834
1809 GIM_Reject,
1810 // Label 141: @2835
1811 GIM_Reject,
1812 // Label 75: @2836
1813 GIM_Try, /*On fail goto*//*Label 147*/ GIMT_Encode4(2902),
1814 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
1815 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
1816 GIM_Try, /*On fail goto*//*Label 148*/ GIMT_Encode4(2874), // Rule ID 2486 //
1817 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
1818 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1819 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1820 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1821 // (add:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPADDDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
1822 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDYrr),
1823 GIR_RootConstrainSelectedInstOperands,
1824 // GIR_Coverage, 2486,
1825 GIR_Done,
1826 // Label 148: @2874
1827 GIM_Try, /*On fail goto*//*Label 149*/ GIMT_Encode4(2901), // Rule ID 4621 //
1828 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
1829 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1830 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1831 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1832 // (add:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPADDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
1833 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDZ256rr),
1834 GIR_RootConstrainSelectedInstOperands,
1835 // GIR_Coverage, 4621,
1836 GIR_Done,
1837 // Label 149: @2901
1838 GIM_Reject,
1839 // Label 147: @2902
1840 GIM_Reject,
1841 // Label 76: @2903
1842 GIM_Try, /*On fail goto*//*Label 150*/ GIMT_Encode4(2936), // Rule ID 4585 //
1843 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
1844 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
1845 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
1846 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1847 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1848 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1849 // (add:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
1850 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQZrr),
1851 GIR_RootConstrainSelectedInstOperands,
1852 // GIR_Coverage, 4585,
1853 GIR_Done,
1854 // Label 150: @2936
1855 GIM_Reject,
1856 // Label 77: @2937
1857 GIM_Try, /*On fail goto*//*Label 151*/ GIMT_Encode4(3030),
1858 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
1859 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
1860 GIM_Try, /*On fail goto*//*Label 152*/ GIMT_Encode4(2975), // Rule ID 2470 //
1861 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
1862 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1863 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1864 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1865 // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
1866 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBrr),
1867 GIR_RootConstrainSelectedInstOperands,
1868 // GIR_Coverage, 2470,
1869 GIR_Done,
1870 // Label 152: @2975
1871 GIM_Try, /*On fail goto*//*Label 153*/ GIMT_Encode4(3002), // Rule ID 2472 //
1872 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
1873 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1874 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1875 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
1876 // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
1877 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDBrr),
1878 GIR_RootConstrainSelectedInstOperands,
1879 // GIR_Coverage, 2472,
1880 GIR_Done,
1881 // Label 153: @3002
1882 GIM_Try, /*On fail goto*//*Label 154*/ GIMT_Encode4(3029), // Rule ID 4669 //
1883 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
1884 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1885 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1886 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
1887 // (add:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
1888 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBZ128rr),
1889 GIR_RootConstrainSelectedInstOperands,
1890 // GIR_Coverage, 4669,
1891 GIR_Done,
1892 // Label 154: @3029
1893 GIM_Reject,
1894 // Label 151: @3030
1895 GIM_Reject,
1896 // Label 78: @3031
1897 GIM_Try, /*On fail goto*//*Label 155*/ GIMT_Encode4(3097),
1898 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
1899 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
1900 GIM_Try, /*On fail goto*//*Label 156*/ GIMT_Encode4(3069), // Rule ID 2480 //
1901 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
1902 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1903 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1904 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1905 // (add:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
1906 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWYrr),
1907 GIR_RootConstrainSelectedInstOperands,
1908 // GIR_Coverage, 2480,
1909 GIR_Done,
1910 // Label 156: @3069
1911 GIM_Try, /*On fail goto*//*Label 157*/ GIMT_Encode4(3096), // Rule ID 4645 //
1912 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
1913 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1914 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1915 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1916 // (add:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
1917 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWZ256rr),
1918 GIR_RootConstrainSelectedInstOperands,
1919 // GIR_Coverage, 4645,
1920 GIR_Done,
1921 // Label 157: @3096
1922 GIM_Reject,
1923 // Label 155: @3097
1924 GIM_Reject,
1925 // Label 79: @3098
1926 GIM_Try, /*On fail goto*//*Label 158*/ GIMT_Encode4(3131), // Rule ID 4612 //
1927 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
1928 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
1929 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
1930 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1931 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1932 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1933 // (add:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPADDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
1934 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDZrr),
1935 GIR_RootConstrainSelectedInstOperands,
1936 // GIR_Coverage, 4612,
1937 GIR_Done,
1938 // Label 158: @3131
1939 GIM_Reject,
1940 // Label 80: @3132
1941 GIM_Try, /*On fail goto*//*Label 159*/ GIMT_Encode4(3198),
1942 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
1943 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
1944 GIM_Try, /*On fail goto*//*Label 160*/ GIMT_Encode4(3170), // Rule ID 2474 //
1945 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
1946 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1947 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1948 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
1949 // (add:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
1950 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBYrr),
1951 GIR_RootConstrainSelectedInstOperands,
1952 // GIR_Coverage, 2474,
1953 GIR_Done,
1954 // Label 160: @3170
1955 GIM_Try, /*On fail goto*//*Label 161*/ GIMT_Encode4(3197), // Rule ID 4663 //
1956 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
1957 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1958 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1959 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
1960 // (add:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
1961 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBZ256rr),
1962 GIR_RootConstrainSelectedInstOperands,
1963 // GIR_Coverage, 4663,
1964 GIR_Done,
1965 // Label 161: @3197
1966 GIM_Reject,
1967 // Label 159: @3198
1968 GIM_Reject,
1969 // Label 81: @3199
1970 GIM_Try, /*On fail goto*//*Label 162*/ GIMT_Encode4(3232), // Rule ID 4639 //
1971 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
1972 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
1973 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
1974 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1975 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1976 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1977 // (add:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
1978 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWZrr),
1979 GIR_RootConstrainSelectedInstOperands,
1980 // GIR_Coverage, 4639,
1981 GIR_Done,
1982 // Label 162: @3232
1983 GIM_Reject,
1984 // Label 82: @3233
1985 GIM_Try, /*On fail goto*//*Label 163*/ GIMT_Encode4(3266), // Rule ID 4657 //
1986 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
1987 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
1988 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
1989 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1990 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1991 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
1992 // (add:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
1993 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBZrr),
1994 GIR_RootConstrainSelectedInstOperands,
1995 // GIR_Coverage, 4657,
1996 GIR_Done,
1997 // Label 163: @3266
1998 GIM_Reject,
1999 // Label 83: @3267
2000 GIM_Reject,
2001 // Label 1: @3268
2002 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(25), /*)*//*default:*//*Label 180*/ GIMT_Encode4(4859),
2003 /*GILLT_s8*//*Label 164*/ GIMT_Encode4(3375),
2004 /*GILLT_s16*//*Label 165*/ GIMT_Encode4(3549),
2005 /*GILLT_s32*//*Label 166*/ GIMT_Encode4(3723),
2006 /*GILLT_s64*//*Label 167*/ GIMT_Encode4(3897), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
2007 /*GILLT_v2s64*//*Label 168*/ GIMT_Encode4(4079), GIMT_Encode4(0),
2008 /*GILLT_v4s32*//*Label 169*/ GIMT_Encode4(4173),
2009 /*GILLT_v4s64*//*Label 170*/ GIMT_Encode4(4267), GIMT_Encode4(0),
2010 /*GILLT_v8s16*//*Label 171*/ GIMT_Encode4(4334),
2011 /*GILLT_v8s32*//*Label 172*/ GIMT_Encode4(4428),
2012 /*GILLT_v8s64*//*Label 173*/ GIMT_Encode4(4495), GIMT_Encode4(0),
2013 /*GILLT_v16s8*//*Label 174*/ GIMT_Encode4(4529),
2014 /*GILLT_v16s16*//*Label 175*/ GIMT_Encode4(4623),
2015 /*GILLT_v16s32*//*Label 176*/ GIMT_Encode4(4690), GIMT_Encode4(0),
2016 /*GILLT_v32s8*//*Label 177*/ GIMT_Encode4(4724),
2017 /*GILLT_v32s16*//*Label 178*/ GIMT_Encode4(4791), GIMT_Encode4(0),
2018 /*GILLT_v64s8*//*Label 179*/ GIMT_Encode4(4825),
2019 // Label 164: @3375
2020 GIM_Try, /*On fail goto*//*Label 181*/ GIMT_Encode4(3548),
2021 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
2022 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
2023 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2024 GIM_Try, /*On fail goto*//*Label 182*/ GIMT_Encode4(3415), // Rule ID 246 //
2025 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
2026 GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0,
2027 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2028 // (sub:{ *:[i8] } 0:{ *:[i8] }, GR8:{ *:[i8] }:$src1) => (NEG8r_NF_ND:{ *:[i8] } GR8:{ *:[i8] }:$src1)
2029 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG8r_NF_ND),
2030 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2031 GIR_RootToRootCopy, /*OpIdx*/2, // src1
2032 GIR_RootConstrainSelectedInstOperands,
2033 // GIR_Coverage, 246,
2034 GIR_EraseRootFromParent_Done,
2035 // Label 182: @3415
2036 GIM_Try, /*On fail goto*//*Label 183*/ GIMT_Encode4(3452), // Rule ID 21223 //
2037 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2038 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2039 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2040 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2041 // MIs[1] Operand 1
2042 // No operand predicates
2043 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2044 // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
2045 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB8ri),
2046 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2047 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2048 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2049 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2050 GIR_RootConstrainSelectedInstOperands,
2051 // GIR_Coverage, 21223,
2052 GIR_EraseRootFromParent_Done,
2053 // Label 183: @3452
2054 GIM_Try, /*On fail goto*//*Label 184*/ GIMT_Encode4(3489), // Rule ID 21313 //
2055 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2056 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2057 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2058 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2059 // MIs[1] Operand 1
2060 // No operand predicates
2061 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2062 // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
2063 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB8ri_ND),
2064 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2065 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2066 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2067 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2068 GIR_RootConstrainSelectedInstOperands,
2069 // GIR_Coverage, 21313,
2070 GIR_EraseRootFromParent_Done,
2071 // Label 184: @3489
2072 GIM_Try, /*On fail goto*//*Label 185*/ GIMT_Encode4(3518), // Rule ID 21215 //
2073 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2074 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2075 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2076 // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
2077 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB8rr),
2078 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2079 GIR_RootConstrainSelectedInstOperands,
2080 // GIR_Coverage, 21215,
2081 GIR_Done,
2082 // Label 185: @3518
2083 GIM_Try, /*On fail goto*//*Label 186*/ GIMT_Encode4(3547), // Rule ID 21305 //
2084 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2085 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2086 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
2087 // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
2088 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB8rr_ND),
2089 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2090 GIR_RootConstrainSelectedInstOperands,
2091 // GIR_Coverage, 21305,
2092 GIR_Done,
2093 // Label 186: @3547
2094 GIM_Reject,
2095 // Label 181: @3548
2096 GIM_Reject,
2097 // Label 165: @3549
2098 GIM_Try, /*On fail goto*//*Label 187*/ GIMT_Encode4(3722),
2099 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
2100 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
2101 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2102 GIM_Try, /*On fail goto*//*Label 188*/ GIMT_Encode4(3589), // Rule ID 247 //
2103 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
2104 GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0,
2105 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2106 // (sub:{ *:[i16] } 0:{ *:[i16] }, GR16:{ *:[i16] }:$src1) => (NEG16r_NF_ND:{ *:[i16] } GR16:{ *:[i16] }:$src1)
2107 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG16r_NF_ND),
2108 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2109 GIR_RootToRootCopy, /*OpIdx*/2, // src1
2110 GIR_RootConstrainSelectedInstOperands,
2111 // GIR_Coverage, 247,
2112 GIR_EraseRootFromParent_Done,
2113 // Label 188: @3589
2114 GIM_Try, /*On fail goto*//*Label 189*/ GIMT_Encode4(3626), // Rule ID 21224 //
2115 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2116 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2117 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2118 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2119 // MIs[1] Operand 1
2120 // No operand predicates
2121 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2122 // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
2123 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri),
2124 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2125 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2126 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2127 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2128 GIR_RootConstrainSelectedInstOperands,
2129 // GIR_Coverage, 21224,
2130 GIR_EraseRootFromParent_Done,
2131 // Label 189: @3626
2132 GIM_Try, /*On fail goto*//*Label 190*/ GIMT_Encode4(3663), // Rule ID 21314 //
2133 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2134 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2135 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2136 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2137 // MIs[1] Operand 1
2138 // No operand predicates
2139 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2140 // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
2141 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri_ND),
2142 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2143 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2144 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2145 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2146 GIR_RootConstrainSelectedInstOperands,
2147 // GIR_Coverage, 21314,
2148 GIR_EraseRootFromParent_Done,
2149 // Label 190: @3663
2150 GIM_Try, /*On fail goto*//*Label 191*/ GIMT_Encode4(3692), // Rule ID 21216 //
2151 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2152 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2153 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2154 // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
2155 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB16rr),
2156 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2157 GIR_RootConstrainSelectedInstOperands,
2158 // GIR_Coverage, 21216,
2159 GIR_Done,
2160 // Label 191: @3692
2161 GIM_Try, /*On fail goto*//*Label 192*/ GIMT_Encode4(3721), // Rule ID 21306 //
2162 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2163 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2164 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2165 // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
2166 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB16rr_ND),
2167 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2168 GIR_RootConstrainSelectedInstOperands,
2169 // GIR_Coverage, 21306,
2170 GIR_Done,
2171 // Label 192: @3721
2172 GIM_Reject,
2173 // Label 187: @3722
2174 GIM_Reject,
2175 // Label 166: @3723
2176 GIM_Try, /*On fail goto*//*Label 193*/ GIMT_Encode4(3896),
2177 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
2178 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
2179 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2180 GIM_Try, /*On fail goto*//*Label 194*/ GIMT_Encode4(3763), // Rule ID 248 //
2181 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
2182 GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0,
2183 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2184 // (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src1) => (NEG32r_NF_ND:{ *:[i32] } GR32:{ *:[i32] }:$src1)
2185 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG32r_NF_ND),
2186 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2187 GIR_RootToRootCopy, /*OpIdx*/2, // src1
2188 GIR_RootConstrainSelectedInstOperands,
2189 // GIR_Coverage, 248,
2190 GIR_EraseRootFromParent_Done,
2191 // Label 194: @3763
2192 GIM_Try, /*On fail goto*//*Label 195*/ GIMT_Encode4(3800), // Rule ID 21225 //
2193 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2194 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2195 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2196 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2197 // MIs[1] Operand 1
2198 // No operand predicates
2199 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2200 // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
2201 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri),
2202 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2203 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2204 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2205 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2206 GIR_RootConstrainSelectedInstOperands,
2207 // GIR_Coverage, 21225,
2208 GIR_EraseRootFromParent_Done,
2209 // Label 195: @3800
2210 GIM_Try, /*On fail goto*//*Label 196*/ GIMT_Encode4(3837), // Rule ID 21315 //
2211 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2212 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2213 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2214 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2215 // MIs[1] Operand 1
2216 // No operand predicates
2217 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2218 // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
2219 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri_ND),
2220 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2221 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2222 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2223 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2224 GIR_RootConstrainSelectedInstOperands,
2225 // GIR_Coverage, 21315,
2226 GIR_EraseRootFromParent_Done,
2227 // Label 196: @3837
2228 GIM_Try, /*On fail goto*//*Label 197*/ GIMT_Encode4(3866), // Rule ID 21217 //
2229 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2230 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2231 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2232 // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
2233 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB32rr),
2234 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2235 GIR_RootConstrainSelectedInstOperands,
2236 // GIR_Coverage, 21217,
2237 GIR_Done,
2238 // Label 197: @3866
2239 GIM_Try, /*On fail goto*//*Label 198*/ GIMT_Encode4(3895), // Rule ID 21307 //
2240 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2241 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2242 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2243 // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
2244 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB32rr_ND),
2245 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2246 GIR_RootConstrainSelectedInstOperands,
2247 // GIR_Coverage, 21307,
2248 GIR_Done,
2249 // Label 198: @3895
2250 GIM_Reject,
2251 // Label 193: @3896
2252 GIM_Reject,
2253 // Label 167: @3897
2254 GIM_Try, /*On fail goto*//*Label 199*/ GIMT_Encode4(4078),
2255 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
2256 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
2257 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2258 GIM_Try, /*On fail goto*//*Label 200*/ GIMT_Encode4(3937), // Rule ID 249 //
2259 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
2260 GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0,
2261 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2262 // (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src1) => (NEG64r_NF_ND:{ *:[i64] } GR64:{ *:[i64] }:$src1)
2263 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG64r_NF_ND),
2264 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2265 GIR_RootToRootCopy, /*OpIdx*/2, // src1
2266 GIR_RootConstrainSelectedInstOperands,
2267 // GIR_Coverage, 249,
2268 GIR_EraseRootFromParent_Done,
2269 // Label 200: @3937
2270 GIM_Try, /*On fail goto*//*Label 201*/ GIMT_Encode4(3978), // Rule ID 21226 //
2271 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2272 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2273 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2274 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2275 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
2276 // MIs[1] Operand 1
2277 // No operand predicates
2278 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2279 // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
2280 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32),
2281 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2282 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2283 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2284 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2285 GIR_RootConstrainSelectedInstOperands,
2286 // GIR_Coverage, 21226,
2287 GIR_EraseRootFromParent_Done,
2288 // Label 201: @3978
2289 GIM_Try, /*On fail goto*//*Label 202*/ GIMT_Encode4(4019), // Rule ID 21316 //
2290 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2291 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2292 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2293 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2294 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
2295 // MIs[1] Operand 1
2296 // No operand predicates
2297 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2298 // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (SUB64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
2299 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32_ND),
2300 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2301 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2302 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2303 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2304 GIR_RootConstrainSelectedInstOperands,
2305 // GIR_Coverage, 21316,
2306 GIR_EraseRootFromParent_Done,
2307 // Label 202: @4019
2308 GIM_Try, /*On fail goto*//*Label 203*/ GIMT_Encode4(4048), // Rule ID 21218 //
2309 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2310 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2311 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2312 // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
2313 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB64rr),
2314 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2315 GIR_RootConstrainSelectedInstOperands,
2316 // GIR_Coverage, 21218,
2317 GIR_Done,
2318 // Label 203: @4048
2319 GIM_Try, /*On fail goto*//*Label 204*/ GIMT_Encode4(4077), // Rule ID 21308 //
2320 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2321 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2322 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2323 // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
2324 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB64rr_ND),
2325 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2326 GIR_RootConstrainSelectedInstOperands,
2327 // GIR_Coverage, 21308,
2328 GIR_Done,
2329 // Label 204: @4077
2330 GIM_Reject,
2331 // Label 199: @4078
2332 GIM_Reject,
2333 // Label 168: @4079
2334 GIM_Try, /*On fail goto*//*Label 205*/ GIMT_Encode4(4172),
2335 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
2336 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2337 GIM_Try, /*On fail goto*//*Label 206*/ GIMT_Encode4(4117), // Rule ID 2554 //
2338 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
2339 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2340 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2341 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2342 // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
2343 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQrr),
2344 GIR_RootConstrainSelectedInstOperands,
2345 // GIR_Coverage, 2554,
2346 GIR_Done,
2347 // Label 206: @4117
2348 GIM_Try, /*On fail goto*//*Label 207*/ GIMT_Encode4(4144), // Rule ID 2556 //
2349 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
2350 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2351 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2352 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2353 // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
2354 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBQrr),
2355 GIR_RootConstrainSelectedInstOperands,
2356 // GIR_Coverage, 2556,
2357 GIR_Done,
2358 // Label 207: @4144
2359 GIM_Try, /*On fail goto*//*Label 208*/ GIMT_Encode4(4171), // Rule ID 4693 //
2360 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
2361 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2362 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2363 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2364 // (sub:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
2365 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQZ128rr),
2366 GIR_RootConstrainSelectedInstOperands,
2367 // GIR_Coverage, 4693,
2368 GIR_Done,
2369 // Label 208: @4171
2370 GIM_Reject,
2371 // Label 205: @4172
2372 GIM_Reject,
2373 // Label 169: @4173
2374 GIM_Try, /*On fail goto*//*Label 209*/ GIMT_Encode4(4266),
2375 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
2376 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
2377 GIM_Try, /*On fail goto*//*Label 210*/ GIMT_Encode4(4211), // Rule ID 2548 //
2378 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
2379 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2380 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2381 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2382 // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
2383 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDrr),
2384 GIR_RootConstrainSelectedInstOperands,
2385 // GIR_Coverage, 2548,
2386 GIR_Done,
2387 // Label 210: @4211
2388 GIM_Try, /*On fail goto*//*Label 211*/ GIMT_Encode4(4238), // Rule ID 2550 //
2389 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
2390 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2391 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2392 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2393 // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
2394 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBDrr),
2395 GIR_RootConstrainSelectedInstOperands,
2396 // GIR_Coverage, 2550,
2397 GIR_Done,
2398 // Label 211: @4238
2399 GIM_Try, /*On fail goto*//*Label 212*/ GIMT_Encode4(4265), // Rule ID 4720 //
2400 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
2401 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2402 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2403 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2404 // (sub:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
2405 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDZ128rr),
2406 GIR_RootConstrainSelectedInstOperands,
2407 // GIR_Coverage, 4720,
2408 GIR_Done,
2409 // Label 212: @4265
2410 GIM_Reject,
2411 // Label 209: @4266
2412 GIM_Reject,
2413 // Label 170: @4267
2414 GIM_Try, /*On fail goto*//*Label 213*/ GIMT_Encode4(4333),
2415 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
2416 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
2417 GIM_Try, /*On fail goto*//*Label 214*/ GIMT_Encode4(4305), // Rule ID 2558 //
2418 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
2419 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2420 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2421 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2422 // (sub:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSUBQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
2423 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQYrr),
2424 GIR_RootConstrainSelectedInstOperands,
2425 // GIR_Coverage, 2558,
2426 GIR_Done,
2427 // Label 214: @4305
2428 GIM_Try, /*On fail goto*//*Label 215*/ GIMT_Encode4(4332), // Rule ID 4684 //
2429 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
2430 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2431 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2432 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2433 // (sub:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSUBQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
2434 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQZ256rr),
2435 GIR_RootConstrainSelectedInstOperands,
2436 // GIR_Coverage, 4684,
2437 GIR_Done,
2438 // Label 215: @4332
2439 GIM_Reject,
2440 // Label 213: @4333
2441 GIM_Reject,
2442 // Label 171: @4334
2443 GIM_Try, /*On fail goto*//*Label 216*/ GIMT_Encode4(4427),
2444 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
2445 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
2446 GIM_Try, /*On fail goto*//*Label 217*/ GIMT_Encode4(4372), // Rule ID 2542 //
2447 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
2448 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2449 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2450 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2451 // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
2452 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWrr),
2453 GIR_RootConstrainSelectedInstOperands,
2454 // GIR_Coverage, 2542,
2455 GIR_Done,
2456 // Label 217: @4372
2457 GIM_Try, /*On fail goto*//*Label 218*/ GIMT_Encode4(4399), // Rule ID 2544 //
2458 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
2459 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2460 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2461 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2462 // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
2463 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBWrr),
2464 GIR_RootConstrainSelectedInstOperands,
2465 // GIR_Coverage, 2544,
2466 GIR_Done,
2467 // Label 218: @4399
2468 GIM_Try, /*On fail goto*//*Label 219*/ GIMT_Encode4(4426), // Rule ID 4741 //
2469 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
2470 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2471 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2472 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2473 // (sub:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
2474 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWZ128rr),
2475 GIR_RootConstrainSelectedInstOperands,
2476 // GIR_Coverage, 4741,
2477 GIR_Done,
2478 // Label 219: @4426
2479 GIM_Reject,
2480 // Label 216: @4427
2481 GIM_Reject,
2482 // Label 172: @4428
2483 GIM_Try, /*On fail goto*//*Label 220*/ GIMT_Encode4(4494),
2484 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
2485 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
2486 GIM_Try, /*On fail goto*//*Label 221*/ GIMT_Encode4(4466), // Rule ID 2552 //
2487 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
2488 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2489 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2490 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2491 // (sub:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSUBDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
2492 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDYrr),
2493 GIR_RootConstrainSelectedInstOperands,
2494 // GIR_Coverage, 2552,
2495 GIR_Done,
2496 // Label 221: @4466
2497 GIM_Try, /*On fail goto*//*Label 222*/ GIMT_Encode4(4493), // Rule ID 4711 //
2498 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
2499 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2500 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2501 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2502 // (sub:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSUBDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
2503 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDZ256rr),
2504 GIR_RootConstrainSelectedInstOperands,
2505 // GIR_Coverage, 4711,
2506 GIR_Done,
2507 // Label 222: @4493
2508 GIM_Reject,
2509 // Label 220: @4494
2510 GIM_Reject,
2511 // Label 173: @4495
2512 GIM_Try, /*On fail goto*//*Label 223*/ GIMT_Encode4(4528), // Rule ID 4675 //
2513 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
2514 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
2515 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
2516 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2517 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2518 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2519 // (sub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
2520 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQZrr),
2521 GIR_RootConstrainSelectedInstOperands,
2522 // GIR_Coverage, 4675,
2523 GIR_Done,
2524 // Label 223: @4528
2525 GIM_Reject,
2526 // Label 174: @4529
2527 GIM_Try, /*On fail goto*//*Label 224*/ GIMT_Encode4(4622),
2528 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
2529 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2530 GIM_Try, /*On fail goto*//*Label 225*/ GIMT_Encode4(4567), // Rule ID 2536 //
2531 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
2532 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2533 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2534 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2535 // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
2536 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBrr),
2537 GIR_RootConstrainSelectedInstOperands,
2538 // GIR_Coverage, 2536,
2539 GIR_Done,
2540 // Label 225: @4567
2541 GIM_Try, /*On fail goto*//*Label 226*/ GIMT_Encode4(4594), // Rule ID 2538 //
2542 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
2543 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2544 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2545 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2546 // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
2547 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBBrr),
2548 GIR_RootConstrainSelectedInstOperands,
2549 // GIR_Coverage, 2538,
2550 GIR_Done,
2551 // Label 226: @4594
2552 GIM_Try, /*On fail goto*//*Label 227*/ GIMT_Encode4(4621), // Rule ID 4759 //
2553 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
2554 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2555 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2556 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2557 // (sub:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
2558 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBZ128rr),
2559 GIR_RootConstrainSelectedInstOperands,
2560 // GIR_Coverage, 4759,
2561 GIR_Done,
2562 // Label 227: @4621
2563 GIM_Reject,
2564 // Label 224: @4622
2565 GIM_Reject,
2566 // Label 175: @4623
2567 GIM_Try, /*On fail goto*//*Label 228*/ GIMT_Encode4(4689),
2568 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
2569 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
2570 GIM_Try, /*On fail goto*//*Label 229*/ GIMT_Encode4(4661), // Rule ID 2546 //
2571 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
2572 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2573 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2574 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2575 // (sub:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
2576 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWYrr),
2577 GIR_RootConstrainSelectedInstOperands,
2578 // GIR_Coverage, 2546,
2579 GIR_Done,
2580 // Label 229: @4661
2581 GIM_Try, /*On fail goto*//*Label 230*/ GIMT_Encode4(4688), // Rule ID 4735 //
2582 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
2583 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2584 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2585 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2586 // (sub:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
2587 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWZ256rr),
2588 GIR_RootConstrainSelectedInstOperands,
2589 // GIR_Coverage, 4735,
2590 GIR_Done,
2591 // Label 230: @4688
2592 GIM_Reject,
2593 // Label 228: @4689
2594 GIM_Reject,
2595 // Label 176: @4690
2596 GIM_Try, /*On fail goto*//*Label 231*/ GIMT_Encode4(4723), // Rule ID 4702 //
2597 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
2598 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
2599 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
2600 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2601 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2602 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2603 // (sub:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSUBDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
2604 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDZrr),
2605 GIR_RootConstrainSelectedInstOperands,
2606 // GIR_Coverage, 4702,
2607 GIR_Done,
2608 // Label 231: @4723
2609 GIM_Reject,
2610 // Label 177: @4724
2611 GIM_Try, /*On fail goto*//*Label 232*/ GIMT_Encode4(4790),
2612 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
2613 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
2614 GIM_Try, /*On fail goto*//*Label 233*/ GIMT_Encode4(4762), // Rule ID 2540 //
2615 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
2616 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2617 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2618 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
2619 // (sub:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
2620 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBYrr),
2621 GIR_RootConstrainSelectedInstOperands,
2622 // GIR_Coverage, 2540,
2623 GIR_Done,
2624 // Label 233: @4762
2625 GIM_Try, /*On fail goto*//*Label 234*/ GIMT_Encode4(4789), // Rule ID 4753 //
2626 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
2627 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2628 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2629 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2630 // (sub:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
2631 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBZ256rr),
2632 GIR_RootConstrainSelectedInstOperands,
2633 // GIR_Coverage, 4753,
2634 GIR_Done,
2635 // Label 234: @4789
2636 GIM_Reject,
2637 // Label 232: @4790
2638 GIM_Reject,
2639 // Label 178: @4791
2640 GIM_Try, /*On fail goto*//*Label 235*/ GIMT_Encode4(4824), // Rule ID 4729 //
2641 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
2642 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
2643 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
2644 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2645 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2646 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2647 // (sub:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
2648 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWZrr),
2649 GIR_RootConstrainSelectedInstOperands,
2650 // GIR_Coverage, 4729,
2651 GIR_Done,
2652 // Label 235: @4824
2653 GIM_Reject,
2654 // Label 179: @4825
2655 GIM_Try, /*On fail goto*//*Label 236*/ GIMT_Encode4(4858), // Rule ID 4747 //
2656 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
2657 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
2658 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
2659 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2660 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2661 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2662 // (sub:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
2663 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBZrr),
2664 GIR_RootConstrainSelectedInstOperands,
2665 // GIR_Coverage, 4747,
2666 GIR_Done,
2667 // Label 236: @4858
2668 GIM_Reject,
2669 // Label 180: @4859
2670 GIM_Reject,
2671 // Label 2: @4860
2672 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 249*/ GIMT_Encode4(6096),
2673 /*GILLT_s16*//*Label 237*/ GIMT_Encode4(4955),
2674 /*GILLT_s32*//*Label 238*/ GIMT_Encode4(5056),
2675 /*GILLT_s64*//*Label 239*/ GIMT_Encode4(5157), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
2676 /*GILLT_v2s64*//*Label 240*/ GIMT_Encode4(5262), GIMT_Encode4(0),
2677 /*GILLT_v4s32*//*Label 241*/ GIMT_Encode4(5467),
2678 /*GILLT_v4s64*//*Label 242*/ GIMT_Encode4(5561), GIMT_Encode4(0),
2679 /*GILLT_v8s16*//*Label 243*/ GIMT_Encode4(5766),
2680 /*GILLT_v8s32*//*Label 244*/ GIMT_Encode4(5860),
2681 /*GILLT_v8s64*//*Label 245*/ GIMT_Encode4(5927), GIMT_Encode4(0), GIMT_Encode4(0),
2682 /*GILLT_v16s16*//*Label 246*/ GIMT_Encode4(5961),
2683 /*GILLT_v16s32*//*Label 247*/ GIMT_Encode4(6028), GIMT_Encode4(0), GIMT_Encode4(0),
2684 /*GILLT_v32s16*//*Label 248*/ GIMT_Encode4(6062),
2685 // Label 237: @4955
2686 GIM_Try, /*On fail goto*//*Label 250*/ GIMT_Encode4(5055),
2687 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
2688 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
2689 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2690 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2691 GIM_Try, /*On fail goto*//*Label 251*/ GIMT_Encode4(5004), // Rule ID 21383 //
2692 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2693 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2694 // MIs[1] Operand 1
2695 // No operand predicates
2696 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2697 // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (IMUL16rri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
2698 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::IMUL16rri),
2699 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2700 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2701 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2702 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2703 GIR_RootConstrainSelectedInstOperands,
2704 // GIR_Coverage, 21383,
2705 GIR_EraseRootFromParent_Done,
2706 // Label 251: @5004
2707 GIM_Try, /*On fail goto*//*Label 252*/ GIMT_Encode4(5029), // Rule ID 21231 //
2708 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2709 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2710 // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
2711 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL16rr),
2712 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2713 GIR_RootConstrainSelectedInstOperands,
2714 // GIR_Coverage, 21231,
2715 GIR_Done,
2716 // Label 252: @5029
2717 GIM_Try, /*On fail goto*//*Label 253*/ GIMT_Encode4(5054), // Rule ID 21321 //
2718 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2719 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
2720 // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
2721 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL16rr_ND),
2722 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2723 GIR_RootConstrainSelectedInstOperands,
2724 // GIR_Coverage, 21321,
2725 GIR_Done,
2726 // Label 253: @5054
2727 GIM_Reject,
2728 // Label 250: @5055
2729 GIM_Reject,
2730 // Label 238: @5056
2731 GIM_Try, /*On fail goto*//*Label 254*/ GIMT_Encode4(5156),
2732 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
2733 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
2734 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2735 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2736 GIM_Try, /*On fail goto*//*Label 255*/ GIMT_Encode4(5105), // Rule ID 21384 //
2737 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2738 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2739 // MIs[1] Operand 1
2740 // No operand predicates
2741 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2742 // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (IMUL32rri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
2743 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::IMUL32rri),
2744 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2745 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2746 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2747 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2748 GIR_RootConstrainSelectedInstOperands,
2749 // GIR_Coverage, 21384,
2750 GIR_EraseRootFromParent_Done,
2751 // Label 255: @5105
2752 GIM_Try, /*On fail goto*//*Label 256*/ GIMT_Encode4(5130), // Rule ID 21232 //
2753 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2754 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2755 // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
2756 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL32rr),
2757 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2758 GIR_RootConstrainSelectedInstOperands,
2759 // GIR_Coverage, 21232,
2760 GIR_Done,
2761 // Label 256: @5130
2762 GIM_Try, /*On fail goto*//*Label 257*/ GIMT_Encode4(5155), // Rule ID 21322 //
2763 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2764 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
2765 // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
2766 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL32rr_ND),
2767 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2768 GIR_RootConstrainSelectedInstOperands,
2769 // GIR_Coverage, 21322,
2770 GIR_Done,
2771 // Label 257: @5155
2772 GIM_Reject,
2773 // Label 254: @5156
2774 GIM_Reject,
2775 // Label 239: @5157
2776 GIM_Try, /*On fail goto*//*Label 258*/ GIMT_Encode4(5261),
2777 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
2778 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
2779 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2780 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2781 GIM_Try, /*On fail goto*//*Label 259*/ GIMT_Encode4(5210), // Rule ID 21385 //
2782 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2783 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
2784 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
2785 // MIs[1] Operand 1
2786 // No operand predicates
2787 GIM_CheckIsSafeToFold, /*NumInsns*/1,
2788 // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (IMUL64rri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
2789 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::IMUL64rri32),
2790 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2791 GIR_RootToRootCopy, /*OpIdx*/1, // src1
2792 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2793 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
2794 GIR_RootConstrainSelectedInstOperands,
2795 // GIR_Coverage, 21385,
2796 GIR_EraseRootFromParent_Done,
2797 // Label 259: @5210
2798 GIM_Try, /*On fail goto*//*Label 260*/ GIMT_Encode4(5235), // Rule ID 21233 //
2799 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
2800 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2801 // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
2802 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL64rr),
2803 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2804 GIR_RootConstrainSelectedInstOperands,
2805 // GIR_Coverage, 21233,
2806 GIR_Done,
2807 // Label 260: @5235
2808 GIM_Try, /*On fail goto*//*Label 261*/ GIMT_Encode4(5260), // Rule ID 21323 //
2809 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
2810 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
2811 // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
2812 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL64rr_ND),
2813 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
2814 GIR_RootConstrainSelectedInstOperands,
2815 // GIR_Coverage, 21323,
2816 GIR_Done,
2817 // Label 261: @5260
2818 GIM_Reject,
2819 // Label 258: @5261
2820 GIM_Reject,
2821 // Label 240: @5262
2822 GIM_Try, /*On fail goto*//*Label 262*/ GIMT_Encode4(5466),
2823 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
2824 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2825 GIM_Try, /*On fail goto*//*Label 263*/ GIMT_Encode4(5300), // Rule ID 4972 //
2826 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
2827 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2828 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2829 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2830 // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
2831 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLQZ128rr),
2832 GIR_RootConstrainSelectedInstOperands,
2833 // GIR_Coverage, 4972,
2834 GIR_Done,
2835 // Label 263: @5300
2836 GIM_Try, /*On fail goto*//*Label 264*/ GIMT_Encode4(5465), // Rule ID 18578 //
2837 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX),
2838 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2839 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2840 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2841 // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMULLQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
2842 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
2843 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
2844 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
2845 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
2846 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
2847 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
2848 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2849 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
2850 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
2851 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2852 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
2853 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
2854 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
2855 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
2856 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
2857 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
2858 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
2859 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2860 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
2861 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
2862 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2863 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
2864 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
2865 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
2866 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
2867 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
2868 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
2869 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMULLQZrr),
2870 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2871 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
2872 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
2873 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
2874 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
2875 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2876 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
2877 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
2878 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
2879 // GIR_Coverage, 18578,
2880 GIR_EraseRootFromParent_Done,
2881 // Label 264: @5465
2882 GIM_Reject,
2883 // Label 262: @5466
2884 GIM_Reject,
2885 // Label 241: @5467
2886 GIM_Try, /*On fail goto*//*Label 265*/ GIMT_Encode4(5560),
2887 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
2888 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
2889 GIM_Try, /*On fail goto*//*Label 266*/ GIMT_Encode4(5505), // Rule ID 3187 //
2890 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
2891 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2892 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2893 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2894 // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
2895 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDrr),
2896 GIR_RootConstrainSelectedInstOperands,
2897 // GIR_Coverage, 3187,
2898 GIR_Done,
2899 // Label 266: @5505
2900 GIM_Try, /*On fail goto*//*Label 267*/ GIMT_Encode4(5532), // Rule ID 3195 //
2901 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
2902 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2903 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2904 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2905 // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
2906 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMULLDrr),
2907 GIR_RootConstrainSelectedInstOperands,
2908 // GIR_Coverage, 3195,
2909 GIR_Done,
2910 // Label 267: @5532
2911 GIM_Try, /*On fail goto*//*Label 268*/ GIMT_Encode4(5559), // Rule ID 4927 //
2912 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
2913 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2914 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2915 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
2916 // (mul:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMULLDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
2917 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDZ128rr),
2918 GIR_RootConstrainSelectedInstOperands,
2919 // GIR_Coverage, 4927,
2920 GIR_Done,
2921 // Label 268: @5559
2922 GIM_Reject,
2923 // Label 265: @5560
2924 GIM_Reject,
2925 // Label 242: @5561
2926 GIM_Try, /*On fail goto*//*Label 269*/ GIMT_Encode4(5765),
2927 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
2928 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
2929 GIM_Try, /*On fail goto*//*Label 270*/ GIMT_Encode4(5599), // Rule ID 4963 //
2930 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
2931 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2932 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2933 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2934 // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMULLQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
2935 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLQZ256rr),
2936 GIR_RootConstrainSelectedInstOperands,
2937 // GIR_Coverage, 4963,
2938 GIR_Done,
2939 // Label 270: @5599
2940 GIM_Try, /*On fail goto*//*Label 271*/ GIMT_Encode4(5764), // Rule ID 18576 //
2941 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX),
2942 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
2943 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2944 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
2945 // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMULLQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
2946 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
2947 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
2948 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
2949 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
2950 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
2951 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
2952 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2953 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
2954 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
2955 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2956 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
2957 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
2958 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
2959 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
2960 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
2961 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
2962 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
2963 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2964 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
2965 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
2966 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2967 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
2968 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
2969 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
2970 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
2971 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
2972 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
2973 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMULLQZrr),
2974 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
2975 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
2976 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
2977 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
2978 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
2979 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2980 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
2981 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
2982 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
2983 // GIR_Coverage, 18576,
2984 GIR_EraseRootFromParent_Done,
2985 // Label 271: @5764
2986 GIM_Reject,
2987 // Label 269: @5765
2988 GIM_Reject,
2989 // Label 243: @5766
2990 GIM_Try, /*On fail goto*//*Label 272*/ GIMT_Encode4(5859),
2991 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
2992 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
2993 GIM_Try, /*On fail goto*//*Label 273*/ GIMT_Encode4(5804), // Rule ID 2518 //
2994 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
2995 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2996 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2997 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
2998 // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
2999 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWrr),
3000 GIR_RootConstrainSelectedInstOperands,
3001 // GIR_Coverage, 2518,
3002 GIR_Done,
3003 // Label 273: @5804
3004 GIM_Try, /*On fail goto*//*Label 274*/ GIMT_Encode4(5831), // Rule ID 2520 //
3005 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
3006 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
3007 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
3008 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
3009 // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
3010 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMULLWrr),
3011 GIR_RootConstrainSelectedInstOperands,
3012 // GIR_Coverage, 2520,
3013 GIR_Done,
3014 // Label 274: @5831
3015 GIM_Try, /*On fail goto*//*Label 275*/ GIMT_Encode4(5858), // Rule ID 4948 //
3016 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
3017 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
3018 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
3019 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
3020 // (mul:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULLWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
3021 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWZ128rr),
3022 GIR_RootConstrainSelectedInstOperands,
3023 // GIR_Coverage, 4948,
3024 GIR_Done,
3025 // Label 275: @5858
3026 GIM_Reject,
3027 // Label 272: @5859
3028 GIM_Reject,
3029 // Label 244: @5860
3030 GIM_Try, /*On fail goto*//*Label 276*/ GIMT_Encode4(5926),
3031 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
3032 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
3033 GIM_Try, /*On fail goto*//*Label 277*/ GIMT_Encode4(5898), // Rule ID 3191 //
3034 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
3035 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
3036 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
3037 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
3038 // (mul:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMULLDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
3039 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDYrr),
3040 GIR_RootConstrainSelectedInstOperands,
3041 // GIR_Coverage, 3191,
3042 GIR_Done,
3043 // Label 277: @5898
3044 GIM_Try, /*On fail goto*//*Label 278*/ GIMT_Encode4(5925), // Rule ID 4918 //
3045 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
3046 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
3047 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
3048 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
3049 // (mul:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMULLDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
3050 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDZ256rr),
3051 GIR_RootConstrainSelectedInstOperands,
3052 // GIR_Coverage, 4918,
3053 GIR_Done,
3054 // Label 278: @5925
3055 GIM_Reject,
3056 // Label 276: @5926
3057 GIM_Reject,
3058 // Label 245: @5927
3059 GIM_Try, /*On fail goto*//*Label 279*/ GIMT_Encode4(5960), // Rule ID 4954 //
3060 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
3061 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
3062 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
3063 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3064 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3065 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3066 // (mul:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMULLQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
3067 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLQZrr),
3068 GIR_RootConstrainSelectedInstOperands,
3069 // GIR_Coverage, 4954,
3070 GIR_Done,
3071 // Label 279: @5960
3072 GIM_Reject,
3073 // Label 246: @5961
3074 GIM_Try, /*On fail goto*//*Label 280*/ GIMT_Encode4(6027),
3075 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
3076 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
3077 GIM_Try, /*On fail goto*//*Label 281*/ GIMT_Encode4(5999), // Rule ID 2522 //
3078 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
3079 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
3080 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
3081 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
3082 // (mul:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULLWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
3083 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWYrr),
3084 GIR_RootConstrainSelectedInstOperands,
3085 // GIR_Coverage, 2522,
3086 GIR_Done,
3087 // Label 281: @5999
3088 GIM_Try, /*On fail goto*//*Label 282*/ GIMT_Encode4(6026), // Rule ID 4942 //
3089 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
3090 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
3091 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
3092 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
3093 // (mul:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULLWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
3094 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWZ256rr),
3095 GIR_RootConstrainSelectedInstOperands,
3096 // GIR_Coverage, 4942,
3097 GIR_Done,
3098 // Label 282: @6026
3099 GIM_Reject,
3100 // Label 280: @6027
3101 GIM_Reject,
3102 // Label 247: @6028
3103 GIM_Try, /*On fail goto*//*Label 283*/ GIMT_Encode4(6061), // Rule ID 4909 //
3104 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
3105 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
3106 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
3107 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3108 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3109 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3110 // (mul:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMULLDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
3111 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDZrr),
3112 GIR_RootConstrainSelectedInstOperands,
3113 // GIR_Coverage, 4909,
3114 GIR_Done,
3115 // Label 283: @6061
3116 GIM_Reject,
3117 // Label 248: @6062
3118 GIM_Try, /*On fail goto*//*Label 284*/ GIMT_Encode4(6095), // Rule ID 4936 //
3119 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
3120 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
3121 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
3122 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3123 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3124 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
3125 // (mul:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULLWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
3126 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWZrr),
3127 GIR_RootConstrainSelectedInstOperands,
3128 // GIR_Coverage, 4936,
3129 GIR_Done,
3130 // Label 284: @6095
3131 GIM_Reject,
3132 // Label 249: @6096
3133 GIM_Reject,
3134 // Label 3: @6097
3135 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(25), /*)*//*default:*//*Label 308*/ GIMT_Encode4(11892),
3136 /*GILLT_s1*//*Label 285*/ GIMT_Encode4(6208),
3137 /*GILLT_s8*//*Label 286*/ GIMT_Encode4(6536),
3138 /*GILLT_s16*//*Label 287*/ GIMT_Encode4(6673),
3139 /*GILLT_s32*//*Label 288*/ GIMT_Encode4(7138),
3140 /*GILLT_s64*//*Label 289*/ GIMT_Encode4(8324), GIMT_Encode4(0), GIMT_Encode4(0),
3141 /*GILLT_v2s1*//*Label 290*/ GIMT_Encode4(9388),
3142 /*GILLT_v2s64*//*Label 291*/ GIMT_Encode4(9716),
3143 /*GILLT_v4s1*//*Label 292*/ GIMT_Encode4(9810),
3144 /*GILLT_v4s32*//*Label 293*/ GIMT_Encode4(10138),
3145 /*GILLT_v4s64*//*Label 294*/ GIMT_Encode4(10232),
3146 /*GILLT_v8s1*//*Label 295*/ GIMT_Encode4(10326),
3147 /*GILLT_v8s16*//*Label 296*/ GIMT_Encode4(10806),
3148 /*GILLT_v8s32*//*Label 297*/ GIMT_Encode4(10900),
3149 /*GILLT_v8s64*//*Label 298*/ GIMT_Encode4(10994),
3150 /*GILLT_v16s1*//*Label 299*/ GIMT_Encode4(11028),
3151 /*GILLT_v16s8*//*Label 300*/ GIMT_Encode4(11188),
3152 /*GILLT_v16s16*//*Label 301*/ GIMT_Encode4(11282),
3153 /*GILLT_v16s32*//*Label 302*/ GIMT_Encode4(11376),
3154 /*GILLT_v32s1*//*Label 303*/ GIMT_Encode4(11410),
3155 /*GILLT_v32s8*//*Label 304*/ GIMT_Encode4(11570),
3156 /*GILLT_v32s16*//*Label 305*/ GIMT_Encode4(11664),
3157 /*GILLT_v64s1*//*Label 306*/ GIMT_Encode4(11698),
3158 /*GILLT_v64s8*//*Label 307*/ GIMT_Encode4(11858),
3159 // Label 285: @6208
3160 GIM_Try, /*On fail goto*//*Label 309*/ GIMT_Encode4(6535),
3161 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s1,
3162 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s1,
3163 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
3164 GIM_Try, /*On fail goto*//*Label 310*/ GIMT_Encode4(6337), // Rule ID 18022 //
3165 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3166 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3167 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
3168 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
3169 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
3170 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3171 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3172 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
3173 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
3174 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3175 // (and:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
3176 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
3177 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
3178 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
3179 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3180 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3181 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
3182 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
3183 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3184 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3185 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
3186 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3187 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
3188 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3189 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3190 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
3191 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3192 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3193 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3194 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3195 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
3196 // GIR_Coverage, 18022,
3197 GIR_EraseRootFromParent_Done,
3198 // Label 310: @6337
3199 GIM_Try, /*On fail goto*//*Label 311*/ GIMT_Encode4(6451), // Rule ID 23787 //
3200 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
3201 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3202 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3203 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
3204 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
3205 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
3206 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3207 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3208 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
3209 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3210 // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
3211 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
3212 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
3213 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
3214 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3215 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3216 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
3217 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
3218 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3219 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3220 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
3221 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3222 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
3223 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3224 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3225 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
3226 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3227 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3228 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3229 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3230 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
3231 // GIR_Coverage, 23787,
3232 GIR_EraseRootFromParent_Done,
3233 // Label 311: @6451
3234 GIM_Try, /*On fail goto*//*Label 312*/ GIMT_Encode4(6534), // Rule ID 18018 //
3235 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
3236 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
3237 // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
3238 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
3239 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
3240 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
3241 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3242 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3243 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
3244 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
3245 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3246 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3247 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
3248 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3249 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWrr),
3250 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3251 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3252 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
3253 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3254 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3255 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3256 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3257 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
3258 // GIR_Coverage, 18018,
3259 GIR_EraseRootFromParent_Done,
3260 // Label 312: @6534
3261 GIM_Reject,
3262 // Label 309: @6535
3263 GIM_Reject,
3264 // Label 286: @6536
3265 GIM_Try, /*On fail goto*//*Label 313*/ GIMT_Encode4(6672),
3266 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
3267 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
3268 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3269 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3270 GIM_Try, /*On fail goto*//*Label 314*/ GIMT_Encode4(6588), // Rule ID 21269 //
3271 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
3272 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3273 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
3274 // MIs[1] Operand 1
3275 // No operand predicates
3276 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3277 // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
3278 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND8ri),
3279 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3280 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3281 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3282 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3283 GIR_RootConstrainSelectedInstOperands,
3284 // GIR_Coverage, 21269,
3285 GIR_EraseRootFromParent_Done,
3286 // Label 314: @6588
3287 GIM_Try, /*On fail goto*//*Label 315*/ GIMT_Encode4(6621), // Rule ID 21359 //
3288 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
3289 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3290 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
3291 // MIs[1] Operand 1
3292 // No operand predicates
3293 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3294 // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
3295 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND8ri_ND),
3296 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3297 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3298 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3299 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3300 GIR_RootConstrainSelectedInstOperands,
3301 // GIR_Coverage, 21359,
3302 GIR_EraseRootFromParent_Done,
3303 // Label 315: @6621
3304 GIM_Try, /*On fail goto*//*Label 316*/ GIMT_Encode4(6646), // Rule ID 21261 //
3305 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
3306 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3307 // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
3308 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND8rr),
3309 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
3310 GIR_RootConstrainSelectedInstOperands,
3311 // GIR_Coverage, 21261,
3312 GIR_Done,
3313 // Label 316: @6646
3314 GIM_Try, /*On fail goto*//*Label 317*/ GIMT_Encode4(6671), // Rule ID 21351 //
3315 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
3316 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3317 // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
3318 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND8rr_ND),
3319 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
3320 GIR_RootConstrainSelectedInstOperands,
3321 // GIR_Coverage, 21351,
3322 GIR_Done,
3323 // Label 317: @6671
3324 GIM_Reject,
3325 // Label 313: @6672
3326 GIM_Reject,
3327 // Label 287: @6673
3328 GIM_Try, /*On fail goto*//*Label 318*/ GIMT_Encode4(7137),
3329 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
3330 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
3331 GIM_Try, /*On fail goto*//*Label 319*/ GIMT_Encode4(6790), // Rule ID 24456 //
3332 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3333 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3334 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL),
3335 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
3336 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
3337 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
3338 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3339 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3340 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3341 // (and:{ *:[i16] } (rotl:{ *:[i16] } -2:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
3342 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
3343 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
3344 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
3345 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3346 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3347 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
3348 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3349 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3350 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
3351 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
3352 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
3353 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
3354 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
3355 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR16rr),
3356 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3357 GIR_RootToRootCopy, /*OpIdx*/2, // src1
3358 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3359 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3360 GIR_RootConstrainSelectedInstOperands,
3361 // GIR_Coverage, 24456,
3362 GIR_EraseRootFromParent_Done,
3363 // Label 319: @6790
3364 GIM_Try, /*On fail goto*//*Label 320*/ GIMT_Encode4(6896), // Rule ID 21185 //
3365 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3366 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3367 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3368 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL),
3369 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
3370 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
3371 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
3372 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3373 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3374 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (rotl:{ *:[i16] } -2:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
3375 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
3376 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
3377 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
3378 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3379 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3380 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
3381 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3382 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3383 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
3384 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
3385 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
3386 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
3387 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
3388 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR16rr),
3389 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3390 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3391 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3392 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3393 GIR_RootConstrainSelectedInstOperands,
3394 // GIR_Coverage, 21185,
3395 GIR_EraseRootFromParent_Done,
3396 // Label 320: @6896
3397 GIM_Try, /*On fail goto*//*Label 321*/ GIMT_Encode4(6988), // Rule ID 21045 //
3398 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3399 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3400 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(255),
3401 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, 255:{ *:[i16] }) => (EXTRACT_SUBREG:{ *:[i16] } (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src1, sub_8bit:{ *:[i32] })), sub_16bit:{ *:[i32] })
3402 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
3403 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s8,
3404 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3405 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3406 GIR_CopySubReg, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(1), // src1
3407 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID),
3408 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
3409 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
3410 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3411 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3412 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3413 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3414 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3415 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
3416 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
3417 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
3418 // GIR_Coverage, 21045,
3419 GIR_EraseRootFromParent_Done,
3420 // Label 321: @6988
3421 GIM_Try, /*On fail goto*//*Label 322*/ GIMT_Encode4(7029), // Rule ID 21270 //
3422 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
3423 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3424 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3425 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3426 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
3427 // MIs[1] Operand 1
3428 // No operand predicates
3429 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3430 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
3431 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND16ri),
3432 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3433 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3434 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3435 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3436 GIR_RootConstrainSelectedInstOperands,
3437 // GIR_Coverage, 21270,
3438 GIR_EraseRootFromParent_Done,
3439 // Label 322: @7029
3440 GIM_Try, /*On fail goto*//*Label 323*/ GIMT_Encode4(7070), // Rule ID 21360 //
3441 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
3442 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3443 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3444 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3445 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
3446 // MIs[1] Operand 1
3447 // No operand predicates
3448 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3449 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
3450 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND16ri_ND),
3451 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3452 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3453 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3454 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3455 GIR_RootConstrainSelectedInstOperands,
3456 // GIR_Coverage, 21360,
3457 GIR_EraseRootFromParent_Done,
3458 // Label 323: @7070
3459 GIM_Try, /*On fail goto*//*Label 324*/ GIMT_Encode4(7103), // Rule ID 21262 //
3460 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
3461 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3462 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3463 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3464 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
3465 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND16rr),
3466 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
3467 GIR_RootConstrainSelectedInstOperands,
3468 // GIR_Coverage, 21262,
3469 GIR_Done,
3470 // Label 324: @7103
3471 GIM_Try, /*On fail goto*//*Label 325*/ GIMT_Encode4(7136), // Rule ID 21352 //
3472 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
3473 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3474 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3475 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
3476 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
3477 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND16rr_ND),
3478 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
3479 GIR_RootConstrainSelectedInstOperands,
3480 // GIR_Coverage, 21352,
3481 GIR_Done,
3482 // Label 325: @7136
3483 GIM_Reject,
3484 // Label 318: @7137
3485 GIM_Reject,
3486 // Label 288: @7138
3487 GIM_Try, /*On fail goto*//*Label 326*/ GIMT_Encode4(8323),
3488 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
3489 GIM_Try, /*On fail goto*//*Label 327*/ GIMT_Encode4(7223), // Rule ID 23415 //
3490 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3491 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3492 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3493 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3494 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
3495 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3496 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3497 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3498 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
3499 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3500 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3501 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
3502 // MIs[2] src
3503 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3504 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
3505 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3506 // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3507 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC32rr),
3508 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3509 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3510 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3511 GIR_RootConstrainSelectedInstOperands,
3512 // GIR_Coverage, 23415,
3513 GIR_EraseRootFromParent_Done,
3514 // Label 327: @7223
3515 GIM_Try, /*On fail goto*//*Label 328*/ GIMT_Encode4(7300), // Rule ID 23427 //
3516 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3517 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3518 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3519 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3520 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
3521 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3522 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3523 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3524 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3525 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3526 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3527 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
3528 // MIs[2] src
3529 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3530 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
3531 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3532 // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3533 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK32rr),
3534 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3535 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3536 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3537 GIR_RootConstrainSelectedInstOperands,
3538 // GIR_Coverage, 23427,
3539 GIR_EraseRootFromParent_Done,
3540 // Label 328: @7300
3541 GIM_Try, /*On fail goto*//*Label 329*/ GIMT_Encode4(7377), // Rule ID 15858 //
3542 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3543 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3544 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3545 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3546 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3547 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3548 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3549 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3550 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3551 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3552 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
3553 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
3554 // MIs[2] src
3555 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3556 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
3557 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3558 // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3559 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC32rr),
3560 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3561 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3562 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3563 GIR_RootConstrainSelectedInstOperands,
3564 // GIR_Coverage, 15858,
3565 GIR_EraseRootFromParent_Done,
3566 // Label 329: @7377
3567 GIM_Try, /*On fail goto*//*Label 330*/ GIMT_Encode4(7454), // Rule ID 15870 //
3568 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3569 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3570 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3571 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3572 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3573 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3574 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3575 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3576 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3577 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3578 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
3579 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
3580 // MIs[2] src
3581 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3582 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
3583 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3584 // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3585 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK32rr),
3586 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3587 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3588 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3589 GIR_RootConstrainSelectedInstOperands,
3590 // GIR_Coverage, 15870,
3591 GIR_EraseRootFromParent_Done,
3592 // Label 330: @7454
3593 GIM_Try, /*On fail goto*//*Label 331*/ GIMT_Encode4(7512), // Rule ID 23409 //
3594 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3595 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3596 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3597 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
3598 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3599 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3600 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3601 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
3602 // MIs[0] src
3603 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
3604 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3605 // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3606 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL32rr),
3607 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3608 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3609 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3610 GIR_RootConstrainSelectedInstOperands,
3611 // GIR_Coverage, 23409,
3612 GIR_EraseRootFromParent_Done,
3613 // Label 331: @7512
3614 GIM_Try, /*On fail goto*//*Label 332*/ GIMT_Encode4(7621), // Rule ID 24462 //
3615 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3616 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3617 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3618 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL),
3619 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3620 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
3621 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
3622 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3623 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3624 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3625 // (and:{ *:[i32] } (rotl:{ *:[i32] } -2:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
3626 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
3627 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
3628 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
3629 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3630 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3631 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
3632 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3633 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3634 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
3635 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
3636 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
3637 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
3638 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
3639 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR32rr),
3640 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3641 GIR_RootToRootCopy, /*OpIdx*/2, // src1
3642 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3643 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3644 GIR_RootConstrainSelectedInstOperands,
3645 // GIR_Coverage, 24462,
3646 GIR_EraseRootFromParent_Done,
3647 // Label 332: @7621
3648 GIM_Try, /*On fail goto*//*Label 333*/ GIMT_Encode4(7675), // Rule ID 15852 //
3649 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3650 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3651 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3652 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3653 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3654 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
3655 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3656 // MIs[1] src
3657 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3658 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
3659 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3660 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3661 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL32rr),
3662 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3663 GIR_RootToRootCopy, /*OpIdx*/1, // src
3664 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3665 GIR_RootConstrainSelectedInstOperands,
3666 // GIR_Coverage, 15852,
3667 GIR_EraseRootFromParent_Done,
3668 // Label 333: @7675
3669 GIM_Try, /*On fail goto*//*Label 334*/ GIMT_Encode4(7784), // Rule ID 21191 //
3670 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3671 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3672 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3673 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3674 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL),
3675 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3676 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
3677 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
3678 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
3679 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3680 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (rotl:{ *:[i32] } -2:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
3681 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
3682 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
3683 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
3684 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3685 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3686 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
3687 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3688 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3689 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
3690 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
3691 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
3692 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
3693 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
3694 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR32rr),
3695 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3696 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3697 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3698 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3699 GIR_RootConstrainSelectedInstOperands,
3700 // GIR_Coverage, 21191,
3701 GIR_EraseRootFromParent_Done,
3702 // Label 334: @7784
3703 GIM_Try, /*On fail goto*//*Label 335*/ GIMT_Encode4(7849), // Rule ID 21043 //
3704 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3705 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3706 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3707 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(65535),
3708 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 65535:{ *:[i32] }) => (MOVZX32rr16:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src1, sub_16bit:{ *:[i32] }))
3709 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
3710 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3711 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3712 GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(4), // src1
3713 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
3714 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
3715 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr16),
3716 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3717 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3718 GIR_RootConstrainSelectedInstOperands,
3719 // GIR_Coverage, 21043,
3720 GIR_EraseRootFromParent_Done,
3721 // Label 335: @7849
3722 GIM_Try, /*On fail goto*//*Label 336*/ GIMT_Encode4(7914), // Rule ID 21044 //
3723 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3724 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3725 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3726 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(255),
3727 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 255:{ *:[i32] }) => (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src1, sub_8bit:{ *:[i32] }))
3728 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s8,
3729 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
3730 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3731 GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(1), // src1
3732 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID),
3733 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
3734 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
3735 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3736 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
3737 GIR_RootConstrainSelectedInstOperands,
3738 // GIR_Coverage, 21044,
3739 GIR_EraseRootFromParent_Done,
3740 // Label 336: @7914
3741 GIM_Try, /*On fail goto*//*Label 337*/ GIMT_Encode4(7958), // Rule ID 21271 //
3742 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
3743 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3744 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3745 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3746 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3747 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
3748 // MIs[1] Operand 1
3749 // No operand predicates
3750 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3751 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
3752 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND32ri),
3753 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3754 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3755 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3756 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3757 GIR_RootConstrainSelectedInstOperands,
3758 // GIR_Coverage, 21271,
3759 GIR_EraseRootFromParent_Done,
3760 // Label 337: @7958
3761 GIM_Try, /*On fail goto*//*Label 338*/ GIMT_Encode4(8002), // Rule ID 21361 //
3762 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
3763 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3764 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3765 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3766 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3767 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
3768 // MIs[1] Operand 1
3769 // No operand predicates
3770 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3771 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
3772 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND32ri_ND),
3773 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3774 GIR_RootToRootCopy, /*OpIdx*/1, // src1
3775 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3776 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3777 GIR_RootConstrainSelectedInstOperands,
3778 // GIR_Coverage, 21361,
3779 GIR_EraseRootFromParent_Done,
3780 // Label 338: @8002
3781 GIM_Try, /*On fail goto*//*Label 339*/ GIMT_Encode4(8064), // Rule ID 16046 //
3782 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR),
3783 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3784 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3785 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3786 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3787 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3788 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3789 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3790 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3791 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3792 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3793 // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3794 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr),
3795 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3796 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3797 GIR_RootToRootCopy, /*OpIdx*/2, // src2
3798 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3799 GIR_RootConstrainSelectedInstOperands,
3800 // GIR_Coverage, 16046,
3801 GIR_EraseRootFromParent_Done,
3802 // Label 339: @8064
3803 GIM_Try, /*On fail goto*//*Label 340*/ GIMT_Encode4(8126), // Rule ID 16050 //
3804 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR),
3805 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3806 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3807 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3808 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3809 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3810 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3811 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3812 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3813 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3814 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3815 // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr_EVEX:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3816 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr_EVEX),
3817 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3818 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3819 GIR_RootToRootCopy, /*OpIdx*/2, // src2
3820 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3821 GIR_RootConstrainSelectedInstOperands,
3822 // GIR_Coverage, 16050,
3823 GIR_EraseRootFromParent_Done,
3824 // Label 340: @8126
3825 GIM_Try, /*On fail goto*//*Label 341*/ GIMT_Encode4(8188), // Rule ID 23521 //
3826 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR),
3827 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3828 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3829 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3830 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3831 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3832 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3833 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3834 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3835 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3836 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3837 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3838 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr),
3839 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3840 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3841 GIR_RootToRootCopy, /*OpIdx*/1, // src2
3842 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3843 GIR_RootConstrainSelectedInstOperands,
3844 // GIR_Coverage, 23521,
3845 GIR_EraseRootFromParent_Done,
3846 // Label 341: @8188
3847 GIM_Try, /*On fail goto*//*Label 342*/ GIMT_Encode4(8250), // Rule ID 23525 //
3848 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR),
3849 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3850 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3851 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3852 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3853 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3854 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3855 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3856 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3857 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3858 GIM_CheckIsSafeToFold, /*NumInsns*/1,
3859 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr_EVEX:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3860 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr_EVEX),
3861 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3862 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3863 GIR_RootToRootCopy, /*OpIdx*/1, // src2
3864 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3865 GIR_RootConstrainSelectedInstOperands,
3866 // GIR_Coverage, 23525,
3867 GIR_EraseRootFromParent_Done,
3868 // Label 342: @8250
3869 GIM_Try, /*On fail goto*//*Label 343*/ GIMT_Encode4(8286), // Rule ID 21263 //
3870 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
3871 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3872 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3873 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3874 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3875 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3876 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND32rr),
3877 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
3878 GIR_RootConstrainSelectedInstOperands,
3879 // GIR_Coverage, 21263,
3880 GIR_Done,
3881 // Label 343: @8286
3882 GIM_Try, /*On fail goto*//*Label 344*/ GIMT_Encode4(8322), // Rule ID 21353 //
3883 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
3884 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
3885 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3886 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3887 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
3888 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3889 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND32rr_ND),
3890 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
3891 GIR_RootConstrainSelectedInstOperands,
3892 // GIR_Coverage, 21353,
3893 GIR_Done,
3894 // Label 344: @8322
3895 GIM_Reject,
3896 // Label 326: @8323
3897 GIM_Reject,
3898 // Label 289: @8324
3899 GIM_Try, /*On fail goto*//*Label 345*/ GIMT_Encode4(9387),
3900 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
3901 GIM_Try, /*On fail goto*//*Label 346*/ GIMT_Encode4(8409), // Rule ID 23416 //
3902 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3903 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
3904 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3905 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3906 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
3907 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3908 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3909 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3910 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
3911 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3912 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3913 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3914 // MIs[2] src
3915 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3916 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
3917 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3918 // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3919 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC64rr),
3920 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3921 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3922 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3923 GIR_RootConstrainSelectedInstOperands,
3924 // GIR_Coverage, 23416,
3925 GIR_EraseRootFromParent_Done,
3926 // Label 346: @8409
3927 GIM_Try, /*On fail goto*//*Label 347*/ GIMT_Encode4(8486), // Rule ID 23428 //
3928 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3929 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
3930 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3931 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3932 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
3933 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3934 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3935 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3936 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3937 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3938 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3939 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3940 // MIs[2] src
3941 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3942 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
3943 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3944 // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3945 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK64rr),
3946 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3947 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3948 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3949 GIR_RootConstrainSelectedInstOperands,
3950 // GIR_Coverage, 23428,
3951 GIR_EraseRootFromParent_Done,
3952 // Label 347: @8486
3953 GIM_Try, /*On fail goto*//*Label 348*/ GIMT_Encode4(8563), // Rule ID 15859 //
3954 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3955 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
3956 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3957 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3958 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3959 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3960 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3961 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3962 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3963 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3964 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
3965 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3966 // MIs[2] src
3967 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3968 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
3969 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3970 // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3971 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC64rr),
3972 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3973 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3974 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
3975 GIR_RootConstrainSelectedInstOperands,
3976 // GIR_Coverage, 15859,
3977 GIR_EraseRootFromParent_Done,
3978 // Label 348: @8563
3979 GIM_Try, /*On fail goto*//*Label 349*/ GIMT_Encode4(8640), // Rule ID 15871 //
3980 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
3981 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
3982 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3983 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3984 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
3985 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3986 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3987 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
3988 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
3989 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3990 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
3991 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3992 // MIs[2] src
3993 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3994 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
3995 GIM_CheckIsSafeToFold, /*NumInsns*/2,
3996 // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3997 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK64rr),
3998 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3999 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4000 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4001 GIR_RootConstrainSelectedInstOperands,
4002 // GIR_Coverage, 15871,
4003 GIR_EraseRootFromParent_Done,
4004 // Label 349: @8640
4005 GIM_Try, /*On fail goto*//*Label 350*/ GIMT_Encode4(8698), // Rule ID 23410 //
4006 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
4007 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4008 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4009 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
4010 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4011 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4012 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4013 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
4014 // MIs[0] src
4015 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
4016 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4017 // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4018 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL64rr),
4019 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4020 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4021 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4022 GIR_RootConstrainSelectedInstOperands,
4023 // GIR_Coverage, 23410,
4024 GIR_EraseRootFromParent_Done,
4025 // Label 350: @8698
4026 GIM_Try, /*On fail goto*//*Label 351*/ GIMT_Encode4(8807), // Rule ID 24468 //
4027 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4028 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4029 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4030 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL),
4031 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4032 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
4033 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
4034 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
4035 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4036 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4037 // (and:{ *:[i64] } (rotl:{ *:[i64] } -2:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
4038 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
4039 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
4040 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
4041 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4042 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4043 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
4044 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4045 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4046 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
4047 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
4048 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
4049 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
4050 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
4051 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR64rr),
4052 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4053 GIR_RootToRootCopy, /*OpIdx*/2, // src1
4054 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4055 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4056 GIR_RootConstrainSelectedInstOperands,
4057 // GIR_Coverage, 24468,
4058 GIR_EraseRootFromParent_Done,
4059 // Label 351: @8807
4060 GIM_Try, /*On fail goto*//*Label 352*/ GIMT_Encode4(8861), // Rule ID 15853 //
4061 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
4062 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4063 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4064 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4065 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4066 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
4067 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4068 // MIs[1] src
4069 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4070 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
4071 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4072 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4073 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL64rr),
4074 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4075 GIR_RootToRootCopy, /*OpIdx*/1, // src
4076 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4077 GIR_RootConstrainSelectedInstOperands,
4078 // GIR_Coverage, 15853,
4079 GIR_EraseRootFromParent_Done,
4080 // Label 352: @8861
4081 GIM_Try, /*On fail goto*//*Label 353*/ GIMT_Encode4(8970), // Rule ID 21197 //
4082 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4083 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4084 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4085 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4086 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL),
4087 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4088 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
4089 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
4090 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
4091 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4092 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (rotl:{ *:[i64] } -2:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
4093 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
4094 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
4095 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
4096 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4097 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4098 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
4099 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4100 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4101 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
4102 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
4103 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
4104 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
4105 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
4106 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR64rr),
4107 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4108 GIR_RootToRootCopy, /*OpIdx*/1, // src1
4109 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4110 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4111 GIR_RootConstrainSelectedInstOperands,
4112 // GIR_Coverage, 21197,
4113 GIR_EraseRootFromParent_Done,
4114 // Label 353: @8970
4115 GIM_Try, /*On fail goto*//*Label 354*/ GIMT_Encode4(9018), // Rule ID 21272 //
4116 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
4117 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4118 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4119 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4120 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4121 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4122 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
4123 // MIs[1] Operand 1
4124 // No operand predicates
4125 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4126 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (AND64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
4127 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND64ri32),
4128 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4129 GIR_RootToRootCopy, /*OpIdx*/1, // src1
4130 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
4131 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4132 GIR_RootConstrainSelectedInstOperands,
4133 // GIR_Coverage, 21272,
4134 GIR_EraseRootFromParent_Done,
4135 // Label 354: @9018
4136 GIM_Try, /*On fail goto*//*Label 355*/ GIMT_Encode4(9066), // Rule ID 21362 //
4137 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
4138 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4139 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4140 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4141 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4142 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4143 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
4144 // MIs[1] Operand 1
4145 // No operand predicates
4146 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4147 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (AND64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
4148 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND64ri32_ND),
4149 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4150 GIR_RootToRootCopy, /*OpIdx*/1, // src1
4151 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
4152 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4153 GIR_RootConstrainSelectedInstOperands,
4154 // GIR_Coverage, 21362,
4155 GIR_EraseRootFromParent_Done,
4156 // Label 355: @9066
4157 GIM_Try, /*On fail goto*//*Label 356*/ GIMT_Encode4(9128), // Rule ID 16047 //
4158 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR),
4159 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4160 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4161 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4162 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4163 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4164 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4165 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4166 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
4167 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4168 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4169 // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
4170 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr),
4171 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4172 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4173 GIR_RootToRootCopy, /*OpIdx*/2, // src2
4174 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4175 GIR_RootConstrainSelectedInstOperands,
4176 // GIR_Coverage, 16047,
4177 GIR_EraseRootFromParent_Done,
4178 // Label 356: @9128
4179 GIM_Try, /*On fail goto*//*Label 357*/ GIMT_Encode4(9190), // Rule ID 16051 //
4180 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR),
4181 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4182 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4183 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4184 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4185 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4186 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4187 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4188 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
4189 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4190 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4191 // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr_EVEX:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
4192 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr_EVEX),
4193 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4194 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4195 GIR_RootToRootCopy, /*OpIdx*/2, // src2
4196 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4197 GIR_RootConstrainSelectedInstOperands,
4198 // GIR_Coverage, 16051,
4199 GIR_EraseRootFromParent_Done,
4200 // Label 357: @9190
4201 GIM_Try, /*On fail goto*//*Label 358*/ GIMT_Encode4(9252), // Rule ID 23522 //
4202 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR),
4203 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4204 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4205 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4206 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4207 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4208 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4209 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4210 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4211 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
4212 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4213 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
4214 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr),
4215 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4216 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4217 GIR_RootToRootCopy, /*OpIdx*/1, // src2
4218 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4219 GIR_RootConstrainSelectedInstOperands,
4220 // GIR_Coverage, 23522,
4221 GIR_EraseRootFromParent_Done,
4222 // Label 358: @9252
4223 GIM_Try, /*On fail goto*//*Label 359*/ GIMT_Encode4(9314), // Rule ID 23526 //
4224 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR),
4225 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4226 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4227 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4228 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4229 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4230 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4231 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4232 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4233 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
4234 GIM_CheckIsSafeToFold, /*NumInsns*/1,
4235 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr_EVEX:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
4236 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr_EVEX),
4237 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4238 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4239 GIR_RootToRootCopy, /*OpIdx*/1, // src2
4240 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
4241 GIR_RootConstrainSelectedInstOperands,
4242 // GIR_Coverage, 23526,
4243 GIR_EraseRootFromParent_Done,
4244 // Label 359: @9314
4245 GIM_Try, /*On fail goto*//*Label 360*/ GIMT_Encode4(9350), // Rule ID 21264 //
4246 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
4247 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4248 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4249 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4250 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4251 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
4252 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND64rr),
4253 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
4254 GIR_RootConstrainSelectedInstOperands,
4255 // GIR_Coverage, 21264,
4256 GIR_Done,
4257 // Label 360: @9350
4258 GIM_Try, /*On fail goto*//*Label 361*/ GIMT_Encode4(9386), // Rule ID 21354 //
4259 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
4260 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4261 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4262 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4263 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
4264 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
4265 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND64rr_ND),
4266 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
4267 GIR_RootConstrainSelectedInstOperands,
4268 // GIR_Coverage, 21354,
4269 GIR_Done,
4270 // Label 361: @9386
4271 GIM_Reject,
4272 // Label 345: @9387
4273 GIM_Reject,
4274 // Label 290: @9388
4275 GIM_Try, /*On fail goto*//*Label 362*/ GIMT_Encode4(9715),
4276 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1,
4277 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s1,
4278 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
4279 GIM_Try, /*On fail goto*//*Label 363*/ GIMT_Encode4(9517), // Rule ID 18023 //
4280 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4281 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4282 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1,
4283 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1,
4284 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
4285 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4286 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4287 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4288 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
4289 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4290 // (and:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] }), VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
4291 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4292 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4293 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4294 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4295 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4296 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4297 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4298 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4299 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4300 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4301 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4302 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4303 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4304 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4305 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4306 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4307 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4308 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4309 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4310 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
4311 // GIR_Coverage, 18023,
4312 GIR_EraseRootFromParent_Done,
4313 // Label 363: @9517
4314 GIM_Try, /*On fail goto*//*Label 364*/ GIMT_Encode4(9631), // Rule ID 23788 //
4315 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
4316 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4317 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4318 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1,
4319 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1,
4320 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
4321 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4322 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4323 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4324 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4325 // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src2, (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] })) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
4326 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4327 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4328 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4329 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4330 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4331 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
4332 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4333 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4334 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4335 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4336 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4337 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4338 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4339 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4340 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4341 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4342 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4343 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4344 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4345 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
4346 // GIR_Coverage, 23788,
4347 GIR_EraseRootFromParent_Done,
4348 // Label 364: @9631
4349 GIM_Try, /*On fail goto*//*Label 365*/ GIMT_Encode4(9714), // Rule ID 18019 //
4350 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
4351 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
4352 // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
4353 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4354 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4355 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4356 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4357 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4358 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4359 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4360 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4361 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4362 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
4363 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4364 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWrr),
4365 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4366 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4367 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4368 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4369 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4370 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4371 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4372 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
4373 // GIR_Coverage, 18019,
4374 GIR_EraseRootFromParent_Done,
4375 // Label 365: @9714
4376 GIM_Reject,
4377 // Label 362: @9715
4378 GIM_Reject,
4379 // Label 291: @9716
4380 GIM_Try, /*On fail goto*//*Label 366*/ GIMT_Encode4(9809),
4381 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
4382 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4383 GIM_Try, /*On fail goto*//*Label 367*/ GIMT_Encode4(9754), // Rule ID 2098 //
4384 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
4385 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4386 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4387 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4388 // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
4389 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr),
4390 GIR_RootConstrainSelectedInstOperands,
4391 // GIR_Coverage, 2098,
4392 GIR_Done,
4393 // Label 367: @9754
4394 GIM_Try, /*On fail goto*//*Label 368*/ GIMT_Encode4(9781), // Rule ID 2100 //
4395 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
4396 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4397 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4398 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4399 // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
4400 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr),
4401 GIR_RootConstrainSelectedInstOperands,
4402 // GIR_Coverage, 2100,
4403 GIR_Done,
4404 // Label 368: @9781
4405 GIM_Try, /*On fail goto*//*Label 369*/ GIMT_Encode4(9808), // Rule ID 5656 //
4406 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
4407 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4408 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4409 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4410 // (and:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPANDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
4411 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ128rr),
4412 GIR_RootConstrainSelectedInstOperands,
4413 // GIR_Coverage, 5656,
4414 GIR_Done,
4415 // Label 369: @9808
4416 GIM_Reject,
4417 // Label 366: @9809
4418 GIM_Reject,
4419 // Label 292: @9810
4420 GIM_Try, /*On fail goto*//*Label 370*/ GIMT_Encode4(10137),
4421 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1,
4422 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s1,
4423 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
4424 GIM_Try, /*On fail goto*//*Label 371*/ GIMT_Encode4(9939), // Rule ID 18024 //
4425 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4426 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4427 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1,
4428 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1,
4429 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
4430 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4431 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4432 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4433 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
4434 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4435 // (and:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] }), VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
4436 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4437 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4438 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4439 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4440 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4441 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4442 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4443 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4444 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4445 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4446 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4447 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4448 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4449 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4450 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4451 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4452 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4453 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4454 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4455 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
4456 // GIR_Coverage, 18024,
4457 GIR_EraseRootFromParent_Done,
4458 // Label 371: @9939
4459 GIM_Try, /*On fail goto*//*Label 372*/ GIMT_Encode4(10053), // Rule ID 23789 //
4460 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
4461 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4462 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4463 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1,
4464 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1,
4465 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
4466 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4467 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4468 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4469 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4470 // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src2, (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] })) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
4471 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4472 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4473 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4474 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4475 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4476 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
4477 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4478 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4479 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4480 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4481 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4482 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4483 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4484 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4485 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4486 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4487 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4488 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4489 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4490 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
4491 // GIR_Coverage, 23789,
4492 GIR_EraseRootFromParent_Done,
4493 // Label 372: @10053
4494 GIM_Try, /*On fail goto*//*Label 373*/ GIMT_Encode4(10136), // Rule ID 18020 //
4495 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
4496 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
4497 // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
4498 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4499 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4500 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4501 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4502 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4503 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4504 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4505 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4506 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4507 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
4508 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4509 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWrr),
4510 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4511 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4512 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4513 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4514 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4515 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4516 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4517 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
4518 // GIR_Coverage, 18020,
4519 GIR_EraseRootFromParent_Done,
4520 // Label 373: @10136
4521 GIM_Reject,
4522 // Label 370: @10137
4523 GIM_Reject,
4524 // Label 293: @10138
4525 GIM_Try, /*On fail goto*//*Label 374*/ GIMT_Encode4(10231),
4526 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
4527 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
4528 GIM_Try, /*On fail goto*//*Label 375*/ GIMT_Encode4(10176), // Rule ID 5683 //
4529 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
4530 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4531 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4532 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4533 // (and:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPANDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
4534 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDDZ128rr),
4535 GIR_RootConstrainSelectedInstOperands,
4536 // GIR_Coverage, 5683,
4537 GIR_Done,
4538 // Label 375: @10176
4539 GIM_Try, /*On fail goto*//*Label 376*/ GIMT_Encode4(10203), // Rule ID 16658 //
4540 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
4541 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4542 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4543 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4544 // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
4545 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr),
4546 GIR_RootConstrainSelectedInstOperands,
4547 // GIR_Coverage, 16658,
4548 GIR_Done,
4549 // Label 376: @10203
4550 GIM_Try, /*On fail goto*//*Label 377*/ GIMT_Encode4(10230), // Rule ID 16682 //
4551 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
4552 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4553 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4554 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4555 // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
4556 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr),
4557 GIR_RootConstrainSelectedInstOperands,
4558 // GIR_Coverage, 16682,
4559 GIR_Done,
4560 // Label 377: @10230
4561 GIM_Reject,
4562 // Label 374: @10231
4563 GIM_Reject,
4564 // Label 294: @10232
4565 GIM_Try, /*On fail goto*//*Label 378*/ GIMT_Encode4(10325),
4566 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
4567 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
4568 GIM_Try, /*On fail goto*//*Label 379*/ GIMT_Encode4(10270), // Rule ID 2102 //
4569 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
4570 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4571 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4572 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4573 // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPANDYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
4574 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr),
4575 GIR_RootConstrainSelectedInstOperands,
4576 // GIR_Coverage, 2102,
4577 GIR_Done,
4578 // Label 379: @10270
4579 GIM_Try, /*On fail goto*//*Label 380*/ GIMT_Encode4(10297), // Rule ID 5647 //
4580 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
4581 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4582 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4583 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4584 // (and:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPANDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
4585 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ256rr),
4586 GIR_RootConstrainSelectedInstOperands,
4587 // GIR_Coverage, 5647,
4588 GIR_Done,
4589 // Label 380: @10297
4590 GIM_Try, /*On fail goto*//*Label 381*/ GIMT_Encode4(10324), // Rule ID 16627 //
4591 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
4592 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4593 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4594 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4595 // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VANDPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
4596 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr),
4597 GIR_RootConstrainSelectedInstOperands,
4598 // GIR_Coverage, 16627,
4599 GIR_Done,
4600 // Label 381: @10324
4601 GIM_Reject,
4602 // Label 378: @10325
4603 GIM_Reject,
4604 // Label 295: @10326
4605 GIM_Try, /*On fail goto*//*Label 382*/ GIMT_Encode4(10805),
4606 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
4607 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1,
4608 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4609 GIM_Try, /*On fail goto*//*Label 383*/ GIMT_Encode4(10401), // Rule ID 4383 //
4610 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
4611 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4612 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4613 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
4614 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
4615 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4616 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4617 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4618 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4619 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4620 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4621 // (and:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (KANDNBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
4622 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNBrr),
4623 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4624 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4625 GIR_RootToRootCopy, /*OpIdx*/2, // src2
4626 GIR_RootConstrainSelectedInstOperands,
4627 // GIR_Coverage, 4383,
4628 GIR_EraseRootFromParent_Done,
4629 // Label 383: @10401
4630 GIM_Try, /*On fail goto*//*Label 384*/ GIMT_Encode4(10518), // Rule ID 18021 //
4631 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
4632 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4633 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4634 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
4635 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
4636 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4637 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4638 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4639 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4640 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4641 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4642 // (and:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
4643 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4644 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4645 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4646 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4647 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4648 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4649 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4650 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4651 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4652 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4653 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4654 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4655 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4656 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4657 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4658 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4659 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4660 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4661 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4662 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
4663 // GIR_Coverage, 18021,
4664 GIR_EraseRootFromParent_Done,
4665 // Label 384: @10518
4666 GIM_Try, /*On fail goto*//*Label 385*/ GIMT_Encode4(10578), // Rule ID 22112 //
4667 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
4668 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4669 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4670 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4671 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
4672 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
4673 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4674 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4675 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4676 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4677 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4678 // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (KANDNBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
4679 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNBrr),
4680 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4681 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4682 GIR_RootToRootCopy, /*OpIdx*/1, // src2
4683 GIR_RootConstrainSelectedInstOperands,
4684 // GIR_Coverage, 22112,
4685 GIR_EraseRootFromParent_Done,
4686 // Label 385: @10578
4687 GIM_Try, /*On fail goto*//*Label 386*/ GIMT_Encode4(10695), // Rule ID 23786 //
4688 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
4689 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4690 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4691 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4692 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
4693 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
4694 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4695 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4696 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4697 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4698 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4699 // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
4700 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4701 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4702 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4703 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4704 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4705 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
4706 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4707 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4708 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4709 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4710 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4711 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4712 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4713 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4714 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4715 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4716 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4717 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4718 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4719 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
4720 // GIR_Coverage, 23786,
4721 GIR_EraseRootFromParent_Done,
4722 // Label 386: @10695
4723 GIM_Try, /*On fail goto*//*Label 387*/ GIMT_Encode4(10718), // Rule ID 4367 //
4724 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
4725 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4726 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4727 // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KANDBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
4728 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDBrr),
4729 GIR_RootConstrainSelectedInstOperands,
4730 // GIR_Coverage, 4367,
4731 GIR_Done,
4732 // Label 387: @10718
4733 GIM_Try, /*On fail goto*//*Label 388*/ GIMT_Encode4(10804), // Rule ID 18017 //
4734 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
4735 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4736 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
4737 // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
4738 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4739 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4740 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4741 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4742 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4743 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4744 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4745 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4746 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4747 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
4748 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4749 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWrr),
4750 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4751 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
4752 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
4753 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4754 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4755 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4756 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
4757 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
4758 // GIR_Coverage, 18017,
4759 GIR_EraseRootFromParent_Done,
4760 // Label 388: @10804
4761 GIM_Reject,
4762 // Label 382: @10805
4763 GIM_Reject,
4764 // Label 296: @10806
4765 GIM_Try, /*On fail goto*//*Label 389*/ GIMT_Encode4(10899),
4766 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
4767 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
4768 GIM_Try, /*On fail goto*//*Label 390*/ GIMT_Encode4(10844), // Rule ID 16657 //
4769 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
4770 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4771 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4772 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4773 // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
4774 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr),
4775 GIR_RootConstrainSelectedInstOperands,
4776 // GIR_Coverage, 16657,
4777 GIR_Done,
4778 // Label 390: @10844
4779 GIM_Try, /*On fail goto*//*Label 391*/ GIMT_Encode4(10871), // Rule ID 16681 //
4780 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
4781 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4782 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4783 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4784 // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
4785 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr),
4786 GIR_RootConstrainSelectedInstOperands,
4787 // GIR_Coverage, 16681,
4788 GIR_Done,
4789 // Label 391: @10871
4790 GIM_Try, /*On fail goto*//*Label 392*/ GIMT_Encode4(10898), // Rule ID 18597 //
4791 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
4792 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4793 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4794 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4795 // (and:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPANDQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
4796 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ128rr),
4797 GIR_RootConstrainSelectedInstOperands,
4798 // GIR_Coverage, 18597,
4799 GIR_Done,
4800 // Label 392: @10898
4801 GIM_Reject,
4802 // Label 389: @10899
4803 GIM_Reject,
4804 // Label 297: @10900
4805 GIM_Try, /*On fail goto*//*Label 393*/ GIMT_Encode4(10993),
4806 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
4807 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
4808 GIM_Try, /*On fail goto*//*Label 394*/ GIMT_Encode4(10938), // Rule ID 5674 //
4809 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
4810 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4811 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4812 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4813 // (and:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPANDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
4814 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDDZ256rr),
4815 GIR_RootConstrainSelectedInstOperands,
4816 // GIR_Coverage, 5674,
4817 GIR_Done,
4818 // Label 394: @10938
4819 GIM_Try, /*On fail goto*//*Label 395*/ GIMT_Encode4(10965), // Rule ID 16602 //
4820 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
4821 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4822 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4823 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4824 // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPANDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
4825 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr),
4826 GIR_RootConstrainSelectedInstOperands,
4827 // GIR_Coverage, 16602,
4828 GIR_Done,
4829 // Label 395: @10965
4830 GIM_Try, /*On fail goto*//*Label 396*/ GIMT_Encode4(10992), // Rule ID 16626 //
4831 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
4832 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4833 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4834 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4835 // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VANDPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
4836 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr),
4837 GIR_RootConstrainSelectedInstOperands,
4838 // GIR_Coverage, 16626,
4839 GIR_Done,
4840 // Label 396: @10992
4841 GIM_Reject,
4842 // Label 393: @10993
4843 GIM_Reject,
4844 // Label 298: @10994
4845 GIM_Try, /*On fail goto*//*Label 397*/ GIMT_Encode4(11027), // Rule ID 5638 //
4846 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
4847 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
4848 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
4849 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
4850 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
4851 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
4852 // (and:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPANDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
4853 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZrr),
4854 GIR_RootConstrainSelectedInstOperands,
4855 // GIR_Coverage, 5638,
4856 GIR_Done,
4857 // Label 397: @11027
4858 GIM_Reject,
4859 // Label 299: @11028
4860 GIM_Try, /*On fail goto*//*Label 398*/ GIMT_Encode4(11187),
4861 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
4862 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1,
4863 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
4864 GIM_Try, /*On fail goto*//*Label 399*/ GIMT_Encode4(11103), // Rule ID 4384 //
4865 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
4866 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4867 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4868 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
4869 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1,
4870 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
4871 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4872 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4873 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4874 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
4875 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4876 // (and:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] }), VK16:{ *:[v16i1] }:$src2) => (KANDNWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
4877 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4878 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4879 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4880 GIR_RootToRootCopy, /*OpIdx*/2, // src2
4881 GIR_RootConstrainSelectedInstOperands,
4882 // GIR_Coverage, 4384,
4883 GIR_EraseRootFromParent_Done,
4884 // Label 399: @11103
4885 GIM_Try, /*On fail goto*//*Label 400*/ GIMT_Encode4(11163), // Rule ID 22113 //
4886 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
4887 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
4888 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4889 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
4890 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
4891 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1,
4892 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
4893 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4894 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4895 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
4896 GIM_CheckIsSafeToFold, /*NumInsns*/2,
4897 // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src2, (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] })) => (KANDNWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
4898 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNWrr),
4899 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4900 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
4901 GIR_RootToRootCopy, /*OpIdx*/1, // src2
4902 GIR_RootConstrainSelectedInstOperands,
4903 // GIR_Coverage, 22113,
4904 GIR_EraseRootFromParent_Done,
4905 // Label 400: @11163
4906 GIM_Try, /*On fail goto*//*Label 401*/ GIMT_Encode4(11186), // Rule ID 4368 //
4907 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
4908 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
4909 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
4910 // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KANDWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
4911 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDWrr),
4912 GIR_RootConstrainSelectedInstOperands,
4913 // GIR_Coverage, 4368,
4914 GIR_Done,
4915 // Label 401: @11186
4916 GIM_Reject,
4917 // Label 398: @11187
4918 GIM_Reject,
4919 // Label 300: @11188
4920 GIM_Try, /*On fail goto*//*Label 402*/ GIMT_Encode4(11281),
4921 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
4922 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4923 GIM_Try, /*On fail goto*//*Label 403*/ GIMT_Encode4(11226), // Rule ID 16656 //
4924 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
4925 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4926 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4927 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4928 // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
4929 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr),
4930 GIR_RootConstrainSelectedInstOperands,
4931 // GIR_Coverage, 16656,
4932 GIR_Done,
4933 // Label 403: @11226
4934 GIM_Try, /*On fail goto*//*Label 404*/ GIMT_Encode4(11253), // Rule ID 16680 //
4935 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
4936 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4937 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4938 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
4939 // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
4940 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr),
4941 GIR_RootConstrainSelectedInstOperands,
4942 // GIR_Coverage, 16680,
4943 GIR_Done,
4944 // Label 404: @11253
4945 GIM_Try, /*On fail goto*//*Label 405*/ GIMT_Encode4(11280), // Rule ID 18596 //
4946 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
4947 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4948 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4949 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
4950 // (and:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPANDQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
4951 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ128rr),
4952 GIR_RootConstrainSelectedInstOperands,
4953 // GIR_Coverage, 18596,
4954 GIR_Done,
4955 // Label 405: @11280
4956 GIM_Reject,
4957 // Label 402: @11281
4958 GIM_Reject,
4959 // Label 301: @11282
4960 GIM_Try, /*On fail goto*//*Label 406*/ GIMT_Encode4(11375),
4961 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
4962 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
4963 GIM_Try, /*On fail goto*//*Label 407*/ GIMT_Encode4(11320), // Rule ID 16601 //
4964 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
4965 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4966 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4967 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4968 // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPANDYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
4969 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr),
4970 GIR_RootConstrainSelectedInstOperands,
4971 // GIR_Coverage, 16601,
4972 GIR_Done,
4973 // Label 407: @11320
4974 GIM_Try, /*On fail goto*//*Label 408*/ GIMT_Encode4(11347), // Rule ID 16625 //
4975 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
4976 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4977 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4978 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
4979 // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VANDPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
4980 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr),
4981 GIR_RootConstrainSelectedInstOperands,
4982 // GIR_Coverage, 16625,
4983 GIR_Done,
4984 // Label 408: @11347
4985 GIM_Try, /*On fail goto*//*Label 409*/ GIMT_Encode4(11374), // Rule ID 18613 //
4986 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
4987 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4988 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4989 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
4990 // (and:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPANDQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
4991 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ256rr),
4992 GIR_RootConstrainSelectedInstOperands,
4993 // GIR_Coverage, 18613,
4994 GIR_Done,
4995 // Label 409: @11374
4996 GIM_Reject,
4997 // Label 406: @11375
4998 GIM_Reject,
4999 // Label 302: @11376
5000 GIM_Try, /*On fail goto*//*Label 410*/ GIMT_Encode4(11409), // Rule ID 5665 //
5001 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
5002 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
5003 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
5004 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5005 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5006 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5007 // (and:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPANDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
5008 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDDZrr),
5009 GIR_RootConstrainSelectedInstOperands,
5010 // GIR_Coverage, 5665,
5011 GIR_Done,
5012 // Label 410: @11409
5013 GIM_Reject,
5014 // Label 303: @11410
5015 GIM_Try, /*On fail goto*//*Label 411*/ GIMT_Encode4(11569),
5016 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
5017 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1,
5018 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
5019 GIM_Try, /*On fail goto*//*Label 412*/ GIMT_Encode4(11485), // Rule ID 4385 //
5020 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
5021 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5022 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5023 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1,
5024 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1,
5025 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
5026 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
5027 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
5028 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
5029 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
5030 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5031 // (and:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] }), VK32:{ *:[v32i1] }:$src2) => (KANDNDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
5032 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNDrr),
5033 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5034 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
5035 GIR_RootToRootCopy, /*OpIdx*/2, // src2
5036 GIR_RootConstrainSelectedInstOperands,
5037 // GIR_Coverage, 4385,
5038 GIR_EraseRootFromParent_Done,
5039 // Label 412: @11485
5040 GIM_Try, /*On fail goto*//*Label 413*/ GIMT_Encode4(11545), // Rule ID 22114 //
5041 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
5042 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
5043 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5044 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5045 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1,
5046 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1,
5047 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
5048 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
5049 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
5050 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
5051 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5052 // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src2, (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] })) => (KANDNDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
5053 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNDrr),
5054 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5055 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
5056 GIR_RootToRootCopy, /*OpIdx*/1, // src2
5057 GIR_RootConstrainSelectedInstOperands,
5058 // GIR_Coverage, 22114,
5059 GIR_EraseRootFromParent_Done,
5060 // Label 413: @11545
5061 GIM_Try, /*On fail goto*//*Label 414*/ GIMT_Encode4(11568), // Rule ID 4369 //
5062 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
5063 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
5064 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
5065 // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KANDDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
5066 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDDrr),
5067 GIR_RootConstrainSelectedInstOperands,
5068 // GIR_Coverage, 4369,
5069 GIR_Done,
5070 // Label 414: @11568
5071 GIM_Reject,
5072 // Label 411: @11569
5073 GIM_Reject,
5074 // Label 304: @11570
5075 GIM_Try, /*On fail goto*//*Label 415*/ GIMT_Encode4(11663),
5076 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
5077 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
5078 GIM_Try, /*On fail goto*//*Label 416*/ GIMT_Encode4(11608), // Rule ID 16600 //
5079 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
5080 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
5081 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
5082 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
5083 // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPANDYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
5084 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr),
5085 GIR_RootConstrainSelectedInstOperands,
5086 // GIR_Coverage, 16600,
5087 GIR_Done,
5088 // Label 416: @11608
5089 GIM_Try, /*On fail goto*//*Label 417*/ GIMT_Encode4(11635), // Rule ID 16624 //
5090 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
5091 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
5092 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
5093 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
5094 // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VANDPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
5095 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr),
5096 GIR_RootConstrainSelectedInstOperands,
5097 // GIR_Coverage, 16624,
5098 GIR_Done,
5099 // Label 417: @11635
5100 GIM_Try, /*On fail goto*//*Label 418*/ GIMT_Encode4(11662), // Rule ID 18612 //
5101 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
5102 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
5103 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
5104 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
5105 // (and:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPANDQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
5106 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ256rr),
5107 GIR_RootConstrainSelectedInstOperands,
5108 // GIR_Coverage, 18612,
5109 GIR_Done,
5110 // Label 418: @11662
5111 GIM_Reject,
5112 // Label 415: @11663
5113 GIM_Reject,
5114 // Label 305: @11664
5115 GIM_Try, /*On fail goto*//*Label 419*/ GIMT_Encode4(11697), // Rule ID 18629 //
5116 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
5117 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
5118 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
5119 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5120 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5121 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5122 // (and:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPANDQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
5123 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZrr),
5124 GIR_RootConstrainSelectedInstOperands,
5125 // GIR_Coverage, 18629,
5126 GIR_Done,
5127 // Label 419: @11697
5128 GIM_Reject,
5129 // Label 306: @11698
5130 GIM_Try, /*On fail goto*//*Label 420*/ GIMT_Encode4(11857),
5131 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1,
5132 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s1,
5133 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
5134 GIM_Try, /*On fail goto*//*Label 421*/ GIMT_Encode4(11773), // Rule ID 4386 //
5135 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
5136 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5137 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5138 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1,
5139 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1,
5140 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
5141 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
5142 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
5143 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
5144 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
5145 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5146 // (and:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] }), VK64:{ *:[v64i1] }:$src2) => (KANDNQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
5147 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNQrr),
5148 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5149 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
5150 GIR_RootToRootCopy, /*OpIdx*/2, // src2
5151 GIR_RootConstrainSelectedInstOperands,
5152 // GIR_Coverage, 4386,
5153 GIR_EraseRootFromParent_Done,
5154 // Label 421: @11773
5155 GIM_Try, /*On fail goto*//*Label 422*/ GIMT_Encode4(11833), // Rule ID 22115 //
5156 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
5157 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
5158 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5159 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5160 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1,
5161 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1,
5162 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
5163 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
5164 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
5165 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
5166 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5167 // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src2, (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] })) => (KANDNQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
5168 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNQrr),
5169 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5170 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
5171 GIR_RootToRootCopy, /*OpIdx*/1, // src2
5172 GIR_RootConstrainSelectedInstOperands,
5173 // GIR_Coverage, 22115,
5174 GIR_EraseRootFromParent_Done,
5175 // Label 422: @11833
5176 GIM_Try, /*On fail goto*//*Label 423*/ GIMT_Encode4(11856), // Rule ID 4370 //
5177 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
5178 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
5179 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
5180 // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KANDQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
5181 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDQrr),
5182 GIR_RootConstrainSelectedInstOperands,
5183 // GIR_Coverage, 4370,
5184 GIR_Done,
5185 // Label 423: @11856
5186 GIM_Reject,
5187 // Label 420: @11857
5188 GIM_Reject,
5189 // Label 307: @11858
5190 GIM_Try, /*On fail goto*//*Label 424*/ GIMT_Encode4(11891), // Rule ID 18628 //
5191 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
5192 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
5193 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
5194 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5195 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5196 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
5197 // (and:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPANDQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
5198 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZrr),
5199 GIR_RootConstrainSelectedInstOperands,
5200 // GIR_Coverage, 18628,
5201 GIR_Done,
5202 // Label 424: @11891
5203 GIM_Reject,
5204 // Label 308: @11892
5205 GIM_Reject,
5206 // Label 4: @11893
5207 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(25), /*)*//*default:*//*Label 448*/ GIMT_Encode4(16260),
5208 /*GILLT_s1*//*Label 425*/ GIMT_Encode4(12004),
5209 /*GILLT_s8*//*Label 426*/ GIMT_Encode4(12098),
5210 /*GILLT_s16*//*Label 427*/ GIMT_Encode4(12235),
5211 /*GILLT_s32*//*Label 428*/ GIMT_Encode4(12588),
5212 /*GILLT_s64*//*Label 429*/ GIMT_Encode4(13772), GIMT_Encode4(0), GIMT_Encode4(0),
5213 /*GILLT_v2s1*//*Label 430*/ GIMT_Encode4(14964),
5214 /*GILLT_v2s64*//*Label 431*/ GIMT_Encode4(15058),
5215 /*GILLT_v4s1*//*Label 432*/ GIMT_Encode4(15152),
5216 /*GILLT_v4s32*//*Label 433*/ GIMT_Encode4(15246),
5217 /*GILLT_v4s64*//*Label 434*/ GIMT_Encode4(15340),
5218 /*GILLT_v8s1*//*Label 435*/ GIMT_Encode4(15434),
5219 /*GILLT_v8s16*//*Label 436*/ GIMT_Encode4(15552),
5220 /*GILLT_v8s32*//*Label 437*/ GIMT_Encode4(15646),
5221 /*GILLT_v8s64*//*Label 438*/ GIMT_Encode4(15740),
5222 /*GILLT_v16s1*//*Label 439*/ GIMT_Encode4(15774),
5223 /*GILLT_v16s8*//*Label 440*/ GIMT_Encode4(15808),
5224 /*GILLT_v16s16*//*Label 441*/ GIMT_Encode4(15902),
5225 /*GILLT_v16s32*//*Label 442*/ GIMT_Encode4(15996),
5226 /*GILLT_v32s1*//*Label 443*/ GIMT_Encode4(16030),
5227 /*GILLT_v32s8*//*Label 444*/ GIMT_Encode4(16064),
5228 /*GILLT_v32s16*//*Label 445*/ GIMT_Encode4(16158),
5229 /*GILLT_v64s1*//*Label 446*/ GIMT_Encode4(16192),
5230 /*GILLT_v64s8*//*Label 447*/ GIMT_Encode4(16226),
5231 // Label 425: @12004
5232 GIM_Try, /*On fail goto*//*Label 449*/ GIMT_Encode4(12097), // Rule ID 18026 //
5233 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s1,
5234 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s1,
5235 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
5236 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
5237 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
5238 // (or:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
5239 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
5240 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
5241 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
5242 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5243 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5244 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
5245 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
5246 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5247 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5248 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
5249 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5250 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWrr),
5251 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5252 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
5253 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
5254 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5255 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5256 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5257 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5258 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
5259 // GIR_Coverage, 18026,
5260 GIR_EraseRootFromParent_Done,
5261 // Label 449: @12097
5262 GIM_Reject,
5263 // Label 426: @12098
5264 GIM_Try, /*On fail goto*//*Label 450*/ GIMT_Encode4(12234),
5265 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
5266 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
5267 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5268 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5269 GIM_Try, /*On fail goto*//*Label 451*/ GIMT_Encode4(12150), // Rule ID 21245 //
5270 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
5271 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5272 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5273 // MIs[1] Operand 1
5274 // No operand predicates
5275 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5276 // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
5277 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR8ri),
5278 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5279 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5280 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5281 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5282 GIR_RootConstrainSelectedInstOperands,
5283 // GIR_Coverage, 21245,
5284 GIR_EraseRootFromParent_Done,
5285 // Label 451: @12150
5286 GIM_Try, /*On fail goto*//*Label 452*/ GIMT_Encode4(12183), // Rule ID 21335 //
5287 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
5288 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5289 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5290 // MIs[1] Operand 1
5291 // No operand predicates
5292 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5293 // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
5294 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR8ri_ND),
5295 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5296 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5297 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5298 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5299 GIR_RootConstrainSelectedInstOperands,
5300 // GIR_Coverage, 21335,
5301 GIR_EraseRootFromParent_Done,
5302 // Label 452: @12183
5303 GIM_Try, /*On fail goto*//*Label 453*/ GIMT_Encode4(12208), // Rule ID 21237 //
5304 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
5305 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5306 // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
5307 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR8rr),
5308 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
5309 GIR_RootConstrainSelectedInstOperands,
5310 // GIR_Coverage, 21237,
5311 GIR_Done,
5312 // Label 453: @12208
5313 GIM_Try, /*On fail goto*//*Label 454*/ GIMT_Encode4(12233), // Rule ID 21327 //
5314 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
5315 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5316 // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
5317 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR8rr_ND),
5318 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
5319 GIR_RootConstrainSelectedInstOperands,
5320 // GIR_Coverage, 21327,
5321 GIR_Done,
5322 // Label 454: @12233
5323 GIM_Reject,
5324 // Label 450: @12234
5325 GIM_Reject,
5326 // Label 427: @12235
5327 GIM_Try, /*On fail goto*//*Label 455*/ GIMT_Encode4(12587),
5328 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
5329 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
5330 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5331 GIM_Try, /*On fail goto*//*Label 456*/ GIMT_Encode4(12352), // Rule ID 24457 //
5332 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5333 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
5334 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
5335 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
5336 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
5337 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5338 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5339 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5340 // (or:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
5341 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
5342 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
5343 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
5344 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5345 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5346 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
5347 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5348 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
5349 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
5350 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
5351 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
5352 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
5353 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
5354 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS16rr),
5355 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5356 GIR_RootToRootCopy, /*OpIdx*/2, // src1
5357 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5358 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5359 GIR_RootConstrainSelectedInstOperands,
5360 // GIR_Coverage, 24457,
5361 GIR_EraseRootFromParent_Done,
5362 // Label 456: @12352
5363 GIM_Try, /*On fail goto*//*Label 457*/ GIMT_Encode4(12454), // Rule ID 21186 //
5364 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5365 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5366 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
5367 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
5368 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
5369 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
5370 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5371 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5372 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
5373 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
5374 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
5375 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
5376 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5377 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5378 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
5379 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5380 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
5381 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
5382 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
5383 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
5384 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
5385 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
5386 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS16rr),
5387 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5388 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5389 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5390 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5391 GIR_RootConstrainSelectedInstOperands,
5392 // GIR_Coverage, 21186,
5393 GIR_EraseRootFromParent_Done,
5394 // Label 457: @12454
5395 GIM_Try, /*On fail goto*//*Label 458*/ GIMT_Encode4(12491), // Rule ID 21246 //
5396 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
5397 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5398 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5399 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5400 // MIs[1] Operand 1
5401 // No operand predicates
5402 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5403 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
5404 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR16ri),
5405 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5406 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5407 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5408 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5409 GIR_RootConstrainSelectedInstOperands,
5410 // GIR_Coverage, 21246,
5411 GIR_EraseRootFromParent_Done,
5412 // Label 458: @12491
5413 GIM_Try, /*On fail goto*//*Label 459*/ GIMT_Encode4(12528), // Rule ID 21336 //
5414 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
5415 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5416 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5417 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5418 // MIs[1] Operand 1
5419 // No operand predicates
5420 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5421 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
5422 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR16ri_ND),
5423 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5424 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5425 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5426 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5427 GIR_RootConstrainSelectedInstOperands,
5428 // GIR_Coverage, 21336,
5429 GIR_EraseRootFromParent_Done,
5430 // Label 459: @12528
5431 GIM_Try, /*On fail goto*//*Label 460*/ GIMT_Encode4(12557), // Rule ID 21238 //
5432 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
5433 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5434 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5435 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
5436 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR16rr),
5437 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
5438 GIR_RootConstrainSelectedInstOperands,
5439 // GIR_Coverage, 21238,
5440 GIR_Done,
5441 // Label 460: @12557
5442 GIM_Try, /*On fail goto*//*Label 461*/ GIMT_Encode4(12586), // Rule ID 21328 //
5443 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
5444 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5445 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
5446 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
5447 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR16rr_ND),
5448 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
5449 GIR_RootConstrainSelectedInstOperands,
5450 // GIR_Coverage, 21328,
5451 GIR_Done,
5452 // Label 461: @12586
5453 GIM_Reject,
5454 // Label 455: @12587
5455 GIM_Reject,
5456 // Label 428: @12588
5457 GIM_Try, /*On fail goto*//*Label 462*/ GIMT_Encode4(13771),
5458 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5459 GIM_Try, /*On fail goto*//*Label 463*/ GIMT_Encode4(12673), // Rule ID 23423 //
5460 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5461 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5462 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5463 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5464 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5465 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5466 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5467 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5468 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5469 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5470 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
5471 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
5472 // MIs[2] src
5473 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
5474 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
5475 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5476 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5477 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC32rr),
5478 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5479 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5480 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5481 GIR_RootConstrainSelectedInstOperands,
5482 // GIR_Coverage, 23423,
5483 GIR_EraseRootFromParent_Done,
5484 // Label 463: @12673
5485 GIM_Try, /*On fail goto*//*Label 464*/ GIMT_Encode4(12750), // Rule ID 23425 //
5486 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5487 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5488 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5489 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5490 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5491 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5492 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5493 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5494 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
5495 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5496 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
5497 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
5498 // MIs[2] src
5499 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
5500 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
5501 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5502 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5503 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC32rr),
5504 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5505 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5506 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5507 GIR_RootConstrainSelectedInstOperands,
5508 // GIR_Coverage, 23425,
5509 GIR_EraseRootFromParent_Done,
5510 // Label 464: @12750
5511 GIM_Try, /*On fail goto*//*Label 465*/ GIMT_Encode4(12828), // Rule ID 23411 //
5512 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5513 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5514 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5515 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5516 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5517 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5518 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
5519 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
5520 GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
5521 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
5522 GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5523 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
5524 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5525 // MIs[0] src
5526 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
5527 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5528 // (or:{ *:[i32] } (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5529 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr),
5530 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5531 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src
5532 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5533 GIR_RootConstrainSelectedInstOperands,
5534 // GIR_Coverage, 23411,
5535 GIR_EraseRootFromParent_Done,
5536 // Label 465: @12828
5537 GIM_Try, /*On fail goto*//*Label 466*/ GIMT_Encode4(12905), // Rule ID 15866 //
5538 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5539 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5540 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5541 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5542 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5543 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5544 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5545 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5546 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5547 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5548 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
5549 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
5550 // MIs[2] src
5551 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
5552 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
5553 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5554 // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5555 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC32rr),
5556 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5557 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5558 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5559 GIR_RootConstrainSelectedInstOperands,
5560 // GIR_Coverage, 15866,
5561 GIR_EraseRootFromParent_Done,
5562 // Label 466: @12905
5563 GIM_Try, /*On fail goto*//*Label 467*/ GIMT_Encode4(12982), // Rule ID 15868 //
5564 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5565 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5566 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5567 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5568 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5569 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5570 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5571 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5572 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5573 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5574 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
5575 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
5576 // MIs[2] src
5577 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
5578 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
5579 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5580 // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5581 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC32rr),
5582 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5583 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5584 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5585 GIR_RootConstrainSelectedInstOperands,
5586 // GIR_Coverage, 15868,
5587 GIR_EraseRootFromParent_Done,
5588 // Label 467: @12982
5589 GIM_Try, /*On fail goto*//*Label 468*/ GIMT_Encode4(13056), // Rule ID 15854 //
5590 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5591 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5592 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5593 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5594 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5595 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5596 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5597 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5598 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
5599 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
5600 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
5601 // MIs[2] src
5602 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
5603 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
5604 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5605 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5606 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] })) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5607 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr),
5608 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5609 GIR_RootToRootCopy, /*OpIdx*/1, // src
5610 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5611 GIR_RootConstrainSelectedInstOperands,
5612 // GIR_Coverage, 15854,
5613 GIR_EraseRootFromParent_Done,
5614 // Label 468: @13056
5615 GIM_Try, /*On fail goto*//*Label 469*/ GIMT_Encode4(13114), // Rule ID 23419 //
5616 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5617 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5618 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5619 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5620 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5621 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5622 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5623 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
5624 // MIs[0] src
5625 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
5626 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5627 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5628 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS32rr),
5629 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5630 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5631 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5632 GIR_RootConstrainSelectedInstOperands,
5633 // GIR_Coverage, 23419,
5634 GIR_EraseRootFromParent_Done,
5635 // Label 469: @13114
5636 GIM_Try, /*On fail goto*//*Label 470*/ GIMT_Encode4(13172), // Rule ID 23421 //
5637 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5638 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5639 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5640 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5641 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5642 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5643 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5644 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5645 // MIs[0] src
5646 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
5647 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5648 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5649 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL32rr),
5650 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5651 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5652 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5653 GIR_RootConstrainSelectedInstOperands,
5654 // GIR_Coverage, 23421,
5655 GIR_EraseRootFromParent_Done,
5656 // Label 470: @13172
5657 GIM_Try, /*On fail goto*//*Label 471*/ GIMT_Encode4(13281), // Rule ID 24463 //
5658 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5659 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5660 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5661 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
5662 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5663 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
5664 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
5665 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5666 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5667 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5668 // (or:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
5669 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
5670 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
5671 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
5672 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5673 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5674 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
5675 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5676 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
5677 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
5678 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
5679 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
5680 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
5681 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
5682 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS32rr),
5683 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5684 GIR_RootToRootCopy, /*OpIdx*/2, // src1
5685 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5686 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5687 GIR_RootConstrainSelectedInstOperands,
5688 // GIR_Coverage, 24463,
5689 GIR_EraseRootFromParent_Done,
5690 // Label 471: @13281
5691 GIM_Try, /*On fail goto*//*Label 472*/ GIMT_Encode4(13339), // Rule ID 23413 //
5692 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5693 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5694 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5695 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB),
5696 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5697 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5698 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
5699 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5700 // MIs[0] src
5701 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
5702 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5703 // (or:{ *:[i32] } (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5704 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr),
5705 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5706 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
5707 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5708 GIR_RootConstrainSelectedInstOperands,
5709 // GIR_Coverage, 23413,
5710 GIR_EraseRootFromParent_Done,
5711 // Label 472: @13339
5712 GIM_Try, /*On fail goto*//*Label 473*/ GIMT_Encode4(13393), // Rule ID 15862 //
5713 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5714 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5715 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5716 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5717 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5718 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5719 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5720 // MIs[1] src
5721 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
5722 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
5723 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5724 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5725 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS32rr),
5726 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5727 GIR_RootToRootCopy, /*OpIdx*/1, // src
5728 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5729 GIR_RootConstrainSelectedInstOperands,
5730 // GIR_Coverage, 15862,
5731 GIR_EraseRootFromParent_Done,
5732 // Label 473: @13393
5733 GIM_Try, /*On fail goto*//*Label 474*/ GIMT_Encode4(13447), // Rule ID 15864 //
5734 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5735 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5736 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5737 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5738 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5739 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5740 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5741 // MIs[1] src
5742 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
5743 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5744 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5745 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5746 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL32rr),
5747 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5748 GIR_RootToRootCopy, /*OpIdx*/1, // src
5749 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5750 GIR_RootConstrainSelectedInstOperands,
5751 // GIR_Coverage, 15864,
5752 GIR_EraseRootFromParent_Done,
5753 // Label 474: @13447
5754 GIM_Try, /*On fail goto*//*Label 475*/ GIMT_Encode4(13556), // Rule ID 21192 //
5755 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5756 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5757 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5758 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5759 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
5760 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5761 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
5762 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
5763 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
5764 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5765 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
5766 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
5767 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
5768 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
5769 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5770 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5771 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
5772 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5773 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
5774 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
5775 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
5776 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
5777 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
5778 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
5779 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS32rr),
5780 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5781 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5782 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5783 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5784 GIR_RootConstrainSelectedInstOperands,
5785 // GIR_Coverage, 21192,
5786 GIR_EraseRootFromParent_Done,
5787 // Label 475: @13556
5788 GIM_Try, /*On fail goto*//*Label 476*/ GIMT_Encode4(13610), // Rule ID 15856 //
5789 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5790 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5791 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5792 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5793 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5794 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB),
5795 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5796 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
5797 // MIs[1] src
5798 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
5799 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5800 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5801 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr),
5802 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5803 GIR_RootToRootCopy, /*OpIdx*/1, // src
5804 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5805 GIR_RootConstrainSelectedInstOperands,
5806 // GIR_Coverage, 15856,
5807 GIR_EraseRootFromParent_Done,
5808 // Label 476: @13610
5809 GIM_Try, /*On fail goto*//*Label 477*/ GIMT_Encode4(13654), // Rule ID 21247 //
5810 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
5811 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5812 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5813 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5814 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5815 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5816 // MIs[1] Operand 1
5817 // No operand predicates
5818 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5819 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
5820 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR32ri),
5821 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5822 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5823 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5824 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5825 GIR_RootConstrainSelectedInstOperands,
5826 // GIR_Coverage, 21247,
5827 GIR_EraseRootFromParent_Done,
5828 // Label 477: @13654
5829 GIM_Try, /*On fail goto*//*Label 478*/ GIMT_Encode4(13698), // Rule ID 21337 //
5830 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
5831 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5832 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5833 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5834 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5835 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5836 // MIs[1] Operand 1
5837 // No operand predicates
5838 GIM_CheckIsSafeToFold, /*NumInsns*/1,
5839 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
5840 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR32ri_ND),
5841 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5842 GIR_RootToRootCopy, /*OpIdx*/1, // src1
5843 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5844 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5845 GIR_RootConstrainSelectedInstOperands,
5846 // GIR_Coverage, 21337,
5847 GIR_EraseRootFromParent_Done,
5848 // Label 478: @13698
5849 GIM_Try, /*On fail goto*//*Label 479*/ GIMT_Encode4(13734), // Rule ID 21239 //
5850 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
5851 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5852 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5853 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5854 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5855 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
5856 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR32rr),
5857 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
5858 GIR_RootConstrainSelectedInstOperands,
5859 // GIR_Coverage, 21239,
5860 GIR_Done,
5861 // Label 479: @13734
5862 GIM_Try, /*On fail goto*//*Label 480*/ GIMT_Encode4(13770), // Rule ID 21329 //
5863 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
5864 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5865 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5866 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5867 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
5868 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
5869 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR32rr_ND),
5870 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
5871 GIR_RootConstrainSelectedInstOperands,
5872 // GIR_Coverage, 21329,
5873 GIR_Done,
5874 // Label 480: @13770
5875 GIM_Reject,
5876 // Label 462: @13771
5877 GIM_Reject,
5878 // Label 429: @13772
5879 GIM_Try, /*On fail goto*//*Label 481*/ GIMT_Encode4(14963),
5880 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5881 GIM_Try, /*On fail goto*//*Label 482*/ GIMT_Encode4(13857), // Rule ID 23424 //
5882 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5883 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
5884 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5885 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5886 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5887 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
5888 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5889 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5890 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5891 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5892 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
5893 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
5894 // MIs[2] src
5895 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
5896 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
5897 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5898 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5899 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC64rr),
5900 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5901 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5902 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5903 GIR_RootConstrainSelectedInstOperands,
5904 // GIR_Coverage, 23424,
5905 GIR_EraseRootFromParent_Done,
5906 // Label 482: @13857
5907 GIM_Try, /*On fail goto*//*Label 483*/ GIMT_Encode4(13934), // Rule ID 23426 //
5908 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5909 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
5910 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5911 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5912 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
5913 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
5914 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5915 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5916 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
5917 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5918 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
5919 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
5920 // MIs[2] src
5921 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
5922 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
5923 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5924 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5925 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC64rr),
5926 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5927 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5928 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5929 GIR_RootConstrainSelectedInstOperands,
5930 // GIR_Coverage, 23426,
5931 GIR_EraseRootFromParent_Done,
5932 // Label 483: @13934
5933 GIM_Try, /*On fail goto*//*Label 484*/ GIMT_Encode4(14012), // Rule ID 23412 //
5934 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5935 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5936 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5937 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5938 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
5939 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5940 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
5941 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
5942 GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
5943 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
5944 GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5945 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
5946 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5947 // MIs[0] src
5948 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
5949 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5950 // (or:{ *:[i64] } (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5951 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr),
5952 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5953 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src
5954 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5955 GIR_RootConstrainSelectedInstOperands,
5956 // GIR_Coverage, 23412,
5957 GIR_EraseRootFromParent_Done,
5958 // Label 484: @14012
5959 GIM_Try, /*On fail goto*//*Label 485*/ GIMT_Encode4(14089), // Rule ID 15867 //
5960 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5961 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
5962 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5963 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5964 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5965 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
5966 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5967 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5968 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5969 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5970 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
5971 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
5972 // MIs[2] src
5973 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
5974 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1),
5975 GIM_CheckIsSafeToFold, /*NumInsns*/2,
5976 // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5977 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC64rr),
5978 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5979 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5980 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
5981 GIR_RootConstrainSelectedInstOperands,
5982 // GIR_Coverage, 15867,
5983 GIR_EraseRootFromParent_Done,
5984 // Label 485: @14089
5985 GIM_Try, /*On fail goto*//*Label 486*/ GIMT_Encode4(14166), // Rule ID 15869 //
5986 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
5987 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
5988 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5989 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5990 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
5991 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
5992 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5993 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
5994 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
5995 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5996 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
5997 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
5998 // MIs[2] src
5999 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
6000 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
6001 GIM_CheckIsSafeToFold, /*NumInsns*/2,
6002 // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6003 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC64rr),
6004 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6005 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
6006 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6007 GIR_RootConstrainSelectedInstOperands,
6008 // GIR_Coverage, 15869,
6009 GIR_EraseRootFromParent_Done,
6010 // Label 486: @14166
6011 GIM_Try, /*On fail goto*//*Label 487*/ GIMT_Encode4(14240), // Rule ID 15855 //
6012 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
6013 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6014 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6015 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6016 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6017 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
6018 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
6019 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
6020 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
6021 GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD),
6022 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
6023 // MIs[2] src
6024 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
6025 GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1,
6026 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
6027 GIM_CheckIsSafeToFold, /*NumInsns*/2,
6028 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] })) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6029 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr),
6030 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6031 GIR_RootToRootCopy, /*OpIdx*/1, // src
6032 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6033 GIR_RootConstrainSelectedInstOperands,
6034 // GIR_Coverage, 15855,
6035 GIR_EraseRootFromParent_Done,
6036 // Label 487: @14240
6037 GIM_Try, /*On fail goto*//*Label 488*/ GIMT_Encode4(14298), // Rule ID 23420 //
6038 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
6039 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6040 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
6041 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
6042 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
6043 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
6044 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6045 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
6046 // MIs[0] src
6047 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
6048 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6049 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6050 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS64rr),
6051 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6052 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
6053 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6054 GIR_RootConstrainSelectedInstOperands,
6055 // GIR_Coverage, 23420,
6056 GIR_EraseRootFromParent_Done,
6057 // Label 488: @14298
6058 GIM_Try, /*On fail goto*//*Label 489*/ GIMT_Encode4(14356), // Rule ID 23422 //
6059 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
6060 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6061 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
6062 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
6063 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
6064 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
6065 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6066 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
6067 // MIs[0] src
6068 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
6069 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6070 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6071 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL64rr),
6072 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6073 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
6074 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6075 GIR_RootConstrainSelectedInstOperands,
6076 // GIR_Coverage, 23422,
6077 GIR_EraseRootFromParent_Done,
6078 // Label 489: @14356
6079 GIM_Try, /*On fail goto*//*Label 490*/ GIMT_Encode4(14465), // Rule ID 24469 //
6080 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6081 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6082 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
6083 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
6084 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
6085 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
6086 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
6087 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
6088 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6089 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6090 // (or:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
6091 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
6092 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
6093 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
6094 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6095 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6096 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
6097 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6098 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6099 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
6100 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
6101 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
6102 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
6103 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
6104 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS64rr),
6105 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6106 GIR_RootToRootCopy, /*OpIdx*/2, // src1
6107 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6108 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6109 GIR_RootConstrainSelectedInstOperands,
6110 // GIR_Coverage, 24469,
6111 GIR_EraseRootFromParent_Done,
6112 // Label 490: @14465
6113 GIM_Try, /*On fail goto*//*Label 491*/ GIMT_Encode4(14523), // Rule ID 23414 //
6114 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
6115 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6116 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
6117 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB),
6118 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
6119 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
6120 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
6121 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6122 // MIs[0] src
6123 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
6124 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6125 // (or:{ *:[i64] } (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6126 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr),
6127 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6128 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
6129 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6130 GIR_RootConstrainSelectedInstOperands,
6131 // GIR_Coverage, 23414,
6132 GIR_EraseRootFromParent_Done,
6133 // Label 491: @14523
6134 GIM_Try, /*On fail goto*//*Label 492*/ GIMT_Encode4(14577), // Rule ID 15863 //
6135 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
6136 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6137 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6138 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6139 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6140 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
6141 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
6142 // MIs[1] src
6143 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
6144 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
6145 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6146 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6147 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS64rr),
6148 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6149 GIR_RootToRootCopy, /*OpIdx*/1, // src
6150 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6151 GIR_RootConstrainSelectedInstOperands,
6152 // GIR_Coverage, 15863,
6153 GIR_EraseRootFromParent_Done,
6154 // Label 492: @14577
6155 GIM_Try, /*On fail goto*//*Label 493*/ GIMT_Encode4(14631), // Rule ID 15865 //
6156 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
6157 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6158 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6159 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6160 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6161 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
6162 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
6163 // MIs[1] src
6164 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
6165 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1),
6166 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6167 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6168 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL64rr),
6169 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6170 GIR_RootToRootCopy, /*OpIdx*/1, // src
6171 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6172 GIR_RootConstrainSelectedInstOperands,
6173 // GIR_Coverage, 15865,
6174 GIR_EraseRootFromParent_Done,
6175 // Label 493: @14631
6176 GIM_Try, /*On fail goto*//*Label 494*/ GIMT_Encode4(14740), // Rule ID 21198 //
6177 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6178 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6179 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6180 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6181 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
6182 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
6183 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
6184 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
6185 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
6186 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6187 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
6188 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
6189 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
6190 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
6191 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6192 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6193 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
6194 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6195 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6196 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
6197 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
6198 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
6199 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
6200 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
6201 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS64rr),
6202 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6203 GIR_RootToRootCopy, /*OpIdx*/1, // src1
6204 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6205 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6206 GIR_RootConstrainSelectedInstOperands,
6207 // GIR_Coverage, 21198,
6208 GIR_EraseRootFromParent_Done,
6209 // Label 494: @14740
6210 GIM_Try, /*On fail goto*//*Label 495*/ GIMT_Encode4(14794), // Rule ID 15857 //
6211 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
6212 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6213 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6214 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6215 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6216 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB),
6217 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
6218 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2),
6219 // MIs[1] src
6220 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
6221 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6222 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
6223 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr),
6224 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6225 GIR_RootToRootCopy, /*OpIdx*/1, // src
6226 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6227 GIR_RootConstrainSelectedInstOperands,
6228 // GIR_Coverage, 15857,
6229 GIR_EraseRootFromParent_Done,
6230 // Label 495: @14794
6231 GIM_Try, /*On fail goto*//*Label 496*/ GIMT_Encode4(14842), // Rule ID 21248 //
6232 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
6233 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6234 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6235 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6236 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6237 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6238 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
6239 // MIs[1] Operand 1
6240 // No operand predicates
6241 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6242 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (OR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
6243 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR64ri32),
6244 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6245 GIR_RootToRootCopy, /*OpIdx*/1, // src1
6246 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
6247 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6248 GIR_RootConstrainSelectedInstOperands,
6249 // GIR_Coverage, 21248,
6250 GIR_EraseRootFromParent_Done,
6251 // Label 496: @14842
6252 GIM_Try, /*On fail goto*//*Label 497*/ GIMT_Encode4(14890), // Rule ID 21338 //
6253 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
6254 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6255 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6256 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6257 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6258 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6259 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
6260 // MIs[1] Operand 1
6261 // No operand predicates
6262 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6263 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (OR64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
6264 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR64ri32_ND),
6265 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6266 GIR_RootToRootCopy, /*OpIdx*/1, // src1
6267 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
6268 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
6269 GIR_RootConstrainSelectedInstOperands,
6270 // GIR_Coverage, 21338,
6271 GIR_EraseRootFromParent_Done,
6272 // Label 497: @14890
6273 GIM_Try, /*On fail goto*//*Label 498*/ GIMT_Encode4(14926), // Rule ID 21240 //
6274 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
6275 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6276 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6277 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6278 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6279 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
6280 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR64rr),
6281 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
6282 GIR_RootConstrainSelectedInstOperands,
6283 // GIR_Coverage, 21240,
6284 GIR_Done,
6285 // Label 498: @14926
6286 GIM_Try, /*On fail goto*//*Label 499*/ GIMT_Encode4(14962), // Rule ID 21330 //
6287 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
6288 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6289 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6290 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6291 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
6292 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
6293 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR64rr_ND),
6294 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
6295 GIR_RootConstrainSelectedInstOperands,
6296 // GIR_Coverage, 21330,
6297 GIR_Done,
6298 // Label 499: @14962
6299 GIM_Reject,
6300 // Label 481: @14963
6301 GIM_Reject,
6302 // Label 430: @14964
6303 GIM_Try, /*On fail goto*//*Label 500*/ GIMT_Encode4(15057), // Rule ID 18027 //
6304 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1,
6305 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s1,
6306 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
6307 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
6308 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
6309 // (or:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
6310 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
6311 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
6312 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
6313 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6314 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6315 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
6316 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
6317 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6318 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6319 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
6320 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6321 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWrr),
6322 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6323 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6324 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
6325 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6326 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6327 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6328 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6329 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
6330 // GIR_Coverage, 18027,
6331 GIR_EraseRootFromParent_Done,
6332 // Label 500: @15057
6333 GIM_Reject,
6334 // Label 431: @15058
6335 GIM_Try, /*On fail goto*//*Label 501*/ GIMT_Encode4(15151),
6336 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
6337 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6338 GIM_Try, /*On fail goto*//*Label 502*/ GIMT_Encode4(15096), // Rule ID 2104 //
6339 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
6340 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6341 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6342 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6343 // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
6344 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr),
6345 GIR_RootConstrainSelectedInstOperands,
6346 // GIR_Coverage, 2104,
6347 GIR_Done,
6348 // Label 502: @15096
6349 GIM_Try, /*On fail goto*//*Label 503*/ GIMT_Encode4(15123), // Rule ID 2106 //
6350 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
6351 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6352 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6353 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6354 // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
6355 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr),
6356 GIR_RootConstrainSelectedInstOperands,
6357 // GIR_Coverage, 2106,
6358 GIR_Done,
6359 // Label 503: @15123
6360 GIM_Try, /*On fail goto*//*Label 504*/ GIMT_Encode4(15150), // Rule ID 5710 //
6361 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
6362 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6363 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6364 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6365 // (or:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
6366 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ128rr),
6367 GIR_RootConstrainSelectedInstOperands,
6368 // GIR_Coverage, 5710,
6369 GIR_Done,
6370 // Label 504: @15150
6371 GIM_Reject,
6372 // Label 501: @15151
6373 GIM_Reject,
6374 // Label 432: @15152
6375 GIM_Try, /*On fail goto*//*Label 505*/ GIMT_Encode4(15245), // Rule ID 18028 //
6376 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1,
6377 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s1,
6378 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
6379 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
6380 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
6381 // (or:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
6382 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
6383 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
6384 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
6385 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6386 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6387 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
6388 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
6389 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6390 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6391 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
6392 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6393 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWrr),
6394 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6395 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6396 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
6397 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6398 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6399 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6400 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6401 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
6402 // GIR_Coverage, 18028,
6403 GIR_EraseRootFromParent_Done,
6404 // Label 505: @15245
6405 GIM_Reject,
6406 // Label 433: @15246
6407 GIM_Try, /*On fail goto*//*Label 506*/ GIMT_Encode4(15339),
6408 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
6409 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6410 GIM_Try, /*On fail goto*//*Label 507*/ GIMT_Encode4(15284), // Rule ID 5737 //
6411 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
6412 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6413 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6414 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6415 // (or:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
6416 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORDZ128rr),
6417 GIR_RootConstrainSelectedInstOperands,
6418 // GIR_Coverage, 5737,
6419 GIR_Done,
6420 // Label 507: @15284
6421 GIM_Try, /*On fail goto*//*Label 508*/ GIMT_Encode4(15311), // Rule ID 16661 //
6422 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
6423 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6424 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6425 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6426 // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6427 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr),
6428 GIR_RootConstrainSelectedInstOperands,
6429 // GIR_Coverage, 16661,
6430 GIR_Done,
6431 // Label 508: @15311
6432 GIM_Try, /*On fail goto*//*Label 509*/ GIMT_Encode4(15338), // Rule ID 16685 //
6433 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
6434 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6435 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6436 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6437 // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6438 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr),
6439 GIR_RootConstrainSelectedInstOperands,
6440 // GIR_Coverage, 16685,
6441 GIR_Done,
6442 // Label 509: @15338
6443 GIM_Reject,
6444 // Label 506: @15339
6445 GIM_Reject,
6446 // Label 434: @15340
6447 GIM_Try, /*On fail goto*//*Label 510*/ GIMT_Encode4(15433),
6448 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
6449 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
6450 GIM_Try, /*On fail goto*//*Label 511*/ GIMT_Encode4(15378), // Rule ID 2108 //
6451 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
6452 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6453 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6454 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6455 // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
6456 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr),
6457 GIR_RootConstrainSelectedInstOperands,
6458 // GIR_Coverage, 2108,
6459 GIR_Done,
6460 // Label 511: @15378
6461 GIM_Try, /*On fail goto*//*Label 512*/ GIMT_Encode4(15405), // Rule ID 5701 //
6462 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
6463 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6464 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6465 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6466 // (or:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
6467 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ256rr),
6468 GIR_RootConstrainSelectedInstOperands,
6469 // GIR_Coverage, 5701,
6470 GIR_Done,
6471 // Label 512: @15405
6472 GIM_Try, /*On fail goto*//*Label 513*/ GIMT_Encode4(15432), // Rule ID 16631 //
6473 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
6474 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6475 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6476 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6477 // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
6478 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr),
6479 GIR_RootConstrainSelectedInstOperands,
6480 // GIR_Coverage, 16631,
6481 GIR_Done,
6482 // Label 513: @15432
6483 GIM_Reject,
6484 // Label 510: @15433
6485 GIM_Reject,
6486 // Label 435: @15434
6487 GIM_Try, /*On fail goto*//*Label 514*/ GIMT_Encode4(15551),
6488 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
6489 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1,
6490 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
6491 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
6492 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
6493 GIM_Try, /*On fail goto*//*Label 515*/ GIMT_Encode4(15472), // Rule ID 4371 //
6494 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
6495 // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
6496 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORBrr),
6497 GIR_RootConstrainSelectedInstOperands,
6498 // GIR_Coverage, 4371,
6499 GIR_Done,
6500 // Label 515: @15472
6501 GIM_Try, /*On fail goto*//*Label 516*/ GIMT_Encode4(15550), // Rule ID 18025 //
6502 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
6503 // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
6504 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
6505 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
6506 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
6507 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6508 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6509 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
6510 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
6511 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6512 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6513 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
6514 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6515 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWrr),
6516 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6517 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6518 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
6519 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6520 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6521 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6522 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6523 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
6524 // GIR_Coverage, 18025,
6525 GIR_EraseRootFromParent_Done,
6526 // Label 516: @15550
6527 GIM_Reject,
6528 // Label 514: @15551
6529 GIM_Reject,
6530 // Label 436: @15552
6531 GIM_Try, /*On fail goto*//*Label 517*/ GIMT_Encode4(15645),
6532 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
6533 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6534 GIM_Try, /*On fail goto*//*Label 518*/ GIMT_Encode4(15590), // Rule ID 16660 //
6535 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
6536 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6537 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6538 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6539 // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6540 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr),
6541 GIR_RootConstrainSelectedInstOperands,
6542 // GIR_Coverage, 16660,
6543 GIR_Done,
6544 // Label 518: @15590
6545 GIM_Try, /*On fail goto*//*Label 519*/ GIMT_Encode4(15617), // Rule ID 16684 //
6546 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
6547 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6548 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6549 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6550 // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6551 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr),
6552 GIR_RootConstrainSelectedInstOperands,
6553 // GIR_Coverage, 16684,
6554 GIR_Done,
6555 // Label 519: @15617
6556 GIM_Try, /*On fail goto*//*Label 520*/ GIMT_Encode4(15644), // Rule ID 18599 //
6557 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
6558 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6559 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6560 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6561 // (or:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
6562 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ128rr),
6563 GIR_RootConstrainSelectedInstOperands,
6564 // GIR_Coverage, 18599,
6565 GIR_Done,
6566 // Label 520: @15644
6567 GIM_Reject,
6568 // Label 517: @15645
6569 GIM_Reject,
6570 // Label 437: @15646
6571 GIM_Try, /*On fail goto*//*Label 521*/ GIMT_Encode4(15739),
6572 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
6573 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
6574 GIM_Try, /*On fail goto*//*Label 522*/ GIMT_Encode4(15684), // Rule ID 5728 //
6575 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
6576 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6577 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6578 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6579 // (or:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
6580 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORDZ256rr),
6581 GIR_RootConstrainSelectedInstOperands,
6582 // GIR_Coverage, 5728,
6583 GIR_Done,
6584 // Label 522: @15684
6585 GIM_Try, /*On fail goto*//*Label 523*/ GIMT_Encode4(15711), // Rule ID 16605 //
6586 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
6587 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6588 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6589 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6590 // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
6591 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr),
6592 GIR_RootConstrainSelectedInstOperands,
6593 // GIR_Coverage, 16605,
6594 GIR_Done,
6595 // Label 523: @15711
6596 GIM_Try, /*On fail goto*//*Label 524*/ GIMT_Encode4(15738), // Rule ID 16630 //
6597 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
6598 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6599 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6600 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6601 // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
6602 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr),
6603 GIR_RootConstrainSelectedInstOperands,
6604 // GIR_Coverage, 16630,
6605 GIR_Done,
6606 // Label 524: @15738
6607 GIM_Reject,
6608 // Label 521: @15739
6609 GIM_Reject,
6610 // Label 438: @15740
6611 GIM_Try, /*On fail goto*//*Label 525*/ GIMT_Encode4(15773), // Rule ID 5692 //
6612 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
6613 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
6614 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
6615 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6616 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6617 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6618 // (or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
6619 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZrr),
6620 GIR_RootConstrainSelectedInstOperands,
6621 // GIR_Coverage, 5692,
6622 GIR_Done,
6623 // Label 525: @15773
6624 GIM_Reject,
6625 // Label 439: @15774
6626 GIM_Try, /*On fail goto*//*Label 526*/ GIMT_Encode4(15807), // Rule ID 4372 //
6627 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
6628 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
6629 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1,
6630 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
6631 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
6632 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
6633 // (or:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
6634 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORWrr),
6635 GIR_RootConstrainSelectedInstOperands,
6636 // GIR_Coverage, 4372,
6637 GIR_Done,
6638 // Label 526: @15807
6639 GIM_Reject,
6640 // Label 440: @15808
6641 GIM_Try, /*On fail goto*//*Label 527*/ GIMT_Encode4(15901),
6642 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
6643 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6644 GIM_Try, /*On fail goto*//*Label 528*/ GIMT_Encode4(15846), // Rule ID 16659 //
6645 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
6646 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6647 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6648 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6649 // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
6650 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr),
6651 GIR_RootConstrainSelectedInstOperands,
6652 // GIR_Coverage, 16659,
6653 GIR_Done,
6654 // Label 528: @15846
6655 GIM_Try, /*On fail goto*//*Label 529*/ GIMT_Encode4(15873), // Rule ID 16683 //
6656 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
6657 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6658 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6659 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
6660 // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
6661 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr),
6662 GIR_RootConstrainSelectedInstOperands,
6663 // GIR_Coverage, 16683,
6664 GIR_Done,
6665 // Label 529: @15873
6666 GIM_Try, /*On fail goto*//*Label 530*/ GIMT_Encode4(15900), // Rule ID 18598 //
6667 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
6668 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6669 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6670 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
6671 // (or:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
6672 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ128rr),
6673 GIR_RootConstrainSelectedInstOperands,
6674 // GIR_Coverage, 18598,
6675 GIR_Done,
6676 // Label 530: @15900
6677 GIM_Reject,
6678 // Label 527: @15901
6679 GIM_Reject,
6680 // Label 441: @15902
6681 GIM_Try, /*On fail goto*//*Label 531*/ GIMT_Encode4(15995),
6682 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
6683 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
6684 GIM_Try, /*On fail goto*//*Label 532*/ GIMT_Encode4(15940), // Rule ID 16604 //
6685 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
6686 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6687 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6688 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6689 // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
6690 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr),
6691 GIR_RootConstrainSelectedInstOperands,
6692 // GIR_Coverage, 16604,
6693 GIR_Done,
6694 // Label 532: @15940
6695 GIM_Try, /*On fail goto*//*Label 533*/ GIMT_Encode4(15967), // Rule ID 16629 //
6696 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
6697 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6698 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6699 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6700 // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
6701 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr),
6702 GIR_RootConstrainSelectedInstOperands,
6703 // GIR_Coverage, 16629,
6704 GIR_Done,
6705 // Label 533: @15967
6706 GIM_Try, /*On fail goto*//*Label 534*/ GIMT_Encode4(15994), // Rule ID 18615 //
6707 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
6708 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6709 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6710 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6711 // (or:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
6712 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ256rr),
6713 GIR_RootConstrainSelectedInstOperands,
6714 // GIR_Coverage, 18615,
6715 GIR_Done,
6716 // Label 534: @15994
6717 GIM_Reject,
6718 // Label 531: @15995
6719 GIM_Reject,
6720 // Label 442: @15996
6721 GIM_Try, /*On fail goto*//*Label 535*/ GIMT_Encode4(16029), // Rule ID 5719 //
6722 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
6723 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
6724 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
6725 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6726 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6727 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6728 // (or:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
6729 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORDZrr),
6730 GIR_RootConstrainSelectedInstOperands,
6731 // GIR_Coverage, 5719,
6732 GIR_Done,
6733 // Label 535: @16029
6734 GIM_Reject,
6735 // Label 443: @16030
6736 GIM_Try, /*On fail goto*//*Label 536*/ GIMT_Encode4(16063), // Rule ID 4373 //
6737 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
6738 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
6739 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1,
6740 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
6741 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
6742 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
6743 // (or:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
6744 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORDrr),
6745 GIR_RootConstrainSelectedInstOperands,
6746 // GIR_Coverage, 4373,
6747 GIR_Done,
6748 // Label 536: @16063
6749 GIM_Reject,
6750 // Label 444: @16064
6751 GIM_Try, /*On fail goto*//*Label 537*/ GIMT_Encode4(16157),
6752 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
6753 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
6754 GIM_Try, /*On fail goto*//*Label 538*/ GIMT_Encode4(16102), // Rule ID 16603 //
6755 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
6756 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6757 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6758 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6759 // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
6760 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr),
6761 GIR_RootConstrainSelectedInstOperands,
6762 // GIR_Coverage, 16603,
6763 GIR_Done,
6764 // Label 538: @16102
6765 GIM_Try, /*On fail goto*//*Label 539*/ GIMT_Encode4(16129), // Rule ID 16628 //
6766 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
6767 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6768 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6769 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
6770 // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
6771 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr),
6772 GIR_RootConstrainSelectedInstOperands,
6773 // GIR_Coverage, 16628,
6774 GIR_Done,
6775 // Label 539: @16129
6776 GIM_Try, /*On fail goto*//*Label 540*/ GIMT_Encode4(16156), // Rule ID 18614 //
6777 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
6778 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6779 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6780 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
6781 // (or:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
6782 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ256rr),
6783 GIR_RootConstrainSelectedInstOperands,
6784 // GIR_Coverage, 18614,
6785 GIR_Done,
6786 // Label 540: @16156
6787 GIM_Reject,
6788 // Label 537: @16157
6789 GIM_Reject,
6790 // Label 445: @16158
6791 GIM_Try, /*On fail goto*//*Label 541*/ GIMT_Encode4(16191), // Rule ID 18631 //
6792 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
6793 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
6794 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
6795 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6796 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6797 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6798 // (or:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
6799 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZrr),
6800 GIR_RootConstrainSelectedInstOperands,
6801 // GIR_Coverage, 18631,
6802 GIR_Done,
6803 // Label 541: @16191
6804 GIM_Reject,
6805 // Label 446: @16192
6806 GIM_Try, /*On fail goto*//*Label 542*/ GIMT_Encode4(16225), // Rule ID 4374 //
6807 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
6808 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1,
6809 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s1,
6810 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
6811 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
6812 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
6813 // (or:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
6814 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORQrr),
6815 GIR_RootConstrainSelectedInstOperands,
6816 // GIR_Coverage, 4374,
6817 GIR_Done,
6818 // Label 542: @16225
6819 GIM_Reject,
6820 // Label 447: @16226
6821 GIM_Try, /*On fail goto*//*Label 543*/ GIMT_Encode4(16259), // Rule ID 18630 //
6822 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
6823 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
6824 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
6825 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6826 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6827 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
6828 // (or:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
6829 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZrr),
6830 GIR_RootConstrainSelectedInstOperands,
6831 // GIR_Coverage, 18630,
6832 GIR_Done,
6833 // Label 543: @16259
6834 GIM_Reject,
6835 // Label 448: @16260
6836 GIM_Reject,
6837 // Label 5: @16261
6838 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(25), /*)*//*default:*//*Label 567*/ GIMT_Encode4(24599),
6839 /*GILLT_s1*//*Label 544*/ GIMT_Encode4(16372),
6840 /*GILLT_s8*//*Label 545*/ GIMT_Encode4(16903),
6841 /*GILLT_s16*//*Label 546*/ GIMT_Encode4(17106),
6842 /*GILLT_s32*//*Label 547*/ GIMT_Encode4(17551),
6843 /*GILLT_s64*//*Label 548*/ GIMT_Encode4(18164), GIMT_Encode4(0), GIMT_Encode4(0),
6844 /*GILLT_v2s1*//*Label 549*/ GIMT_Encode4(18736),
6845 /*GILLT_v2s64*//*Label 550*/ GIMT_Encode4(19251),
6846 /*GILLT_v4s1*//*Label 551*/ GIMT_Encode4(19623),
6847 /*GILLT_v4s32*//*Label 552*/ GIMT_Encode4(20138),
6848 /*GILLT_v4s64*//*Label 553*/ GIMT_Encode4(20510),
6849 /*GILLT_v8s1*//*Label 554*/ GIMT_Encode4(20882),
6850 /*GILLT_v8s16*//*Label 555*/ GIMT_Encode4(21653),
6851 /*GILLT_v8s32*//*Label 556*/ GIMT_Encode4(22025),
6852 /*GILLT_v8s64*//*Label 557*/ GIMT_Encode4(22397),
6853 /*GILLT_v16s1*//*Label 558*/ GIMT_Encode4(22475),
6854 /*GILLT_v16s8*//*Label 559*/ GIMT_Encode4(22733),
6855 /*GILLT_v16s16*//*Label 560*/ GIMT_Encode4(23105),
6856 /*GILLT_v16s32*//*Label 561*/ GIMT_Encode4(23477),
6857 /*GILLT_v32s1*//*Label 562*/ GIMT_Encode4(23555),
6858 /*GILLT_v32s8*//*Label 563*/ GIMT_Encode4(23813),
6859 /*GILLT_v32s16*//*Label 564*/ GIMT_Encode4(24185),
6860 /*GILLT_v64s1*//*Label 565*/ GIMT_Encode4(24263),
6861 /*GILLT_v64s8*//*Label 566*/ GIMT_Encode4(24521),
6862 // Label 544: @16372
6863 GIM_Try, /*On fail goto*//*Label 568*/ GIMT_Encode4(16902),
6864 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s1,
6865 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s1,
6866 GIM_Try, /*On fail goto*//*Label 569*/ GIMT_Encode4(16501), // Rule ID 23792 //
6867 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6868 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
6869 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
6870 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
6871 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
6872 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6873 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
6874 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
6875 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
6876 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6877 GIM_CheckIsSafeToFold, /*NumInsns*/2,
6878 // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
6879 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
6880 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
6881 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
6882 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6883 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6884 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
6885 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
6886 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6887 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6888 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
6889 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6890 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
6891 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6892 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6893 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
6894 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6895 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6896 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6897 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6898 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
6899 // GIR_Coverage, 23792,
6900 GIR_EraseRootFromParent_Done,
6901 // Label 569: @16501
6902 GIM_Try, /*On fail goto*//*Label 570*/ GIMT_Encode4(16620), // Rule ID 18030 //
6903 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6904 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
6905 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
6906 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
6907 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
6908 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6909 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6910 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
6911 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
6912 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
6913 GIM_CheckIsSafeToFold, /*NumInsns*/2,
6914 // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2), immAllOnesV:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
6915 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
6916 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
6917 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
6918 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6919 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6920 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2
6921 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
6922 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6923 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6924 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
6925 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6926 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
6927 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6928 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6929 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
6930 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6931 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6932 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6933 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6934 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
6935 // GIR_Coverage, 18030,
6936 GIR_EraseRootFromParent_Done,
6937 // Label 570: @16620
6938 GIM_Try, /*On fail goto*//*Label 571*/ GIMT_Encode4(16738), // Rule ID 23793 //
6939 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6940 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6941 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6942 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
6943 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
6944 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
6945 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6946 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
6947 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
6948 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
6949 GIM_CheckIsSafeToFold, /*NumInsns*/2,
6950 // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
6951 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
6952 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
6953 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
6954 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6955 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6956 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
6957 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
6958 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6959 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6960 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
6961 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6962 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
6963 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6964 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6965 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
6966 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6967 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6968 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6969 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6970 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
6971 // GIR_Coverage, 23793,
6972 GIR_EraseRootFromParent_Done,
6973 // Label 571: @16738
6974 GIM_Try, /*On fail goto*//*Label 572*/ GIMT_Encode4(16814), // Rule ID 18016 //
6975 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
6976 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
6977 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
6978 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
6979 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
6980 GIM_CheckIsSafeToFold, /*NumInsns*/1,
6981 // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src, immAllOnesV:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src, VK16:{ *:[i32] })), VK2:{ *:[i32] })
6982 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
6983 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
6984 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6985 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6986 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
6987 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
6988 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWrr),
6989 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
6990 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
6991 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6992 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6993 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6994 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6995 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
6996 // GIR_Coverage, 18016,
6997 GIR_EraseRootFromParent_Done,
6998 // Label 572: @16814
6999 GIM_Try, /*On fail goto*//*Label 573*/ GIMT_Encode4(16901), // Rule ID 18034 //
7000 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
7001 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
7002 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID),
7003 // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
7004 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
7005 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
7006 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
7007 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7008 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7009 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
7010 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
7011 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7012 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7013 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
7014 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7015 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWrr),
7016 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7017 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7018 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
7019 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7020 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7021 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7022 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7023 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID),
7024 // GIR_Coverage, 18034,
7025 GIR_EraseRootFromParent_Done,
7026 // Label 573: @16901
7027 GIM_Reject,
7028 // Label 568: @16902
7029 GIM_Reject,
7030 // Label 545: @16903
7031 GIM_Try, /*On fail goto*//*Label 574*/ GIMT_Encode4(17105),
7032 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
7033 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
7034 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7035 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7036 GIM_Try, /*On fail goto*//*Label 575*/ GIMT_Encode4(16946), // Rule ID 21010 //
7037 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-128),
7038 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -128:{ *:[i8] }) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, -128:{ *:[i8] })
7039 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8ri),
7040 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7041 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7042 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128),
7043 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7044 GIR_RootConstrainSelectedInstOperands,
7045 // GIR_Coverage, 21010,
7046 GIR_EraseRootFromParent_Done,
7047 // Label 575: @16946
7048 GIM_Try, /*On fail goto*//*Label 576*/ GIMT_Encode4(16967), // Rule ID 234 //
7049 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7050 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7051 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r:{ *:[i8] } GR8:{ *:[i8] }:$src1)
7052 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT8r),
7053 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7054 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7055 GIR_RootConstrainSelectedInstOperands,
7056 // GIR_Coverage, 234,
7057 GIR_EraseRootFromParent_Done,
7058 // Label 576: @16967
7059 GIM_Try, /*On fail goto*//*Label 577*/ GIMT_Encode4(16988), // Rule ID 242 //
7060 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
7061 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7062 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r_ND:{ *:[i8] } GR8:{ *:[i8] }:$src1)
7063 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT8r_ND),
7064 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7065 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7066 GIR_RootConstrainSelectedInstOperands,
7067 // GIR_Coverage, 242,
7068 GIR_EraseRootFromParent_Done,
7069 // Label 577: @16988
7070 GIM_Try, /*On fail goto*//*Label 578*/ GIMT_Encode4(17021), // Rule ID 21257 //
7071 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7072 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7073 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7074 // MIs[1] Operand 1
7075 // No operand predicates
7076 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7077 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
7078 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR8ri),
7079 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7080 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7081 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7082 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7083 GIR_RootConstrainSelectedInstOperands,
7084 // GIR_Coverage, 21257,
7085 GIR_EraseRootFromParent_Done,
7086 // Label 578: @17021
7087 GIM_Try, /*On fail goto*//*Label 579*/ GIMT_Encode4(17054), // Rule ID 21347 //
7088 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7089 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7090 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7091 // MIs[1] Operand 1
7092 // No operand predicates
7093 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7094 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
7095 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR8ri_ND),
7096 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7097 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7098 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7099 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7100 GIR_RootConstrainSelectedInstOperands,
7101 // GIR_Coverage, 21347,
7102 GIR_EraseRootFromParent_Done,
7103 // Label 579: @17054
7104 GIM_Try, /*On fail goto*//*Label 580*/ GIMT_Encode4(17079), // Rule ID 21249 //
7105 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7106 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7107 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
7108 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR8rr),
7109 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7110 GIR_RootConstrainSelectedInstOperands,
7111 // GIR_Coverage, 21249,
7112 GIR_Done,
7113 // Label 580: @17079
7114 GIM_Try, /*On fail goto*//*Label 581*/ GIMT_Encode4(17104), // Rule ID 21339 //
7115 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7116 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7117 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
7118 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR8rr_ND),
7119 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7120 GIR_RootConstrainSelectedInstOperands,
7121 // GIR_Coverage, 21339,
7122 GIR_Done,
7123 // Label 581: @17104
7124 GIM_Reject,
7125 // Label 574: @17105
7126 GIM_Reject,
7127 // Label 546: @17106
7128 GIM_Try, /*On fail goto*//*Label 582*/ GIMT_Encode4(17550),
7129 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
7130 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
7131 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7132 GIM_Try, /*On fail goto*//*Label 583*/ GIMT_Encode4(17163), // Rule ID 21011 //
7133 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7134 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(-32768),
7135 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -32768:{ *:[i16] }) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -32768:{ *:[i16] })
7136 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16ri),
7137 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7138 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7139 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-32768),
7140 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7141 GIR_RootConstrainSelectedInstOperands,
7142 // GIR_Coverage, 21011,
7143 GIR_EraseRootFromParent_Done,
7144 // Label 583: @17163
7145 GIM_Try, /*On fail goto*//*Label 584*/ GIMT_Encode4(17265), // Rule ID 24458 //
7146 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
7147 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
7148 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
7149 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
7150 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
7151 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7152 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7153 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7154 // (xor:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
7155 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
7156 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
7157 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7158 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7159 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7160 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7161 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7162 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7163 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
7164 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
7165 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
7166 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
7167 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
7168 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC16rr),
7169 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7170 GIR_RootToRootCopy, /*OpIdx*/2, // src1
7171 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7172 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7173 GIR_RootConstrainSelectedInstOperands,
7174 // GIR_Coverage, 24458,
7175 GIR_EraseRootFromParent_Done,
7176 // Label 584: @17265
7177 GIM_Try, /*On fail goto*//*Label 585*/ GIMT_Encode4(17367), // Rule ID 21187 //
7178 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7179 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7180 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
7181 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
7182 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
7183 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
7184 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7185 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7186 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
7187 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
7188 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16,
7189 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7190 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7191 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7192 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7193 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7194 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7195 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
7196 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
7197 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
7198 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
7199 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
7200 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC16rr),
7201 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7202 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7203 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7204 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7205 GIR_RootConstrainSelectedInstOperands,
7206 // GIR_Coverage, 21187,
7207 GIR_EraseRootFromParent_Done,
7208 // Label 585: @17367
7209 GIM_Try, /*On fail goto*//*Label 586*/ GIMT_Encode4(17392), // Rule ID 235 //
7210 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7211 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7212 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7213 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r:{ *:[i16] } GR16:{ *:[i16] }:$src1)
7214 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT16r),
7215 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7216 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7217 GIR_RootConstrainSelectedInstOperands,
7218 // GIR_Coverage, 235,
7219 GIR_EraseRootFromParent_Done,
7220 // Label 586: @17392
7221 GIM_Try, /*On fail goto*//*Label 587*/ GIMT_Encode4(17417), // Rule ID 243 //
7222 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
7223 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7224 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7225 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r_ND:{ *:[i16] } GR16:{ *:[i16] }:$src1)
7226 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT16r_ND),
7227 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7228 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7229 GIR_RootConstrainSelectedInstOperands,
7230 // GIR_Coverage, 243,
7231 GIR_EraseRootFromParent_Done,
7232 // Label 587: @17417
7233 GIM_Try, /*On fail goto*//*Label 588*/ GIMT_Encode4(17454), // Rule ID 21258 //
7234 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7235 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7236 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7237 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7238 // MIs[1] Operand 1
7239 // No operand predicates
7240 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7241 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
7242 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR16ri),
7243 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7244 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7245 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7246 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7247 GIR_RootConstrainSelectedInstOperands,
7248 // GIR_Coverage, 21258,
7249 GIR_EraseRootFromParent_Done,
7250 // Label 588: @17454
7251 GIM_Try, /*On fail goto*//*Label 589*/ GIMT_Encode4(17491), // Rule ID 21348 //
7252 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7253 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7254 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7255 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7256 // MIs[1] Operand 1
7257 // No operand predicates
7258 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7259 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
7260 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR16ri_ND),
7261 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7262 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7263 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7264 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7265 GIR_RootConstrainSelectedInstOperands,
7266 // GIR_Coverage, 21348,
7267 GIR_EraseRootFromParent_Done,
7268 // Label 589: @17491
7269 GIM_Try, /*On fail goto*//*Label 590*/ GIMT_Encode4(17520), // Rule ID 21250 //
7270 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7271 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7272 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7273 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
7274 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR16rr),
7275 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7276 GIR_RootConstrainSelectedInstOperands,
7277 // GIR_Coverage, 21250,
7278 GIR_Done,
7279 // Label 590: @17520
7280 GIM_Try, /*On fail goto*//*Label 591*/ GIMT_Encode4(17549), // Rule ID 21340 //
7281 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7282 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7283 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
7284 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
7285 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR16rr_ND),
7286 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7287 GIR_RootConstrainSelectedInstOperands,
7288 // GIR_Coverage, 21340,
7289 GIR_Done,
7290 // Label 591: @17549
7291 GIM_Reject,
7292 // Label 582: @17550
7293 GIM_Reject,
7294 // Label 547: @17551
7295 GIM_Try, /*On fail goto*//*Label 592*/ GIMT_Encode4(18163),
7296 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7297 GIM_Try, /*On fail goto*//*Label 593*/ GIMT_Encode4(17608), // Rule ID 21012 //
7298 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7299 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7300 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7301 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(-2147483648),
7302 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -2147483648:{ *:[i32] }) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -2147483648:{ *:[i32] })
7303 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32ri),
7304 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7305 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7306 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-2147483648),
7307 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7308 GIR_RootConstrainSelectedInstOperands,
7309 // GIR_Coverage, 21012,
7310 GIR_EraseRootFromParent_Done,
7311 // Label 593: @17608
7312 GIM_Try, /*On fail goto*//*Label 594*/ GIMT_Encode4(17666), // Rule ID 23417 //
7313 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
7314 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7315 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
7316 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
7317 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7318 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7319 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7320 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
7321 // MIs[0] src
7322 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
7323 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7324 // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
7325 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK32rr),
7326 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7327 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
7328 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7329 GIR_RootConstrainSelectedInstOperands,
7330 // GIR_Coverage, 23417,
7331 GIR_EraseRootFromParent_Done,
7332 // Label 594: @17666
7333 GIM_Try, /*On fail goto*//*Label 595*/ GIMT_Encode4(17775), // Rule ID 24464 //
7334 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7335 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7336 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
7337 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
7338 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7339 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
7340 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
7341 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7342 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7343 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7344 // (xor:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
7345 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
7346 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
7347 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7348 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7349 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7350 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7351 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7352 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7353 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
7354 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
7355 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
7356 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
7357 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
7358 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC32rr),
7359 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7360 GIR_RootToRootCopy, /*OpIdx*/2, // src1
7361 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7362 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7363 GIR_RootConstrainSelectedInstOperands,
7364 // GIR_Coverage, 24464,
7365 GIR_EraseRootFromParent_Done,
7366 // Label 595: @17775
7367 GIM_Try, /*On fail goto*//*Label 596*/ GIMT_Encode4(17829), // Rule ID 15860 //
7368 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
7369 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7370 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7371 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7372 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7373 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
7374 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7375 // MIs[1] src
7376 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
7377 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
7378 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7379 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
7380 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK32rr),
7381 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7382 GIR_RootToRootCopy, /*OpIdx*/1, // src
7383 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7384 GIR_RootConstrainSelectedInstOperands,
7385 // GIR_Coverage, 15860,
7386 GIR_EraseRootFromParent_Done,
7387 // Label 596: @17829
7388 GIM_Try, /*On fail goto*//*Label 597*/ GIMT_Encode4(17938), // Rule ID 21193 //
7389 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7390 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7391 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7392 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7393 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
7394 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7395 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
7396 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
7397 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7398 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7399 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
7400 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
7401 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
7402 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7403 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7404 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7405 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7406 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7407 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7408 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
7409 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
7410 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
7411 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
7412 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
7413 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC32rr),
7414 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7415 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7416 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7417 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7418 GIR_RootConstrainSelectedInstOperands,
7419 // GIR_Coverage, 21193,
7420 GIR_EraseRootFromParent_Done,
7421 // Label 597: @17938
7422 GIM_Try, /*On fail goto*//*Label 598*/ GIMT_Encode4(17970), // Rule ID 236 //
7423 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7424 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7425 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7426 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7427 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7428 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r:{ *:[i32] } GR32:{ *:[i32] }:$src1)
7429 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT32r),
7430 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7431 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7432 GIR_RootConstrainSelectedInstOperands,
7433 // GIR_Coverage, 236,
7434 GIR_EraseRootFromParent_Done,
7435 // Label 598: @17970
7436 GIM_Try, /*On fail goto*//*Label 599*/ GIMT_Encode4(18002), // Rule ID 244 //
7437 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
7438 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7439 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7440 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7441 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7442 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r_ND:{ *:[i32] } GR32:{ *:[i32] }:$src1)
7443 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT32r_ND),
7444 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7445 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7446 GIR_RootConstrainSelectedInstOperands,
7447 // GIR_Coverage, 244,
7448 GIR_EraseRootFromParent_Done,
7449 // Label 599: @18002
7450 GIM_Try, /*On fail goto*//*Label 600*/ GIMT_Encode4(18046), // Rule ID 21259 //
7451 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7452 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7453 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7454 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7455 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7456 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7457 // MIs[1] Operand 1
7458 // No operand predicates
7459 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7460 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
7461 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR32ri),
7462 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7463 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7464 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7465 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7466 GIR_RootConstrainSelectedInstOperands,
7467 // GIR_Coverage, 21259,
7468 GIR_EraseRootFromParent_Done,
7469 // Label 600: @18046
7470 GIM_Try, /*On fail goto*//*Label 601*/ GIMT_Encode4(18090), // Rule ID 21349 //
7471 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7472 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7473 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7474 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7475 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7476 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7477 // MIs[1] Operand 1
7478 // No operand predicates
7479 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7480 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
7481 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR32ri_ND),
7482 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7483 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7484 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7485 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7486 GIR_RootConstrainSelectedInstOperands,
7487 // GIR_Coverage, 21349,
7488 GIR_EraseRootFromParent_Done,
7489 // Label 601: @18090
7490 GIM_Try, /*On fail goto*//*Label 602*/ GIMT_Encode4(18126), // Rule ID 21251 //
7491 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7492 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7493 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7494 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7495 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7496 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
7497 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR32rr),
7498 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7499 GIR_RootConstrainSelectedInstOperands,
7500 // GIR_Coverage, 21251,
7501 GIR_Done,
7502 // Label 602: @18126
7503 GIM_Try, /*On fail goto*//*Label 603*/ GIMT_Encode4(18162), // Rule ID 21341 //
7504 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7505 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7506 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7507 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7508 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
7509 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
7510 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR32rr_ND),
7511 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7512 GIR_RootConstrainSelectedInstOperands,
7513 // GIR_Coverage, 21341,
7514 GIR_Done,
7515 // Label 603: @18162
7516 GIM_Reject,
7517 // Label 592: @18163
7518 GIM_Reject,
7519 // Label 548: @18164
7520 GIM_Try, /*On fail goto*//*Label 604*/ GIMT_Encode4(18735),
7521 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7522 GIM_Try, /*On fail goto*//*Label 605*/ GIMT_Encode4(18230), // Rule ID 23418 //
7523 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
7524 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7525 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
7526 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
7527 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7528 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7529 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7530 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
7531 // MIs[0] src
7532 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
7533 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7534 // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
7535 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK64rr),
7536 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7537 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
7538 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7539 GIR_RootConstrainSelectedInstOperands,
7540 // GIR_Coverage, 23418,
7541 GIR_EraseRootFromParent_Done,
7542 // Label 605: @18230
7543 GIM_Try, /*On fail goto*//*Label 606*/ GIMT_Encode4(18339), // Rule ID 24470 //
7544 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7545 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7546 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
7547 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
7548 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7549 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
7550 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
7551 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7552 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7553 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7554 // (xor:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
7555 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7556 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
7557 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7558 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7559 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7560 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7561 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7562 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7563 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
7564 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
7565 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
7566 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
7567 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
7568 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC64rr),
7569 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7570 GIR_RootToRootCopy, /*OpIdx*/2, // src1
7571 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7572 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7573 GIR_RootConstrainSelectedInstOperands,
7574 // GIR_Coverage, 24470,
7575 GIR_EraseRootFromParent_Done,
7576 // Label 606: @18339
7577 GIM_Try, /*On fail goto*//*Label 607*/ GIMT_Encode4(18393), // Rule ID 15861 //
7578 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM),
7579 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7580 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7581 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7582 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7583 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD),
7584 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7585 // MIs[1] src
7586 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
7587 GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1,
7588 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7589 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
7590 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK64rr),
7591 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7592 GIR_RootToRootCopy, /*OpIdx*/1, // src
7593 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7594 GIR_RootConstrainSelectedInstOperands,
7595 // GIR_Coverage, 15861,
7596 GIR_EraseRootFromParent_Done,
7597 // Label 607: @18393
7598 GIM_Try, /*On fail goto*//*Label 608*/ GIMT_Encode4(18502), // Rule ID 21199 //
7599 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7600 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7601 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7602 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7603 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL),
7604 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7605 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
7606 GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1,
7607 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
7608 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7609 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
7610 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7611 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
7612 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7613 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7614 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7615 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7616 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7617 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7618 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2
7619 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
7620 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
7621 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
7622 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
7623 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC64rr),
7624 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7625 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7626 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7627 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7628 GIR_RootConstrainSelectedInstOperands,
7629 // GIR_Coverage, 21199,
7630 GIR_EraseRootFromParent_Done,
7631 // Label 608: @18502
7632 GIM_Try, /*On fail goto*//*Label 609*/ GIMT_Encode4(18534), // Rule ID 237 //
7633 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7634 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7635 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7636 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7637 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7638 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r:{ *:[i64] } GR64:{ *:[i64] }:$src1)
7639 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT64r),
7640 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7641 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7642 GIR_RootConstrainSelectedInstOperands,
7643 // GIR_Coverage, 237,
7644 GIR_EraseRootFromParent_Done,
7645 // Label 609: @18534
7646 GIM_Try, /*On fail goto*//*Label 610*/ GIMT_Encode4(18566), // Rule ID 245 //
7647 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
7648 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7649 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7650 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7651 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
7652 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r_ND:{ *:[i64] } GR64:{ *:[i64] }:$src1)
7653 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT64r_ND),
7654 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7655 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7656 GIR_RootConstrainSelectedInstOperands,
7657 // GIR_Coverage, 245,
7658 GIR_EraseRootFromParent_Done,
7659 // Label 610: @18566
7660 GIM_Try, /*On fail goto*//*Label 611*/ GIMT_Encode4(18614), // Rule ID 21260 //
7661 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7662 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7663 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7664 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7665 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7666 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7667 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
7668 // MIs[1] Operand 1
7669 // No operand predicates
7670 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7671 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (XOR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
7672 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR64ri32),
7673 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7674 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7675 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7676 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7677 GIR_RootConstrainSelectedInstOperands,
7678 // GIR_Coverage, 21260,
7679 GIR_EraseRootFromParent_Done,
7680 // Label 611: @18614
7681 GIM_Try, /*On fail goto*//*Label 612*/ GIMT_Encode4(18662), // Rule ID 21350 //
7682 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7683 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7684 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7685 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7686 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7687 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7688 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
7689 // MIs[1] Operand 1
7690 // No operand predicates
7691 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7692 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (XOR64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
7693 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR64ri32_ND),
7694 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7695 GIR_RootToRootCopy, /*OpIdx*/1, // src1
7696 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
7697 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
7698 GIR_RootConstrainSelectedInstOperands,
7699 // GIR_Coverage, 21350,
7700 GIR_EraseRootFromParent_Done,
7701 // Label 612: @18662
7702 GIM_Try, /*On fail goto*//*Label 613*/ GIMT_Encode4(18698), // Rule ID 21252 //
7703 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
7704 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7705 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7706 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7707 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7708 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
7709 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR64rr),
7710 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7711 GIR_RootConstrainSelectedInstOperands,
7712 // GIR_Coverage, 21252,
7713 GIR_Done,
7714 // Label 613: @18698
7715 GIM_Try, /*On fail goto*//*Label 614*/ GIMT_Encode4(18734), // Rule ID 21342 //
7716 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
7717 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7718 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7719 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7720 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
7721 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
7722 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR64rr_ND),
7723 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
7724 GIR_RootConstrainSelectedInstOperands,
7725 // GIR_Coverage, 21342,
7726 GIR_Done,
7727 // Label 614: @18734
7728 GIM_Reject,
7729 // Label 604: @18735
7730 GIM_Reject,
7731 // Label 549: @18736
7732 GIM_Try, /*On fail goto*//*Label 615*/ GIMT_Encode4(19250),
7733 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1,
7734 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s1,
7735 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7736 GIM_Try, /*On fail goto*//*Label 616*/ GIMT_Encode4(18865), // Rule ID 23794 //
7737 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
7738 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
7739 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1,
7740 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1,
7741 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7742 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
7743 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
7744 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
7745 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7746 GIM_CheckIsSafeToFold, /*NumInsns*/2,
7747 // (xor:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] }), VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
7748 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
7749 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
7750 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
7751 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7752 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7753 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
7754 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
7755 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7756 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7757 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
7758 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7759 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
7760 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7761 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7762 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
7763 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7764 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7765 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7766 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7767 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
7768 // GIR_Coverage, 23794,
7769 GIR_EraseRootFromParent_Done,
7770 // Label 616: @18865
7771 GIM_Try, /*On fail goto*//*Label 617*/ GIMT_Encode4(18980), // Rule ID 18031 //
7772 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
7773 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
7774 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1,
7775 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1,
7776 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7777 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7778 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
7779 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
7780 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
7781 GIM_CheckIsSafeToFold, /*NumInsns*/2,
7782 // (xor:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2), immAllOnesV:{ *:[v2i1] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
7783 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
7784 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
7785 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
7786 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7787 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7788 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2
7789 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
7790 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7791 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7792 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
7793 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7794 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
7795 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7796 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7797 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
7798 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7799 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7800 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7801 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7802 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
7803 // GIR_Coverage, 18031,
7804 GIR_EraseRootFromParent_Done,
7805 // Label 617: @18980
7806 GIM_Try, /*On fail goto*//*Label 618*/ GIMT_Encode4(19094), // Rule ID 23795 //
7807 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7808 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7809 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
7810 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1,
7811 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1,
7812 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7813 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
7814 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
7815 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
7816 GIM_CheckIsSafeToFold, /*NumInsns*/2,
7817 // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src2, (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] })) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
7818 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
7819 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
7820 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
7821 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7822 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7823 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
7824 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
7825 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7826 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7827 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
7828 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7829 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
7830 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7831 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7832 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
7833 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7834 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7835 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7836 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7837 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
7838 // GIR_Coverage, 23795,
7839 GIR_EraseRootFromParent_Done,
7840 // Label 618: @19094
7841 GIM_Try, /*On fail goto*//*Label 619*/ GIMT_Encode4(19166), // Rule ID 18015 //
7842 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7843 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7844 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
7845 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
7846 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7847 // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src, immAllOnesV:{ *:[v2i1] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src, VK16:{ *:[i32] })), VK2:{ *:[i32] })
7848 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
7849 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
7850 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7851 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7852 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
7853 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7854 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWrr),
7855 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7856 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7857 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7858 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7859 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7860 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7861 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
7862 // GIR_Coverage, 18015,
7863 GIR_EraseRootFromParent_Done,
7864 // Label 619: @19166
7865 GIM_Try, /*On fail goto*//*Label 620*/ GIMT_Encode4(19249), // Rule ID 18035 //
7866 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7867 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
7868 // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] })
7869 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
7870 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
7871 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
7872 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7873 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7874 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
7875 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
7876 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7877 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7878 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
7879 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
7880 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWrr),
7881 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7882 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7883 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
7884 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7885 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7886 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7887 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7888 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
7889 // GIR_Coverage, 18035,
7890 GIR_EraseRootFromParent_Done,
7891 // Label 620: @19249
7892 GIM_Reject,
7893 // Label 615: @19250
7894 GIM_Reject,
7895 // Label 550: @19251
7896 GIM_Try, /*On fail goto*//*Label 621*/ GIMT_Encode4(19622),
7897 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
7898 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
7899 GIM_Try, /*On fail goto*//*Label 622*/ GIMT_Encode4(19494), // Rule ID 20490 //
7900 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
7901 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
7902 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
7903 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7904 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
7905 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
7906 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7907 // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, immAllOnesV:{ *:[v2i64] }) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] })
7908 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
7909 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
7910 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
7911 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
7912 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
7913 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
7914 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
7915 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7916 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7917 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
7918 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7919 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7920 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
7921 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
7922 GIR_AddImm8, /*InsnID*/6, /*Imm*/9,
7923 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
7924 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
7925 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
7926 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7927 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7928 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
7929 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7930 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7931 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
7932 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
7933 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
7934 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
7935 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
7936 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
7937 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
7938 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7939 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
7940 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
7941 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7942 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
7943 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
7944 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
7945 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
7946 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
7947 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
7948 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
7949 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
7950 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
7951 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
7952 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
7953 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
7954 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7955 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
7956 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7957 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
7958 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
7959 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
7960 // GIR_Coverage, 20490,
7961 GIR_EraseRootFromParent_Done,
7962 // Label 622: @19494
7963 GIM_Try, /*On fail goto*//*Label 623*/ GIMT_Encode4(19540), // Rule ID 20498 //
7964 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
7965 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
7966 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
7967 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7968 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
7969 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
7970 GIM_CheckIsSafeToFold, /*NumInsns*/1,
7971 // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, immAllOnesV:{ *:[v2i64] }) => (VPTERNLOGQZ128rri:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, VR128X:{ *:[v2i64] }:$src, VR128X:{ *:[v2i64] }:$src, 15:{ *:[i8] })
7972 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri),
7973 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7974 GIR_RootToRootCopy, /*OpIdx*/1, // src
7975 GIR_RootToRootCopy, /*OpIdx*/1, // src
7976 GIR_RootToRootCopy, /*OpIdx*/1, // src
7977 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
7978 GIR_RootConstrainSelectedInstOperands,
7979 // GIR_Coverage, 20498,
7980 GIR_EraseRootFromParent_Done,
7981 // Label 623: @19540
7982 GIM_Try, /*On fail goto*//*Label 624*/ GIMT_Encode4(19567), // Rule ID 2110 //
7983 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
7984 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
7985 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
7986 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
7987 // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
7988 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr),
7989 GIR_RootConstrainSelectedInstOperands,
7990 // GIR_Coverage, 2110,
7991 GIR_Done,
7992 // Label 624: @19567
7993 GIM_Try, /*On fail goto*//*Label 625*/ GIMT_Encode4(19594), // Rule ID 2112 //
7994 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
7995 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
7996 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
7997 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
7998 // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
7999 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr),
8000 GIR_RootConstrainSelectedInstOperands,
8001 // GIR_Coverage, 2112,
8002 GIR_Done,
8003 // Label 625: @19594
8004 GIM_Try, /*On fail goto*//*Label 626*/ GIMT_Encode4(19621), // Rule ID 5764 //
8005 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
8006 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8007 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8008 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8009 // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPXORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
8010 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ128rr),
8011 GIR_RootConstrainSelectedInstOperands,
8012 // GIR_Coverage, 5764,
8013 GIR_Done,
8014 // Label 626: @19621
8015 GIM_Reject,
8016 // Label 621: @19622
8017 GIM_Reject,
8018 // Label 551: @19623
8019 GIM_Try, /*On fail goto*//*Label 627*/ GIMT_Encode4(20137),
8020 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1,
8021 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s1,
8022 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8023 GIM_Try, /*On fail goto*//*Label 628*/ GIMT_Encode4(19752), // Rule ID 23796 //
8024 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8025 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8026 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1,
8027 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1,
8028 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8029 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
8030 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8031 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8032 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8033 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8034 // (xor:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] }), VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
8035 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8036 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8037 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8038 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8039 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8040 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
8041 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8042 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8043 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8044 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
8045 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8046 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
8047 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8048 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8049 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8050 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8051 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8052 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8053 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8054 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
8055 // GIR_Coverage, 23796,
8056 GIR_EraseRootFromParent_Done,
8057 // Label 628: @19752
8058 GIM_Try, /*On fail goto*//*Label 629*/ GIMT_Encode4(19867), // Rule ID 18032 //
8059 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8060 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8061 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1,
8062 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1,
8063 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8064 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8065 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
8066 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8067 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8068 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8069 // (xor:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2), immAllOnesV:{ *:[v4i1] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
8070 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8071 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8072 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8073 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8074 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8075 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2
8076 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8077 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8078 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8079 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
8080 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8081 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
8082 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8083 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8084 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8085 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8086 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8087 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8088 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8089 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
8090 // GIR_Coverage, 18032,
8091 GIR_EraseRootFromParent_Done,
8092 // Label 629: @19867
8093 GIM_Try, /*On fail goto*//*Label 630*/ GIMT_Encode4(19981), // Rule ID 23797 //
8094 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8095 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8096 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8097 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1,
8098 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1,
8099 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8100 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
8101 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8102 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8103 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8104 // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src2, (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] })) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
8105 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8106 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8107 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8108 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8109 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8110 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
8111 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8112 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8113 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8114 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
8115 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8116 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
8117 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8118 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8119 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8120 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8121 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8122 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8123 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8124 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
8125 // GIR_Coverage, 23797,
8126 GIR_EraseRootFromParent_Done,
8127 // Label 630: @19981
8128 GIM_Try, /*On fail goto*//*Label 631*/ GIMT_Encode4(20053), // Rule ID 18014 //
8129 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8130 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8131 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8132 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8133 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8134 // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src, immAllOnesV:{ *:[v4i1] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src, VK16:{ *:[i32] })), VK4:{ *:[i32] })
8135 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8136 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8137 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8138 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8139 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
8140 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8141 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWrr),
8142 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8143 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8144 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8145 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8146 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8147 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8148 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
8149 // GIR_Coverage, 18014,
8150 GIR_EraseRootFromParent_Done,
8151 // Label 631: @20053
8152 GIM_Try, /*On fail goto*//*Label 632*/ GIMT_Encode4(20136), // Rule ID 18036 //
8153 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8154 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
8155 // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] })
8156 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8157 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8158 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8159 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8160 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8161 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
8162 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8163 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8164 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8165 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
8166 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8167 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWrr),
8168 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8169 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8170 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8171 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8172 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8173 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8174 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8175 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
8176 // GIR_Coverage, 18036,
8177 GIR_EraseRootFromParent_Done,
8178 // Label 632: @20136
8179 GIM_Reject,
8180 // Label 627: @20137
8181 GIM_Reject,
8182 // Label 552: @20138
8183 GIM_Try, /*On fail goto*//*Label 633*/ GIMT_Encode4(20509),
8184 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
8185 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
8186 GIM_Try, /*On fail goto*//*Label 634*/ GIMT_Encode4(20381), // Rule ID 20489 //
8187 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
8188 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
8189 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8190 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8191 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8192 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8193 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8194 // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, immAllOnesV:{ *:[v4i32] }) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] })
8195 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
8196 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
8197 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
8198 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
8199 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
8200 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
8201 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
8202 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8203 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8204 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
8205 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8206 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8207 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
8208 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
8209 GIR_AddImm8, /*InsnID*/6, /*Imm*/9,
8210 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8211 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8212 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
8213 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8214 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8215 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
8216 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8217 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8218 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
8219 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
8220 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
8221 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8222 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8223 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
8224 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8225 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8226 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8227 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8228 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8229 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
8230 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
8231 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
8232 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8233 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8234 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
8235 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
8236 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8237 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8238 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
8239 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
8240 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
8241 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8242 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8243 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8244 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
8245 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
8246 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8247 // GIR_Coverage, 20489,
8248 GIR_EraseRootFromParent_Done,
8249 // Label 634: @20381
8250 GIM_Try, /*On fail goto*//*Label 635*/ GIMT_Encode4(20427), // Rule ID 20497 //
8251 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
8252 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8253 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8254 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8255 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8256 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8257 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8258 // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, immAllOnesV:{ *:[v4i32] }) => (VPTERNLOGQZ128rri:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, VR128X:{ *:[v4i32] }:$src, VR128X:{ *:[v4i32] }:$src, 15:{ *:[i8] })
8259 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri),
8260 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8261 GIR_RootToRootCopy, /*OpIdx*/1, // src
8262 GIR_RootToRootCopy, /*OpIdx*/1, // src
8263 GIR_RootToRootCopy, /*OpIdx*/1, // src
8264 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
8265 GIR_RootConstrainSelectedInstOperands,
8266 // GIR_Coverage, 20497,
8267 GIR_EraseRootFromParent_Done,
8268 // Label 635: @20427
8269 GIM_Try, /*On fail goto*//*Label 636*/ GIMT_Encode4(20454), // Rule ID 5791 //
8270 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
8271 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8272 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8273 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8274 // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPXORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
8275 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORDZ128rr),
8276 GIR_RootConstrainSelectedInstOperands,
8277 // GIR_Coverage, 5791,
8278 GIR_Done,
8279 // Label 636: @20454
8280 GIM_Try, /*On fail goto*//*Label 637*/ GIMT_Encode4(20481), // Rule ID 16664 //
8281 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
8282 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8283 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8284 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8285 // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
8286 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr),
8287 GIR_RootConstrainSelectedInstOperands,
8288 // GIR_Coverage, 16664,
8289 GIR_Done,
8290 // Label 637: @20481
8291 GIM_Try, /*On fail goto*//*Label 638*/ GIMT_Encode4(20508), // Rule ID 16688 //
8292 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
8293 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8294 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8295 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8296 // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
8297 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr),
8298 GIR_RootConstrainSelectedInstOperands,
8299 // GIR_Coverage, 16688,
8300 GIR_Done,
8301 // Label 638: @20508
8302 GIM_Reject,
8303 // Label 633: @20509
8304 GIM_Reject,
8305 // Label 553: @20510
8306 GIM_Try, /*On fail goto*//*Label 639*/ GIMT_Encode4(20881),
8307 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
8308 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
8309 GIM_Try, /*On fail goto*//*Label 640*/ GIMT_Encode4(20753), // Rule ID 20494 //
8310 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
8311 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
8312 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8313 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8314 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8315 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8316 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8317 // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, immAllOnesV:{ *:[v4i64] }) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] })
8318 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
8319 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
8320 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
8321 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
8322 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
8323 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
8324 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
8325 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8326 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8327 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
8328 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8329 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8330 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
8331 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
8332 GIR_AddImm8, /*InsnID*/6, /*Imm*/10,
8333 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8334 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8335 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
8336 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8337 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8338 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
8339 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8340 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8341 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
8342 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
8343 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
8344 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8345 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8346 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
8347 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8348 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8349 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8350 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8351 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8352 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
8353 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
8354 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
8355 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8356 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8357 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
8358 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
8359 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8360 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8361 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
8362 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
8363 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
8364 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8365 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8366 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8367 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
8368 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
8369 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8370 // GIR_Coverage, 20494,
8371 GIR_EraseRootFromParent_Done,
8372 // Label 640: @20753
8373 GIM_Try, /*On fail goto*//*Label 641*/ GIMT_Encode4(20799), // Rule ID 20502 //
8374 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
8375 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8376 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8377 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8378 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8379 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8380 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8381 // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, immAllOnesV:{ *:[v4i64] }) => (VPTERNLOGQZ256rri:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, VR256X:{ *:[v4i64] }:$src, VR256X:{ *:[v4i64] }:$src, 15:{ *:[i8] })
8382 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri),
8383 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8384 GIR_RootToRootCopy, /*OpIdx*/1, // src
8385 GIR_RootToRootCopy, /*OpIdx*/1, // src
8386 GIR_RootToRootCopy, /*OpIdx*/1, // src
8387 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
8388 GIR_RootConstrainSelectedInstOperands,
8389 // GIR_Coverage, 20502,
8390 GIR_EraseRootFromParent_Done,
8391 // Label 641: @20799
8392 GIM_Try, /*On fail goto*//*Label 642*/ GIMT_Encode4(20826), // Rule ID 2114 //
8393 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
8394 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8395 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8396 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8397 // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPXORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
8398 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr),
8399 GIR_RootConstrainSelectedInstOperands,
8400 // GIR_Coverage, 2114,
8401 GIR_Done,
8402 // Label 642: @20826
8403 GIM_Try, /*On fail goto*//*Label 643*/ GIMT_Encode4(20853), // Rule ID 5755 //
8404 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
8405 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8406 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8407 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8408 // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPXORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
8409 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ256rr),
8410 GIR_RootConstrainSelectedInstOperands,
8411 // GIR_Coverage, 5755,
8412 GIR_Done,
8413 // Label 643: @20853
8414 GIM_Try, /*On fail goto*//*Label 644*/ GIMT_Encode4(20880), // Rule ID 16635 //
8415 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
8416 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8417 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8418 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8419 // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VXORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
8420 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr),
8421 GIR_RootConstrainSelectedInstOperands,
8422 // GIR_Coverage, 16635,
8423 GIR_Done,
8424 // Label 644: @20880
8425 GIM_Reject,
8426 // Label 639: @20881
8427 GIM_Reject,
8428 // Label 554: @20882
8429 GIM_Try, /*On fail goto*//*Label 645*/ GIMT_Encode4(21652),
8430 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
8431 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1,
8432 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8433 GIM_Try, /*On fail goto*//*Label 646*/ GIMT_Encode4(20957), // Rule ID 22104 //
8434 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
8435 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8436 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8437 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
8438 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
8439 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8440 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
8441 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8442 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8443 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8444 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8445 // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (KXNORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
8446 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORBrr),
8447 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8448 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
8449 GIR_RootToRootCopy, /*OpIdx*/2, // src2
8450 GIR_RootConstrainSelectedInstOperands,
8451 // GIR_Coverage, 22104,
8452 GIR_EraseRootFromParent_Done,
8453 // Label 646: @20957
8454 GIM_Try, /*On fail goto*//*Label 647*/ GIMT_Encode4(21074), // Rule ID 23790 //
8455 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
8456 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8457 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8458 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
8459 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
8460 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8461 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
8462 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8463 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8464 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8465 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8466 // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
8467 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8468 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8469 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8470 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8471 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8472 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
8473 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8474 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8475 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8476 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
8477 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8478 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
8479 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8480 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8481 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8482 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8483 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8484 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8485 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8486 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
8487 // GIR_Coverage, 23790,
8488 GIR_EraseRootFromParent_Done,
8489 // Label 647: @21074
8490 GIM_Try, /*On fail goto*//*Label 648*/ GIMT_Encode4(21137), // Rule ID 4375 //
8491 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
8492 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8493 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8494 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
8495 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
8496 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8497 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8498 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
8499 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8500 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8501 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8502 // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2), immAllOnesV:{ *:[v8i1] }) => (KXNORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
8503 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORBrr),
8504 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8505 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
8506 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
8507 GIR_RootConstrainSelectedInstOperands,
8508 // GIR_Coverage, 4375,
8509 GIR_EraseRootFromParent_Done,
8510 // Label 648: @21137
8511 GIM_Try, /*On fail goto*//*Label 649*/ GIMT_Encode4(21255), // Rule ID 18029 //
8512 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
8513 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8514 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8515 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
8516 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
8517 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8518 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8519 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
8520 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8521 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8522 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8523 // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2), immAllOnesV:{ *:[v8i1] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
8524 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8525 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8526 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8527 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8528 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8529 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2
8530 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8531 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8532 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8533 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
8534 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8535 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
8536 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8537 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8538 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8539 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8540 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8541 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8542 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8543 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
8544 // GIR_Coverage, 18029,
8545 GIR_EraseRootFromParent_Done,
8546 // Label 649: @21255
8547 GIM_Try, /*On fail goto*//*Label 650*/ GIMT_Encode4(21315), // Rule ID 22105 //
8548 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
8549 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8550 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8551 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8552 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
8553 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
8554 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8555 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
8556 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8557 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8558 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8559 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (KXNORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
8560 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORBrr),
8561 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8562 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
8563 GIR_RootToRootCopy, /*OpIdx*/1, // src2
8564 GIR_RootConstrainSelectedInstOperands,
8565 // GIR_Coverage, 22105,
8566 GIR_EraseRootFromParent_Done,
8567 // Label 650: @21315
8568 GIM_Try, /*On fail goto*//*Label 651*/ GIMT_Encode4(21432), // Rule ID 23791 //
8569 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
8570 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8571 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8572 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8573 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
8574 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
8575 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8576 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
8577 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8578 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8579 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8580 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
8581 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8582 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8583 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8584 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8585 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8586 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
8587 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8588 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8589 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8590 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
8591 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8592 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
8593 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8594 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8595 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8596 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8597 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8598 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8599 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8600 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
8601 // GIR_Coverage, 23791,
8602 GIR_EraseRootFromParent_Done,
8603 // Label 651: @21432
8604 GIM_Try, /*On fail goto*//*Label 652*/ GIMT_Encode4(21467), // Rule ID 4363 //
8605 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
8606 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8607 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8608 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8609 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8610 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8611 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src, immAllOnesV:{ *:[v8i1] }) => (KNOTBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src)
8612 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTBrr),
8613 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8614 GIR_RootToRootCopy, /*OpIdx*/1, // src
8615 GIR_RootConstrainSelectedInstOperands,
8616 // GIR_Coverage, 4363,
8617 GIR_EraseRootFromParent_Done,
8618 // Label 652: @21467
8619 GIM_Try, /*On fail goto*//*Label 653*/ GIMT_Encode4(21542), // Rule ID 18013 //
8620 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_NoDQI),
8621 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8622 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8623 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8624 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8625 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8626 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src, immAllOnesV:{ *:[v8i1] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src, VK16:{ *:[i32] })), VK8:{ *:[i32] })
8627 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8628 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8629 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8630 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8631 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
8632 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8633 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWrr),
8634 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8635 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8636 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8637 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8638 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8639 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8640 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
8641 // GIR_Coverage, 18013,
8642 GIR_EraseRootFromParent_Done,
8643 // Label 653: @21542
8644 GIM_Try, /*On fail goto*//*Label 654*/ GIMT_Encode4(21565), // Rule ID 4379 //
8645 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
8646 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8647 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8648 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KXORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
8649 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORBrr),
8650 GIR_RootConstrainSelectedInstOperands,
8651 // GIR_Coverage, 4379,
8652 GIR_Done,
8653 // Label 654: @21565
8654 GIM_Try, /*On fail goto*//*Label 655*/ GIMT_Encode4(21651), // Rule ID 18033 //
8655 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI),
8656 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8657 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
8658 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
8659 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
8660 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
8661 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
8662 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8663 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8664 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
8665 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8666 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8667 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8668 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
8669 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
8670 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWrr),
8671 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8672 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8673 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
8674 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8675 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8676 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8677 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8678 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
8679 // GIR_Coverage, 18033,
8680 GIR_EraseRootFromParent_Done,
8681 // Label 655: @21651
8682 GIM_Reject,
8683 // Label 645: @21652
8684 GIM_Reject,
8685 // Label 555: @21653
8686 GIM_Try, /*On fail goto*//*Label 656*/ GIMT_Encode4(22024),
8687 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
8688 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
8689 GIM_Try, /*On fail goto*//*Label 657*/ GIMT_Encode4(21896), // Rule ID 20488 //
8690 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
8691 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
8692 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8693 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8694 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8695 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8696 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8697 // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, immAllOnesV:{ *:[v8i16] }) => (EXTRACT_SUBREG:{ *:[v8i16] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] })
8698 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
8699 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
8700 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
8701 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
8702 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
8703 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
8704 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
8705 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8706 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8707 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
8708 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8709 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8710 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
8711 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
8712 GIR_AddImm8, /*InsnID*/6, /*Imm*/9,
8713 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8714 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8715 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
8716 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8717 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8718 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
8719 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8720 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8721 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
8722 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
8723 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
8724 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8725 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8726 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
8727 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8728 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8729 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8730 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8731 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8732 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
8733 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
8734 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
8735 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8736 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8737 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
8738 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
8739 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8740 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8741 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
8742 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
8743 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
8744 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8745 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8746 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8747 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
8748 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
8749 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8750 // GIR_Coverage, 20488,
8751 GIR_EraseRootFromParent_Done,
8752 // Label 657: @21896
8753 GIM_Try, /*On fail goto*//*Label 658*/ GIMT_Encode4(21942), // Rule ID 20496 //
8754 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
8755 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8756 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8757 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8758 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8759 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8760 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8761 // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, immAllOnesV:{ *:[v8i16] }) => (VPTERNLOGQZ128rri:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, VR128X:{ *:[v8i16] }:$src, VR128X:{ *:[v8i16] }:$src, 15:{ *:[i8] })
8762 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri),
8763 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8764 GIR_RootToRootCopy, /*OpIdx*/1, // src
8765 GIR_RootToRootCopy, /*OpIdx*/1, // src
8766 GIR_RootToRootCopy, /*OpIdx*/1, // src
8767 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
8768 GIR_RootConstrainSelectedInstOperands,
8769 // GIR_Coverage, 20496,
8770 GIR_EraseRootFromParent_Done,
8771 // Label 658: @21942
8772 GIM_Try, /*On fail goto*//*Label 659*/ GIMT_Encode4(21969), // Rule ID 16663 //
8773 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
8774 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8775 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8776 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8777 // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
8778 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr),
8779 GIR_RootConstrainSelectedInstOperands,
8780 // GIR_Coverage, 16663,
8781 GIR_Done,
8782 // Label 659: @21969
8783 GIM_Try, /*On fail goto*//*Label 660*/ GIMT_Encode4(21996), // Rule ID 16687 //
8784 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
8785 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8786 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8787 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
8788 // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
8789 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr),
8790 GIR_RootConstrainSelectedInstOperands,
8791 // GIR_Coverage, 16687,
8792 GIR_Done,
8793 // Label 660: @21996
8794 GIM_Try, /*On fail goto*//*Label 661*/ GIMT_Encode4(22023), // Rule ID 18601 //
8795 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
8796 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8797 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8798 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
8799 // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPXORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
8800 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ128rr),
8801 GIR_RootConstrainSelectedInstOperands,
8802 // GIR_Coverage, 18601,
8803 GIR_Done,
8804 // Label 661: @22023
8805 GIM_Reject,
8806 // Label 656: @22024
8807 GIM_Reject,
8808 // Label 556: @22025
8809 GIM_Try, /*On fail goto*//*Label 662*/ GIMT_Encode4(22396),
8810 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
8811 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
8812 GIM_Try, /*On fail goto*//*Label 663*/ GIMT_Encode4(22268), // Rule ID 20493 //
8813 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
8814 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
8815 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8816 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8817 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8818 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8819 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8820 // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, immAllOnesV:{ *:[v8i32] }) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] })
8821 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
8822 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
8823 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
8824 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
8825 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
8826 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
8827 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
8828 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8829 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8830 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
8831 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8832 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8833 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
8834 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
8835 GIR_AddImm8, /*InsnID*/6, /*Imm*/10,
8836 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8837 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8838 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
8839 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8840 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8841 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
8842 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8843 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8844 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
8845 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
8846 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
8847 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8848 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8849 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
8850 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
8851 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8852 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
8853 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
8854 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8855 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
8856 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
8857 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
8858 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
8859 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8860 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
8861 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
8862 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
8863 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
8864 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
8865 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
8866 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
8867 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8868 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
8869 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8870 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
8871 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
8872 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
8873 // GIR_Coverage, 20493,
8874 GIR_EraseRootFromParent_Done,
8875 // Label 663: @22268
8876 GIM_Try, /*On fail goto*//*Label 664*/ GIMT_Encode4(22314), // Rule ID 20501 //
8877 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
8878 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8879 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8880 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8881 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8882 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8883 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8884 // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, immAllOnesV:{ *:[v8i32] }) => (VPTERNLOGQZ256rri:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, VR256X:{ *:[v8i32] }:$src, VR256X:{ *:[v8i32] }:$src, 15:{ *:[i8] })
8885 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri),
8886 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8887 GIR_RootToRootCopy, /*OpIdx*/1, // src
8888 GIR_RootToRootCopy, /*OpIdx*/1, // src
8889 GIR_RootToRootCopy, /*OpIdx*/1, // src
8890 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
8891 GIR_RootConstrainSelectedInstOperands,
8892 // GIR_Coverage, 20501,
8893 GIR_EraseRootFromParent_Done,
8894 // Label 664: @22314
8895 GIM_Try, /*On fail goto*//*Label 665*/ GIMT_Encode4(22341), // Rule ID 5782 //
8896 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
8897 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8898 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8899 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
8900 // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPXORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
8901 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORDZ256rr),
8902 GIR_RootConstrainSelectedInstOperands,
8903 // GIR_Coverage, 5782,
8904 GIR_Done,
8905 // Label 665: @22341
8906 GIM_Try, /*On fail goto*//*Label 666*/ GIMT_Encode4(22368), // Rule ID 16608 //
8907 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
8908 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8909 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8910 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8911 // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPXORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
8912 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr),
8913 GIR_RootConstrainSelectedInstOperands,
8914 // GIR_Coverage, 16608,
8915 GIR_Done,
8916 // Label 666: @22368
8917 GIM_Try, /*On fail goto*//*Label 667*/ GIMT_Encode4(22395), // Rule ID 16634 //
8918 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
8919 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8920 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8921 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
8922 // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VXORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
8923 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr),
8924 GIR_RootConstrainSelectedInstOperands,
8925 // GIR_Coverage, 16634,
8926 GIR_Done,
8927 // Label 667: @22395
8928 GIM_Reject,
8929 // Label 662: @22396
8930 GIM_Reject,
8931 // Label 557: @22397
8932 GIM_Try, /*On fail goto*//*Label 668*/ GIMT_Encode4(22474),
8933 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
8934 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
8935 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
8936 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
8937 GIM_Try, /*On fail goto*//*Label 669*/ GIMT_Encode4(22454), // Rule ID 20486 //
8938 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
8939 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8940 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8941 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
8942 GIM_CheckIsSafeToFold, /*NumInsns*/1,
8943 // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src, immAllOnesV:{ *:[v8i64] }) => (VPTERNLOGQZrri:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src, VR512:{ *:[v8i64] }:$src, VR512:{ *:[v8i64] }:$src, 15:{ *:[i8] })
8944 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
8945 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8946 GIR_RootToRootCopy, /*OpIdx*/1, // src
8947 GIR_RootToRootCopy, /*OpIdx*/1, // src
8948 GIR_RootToRootCopy, /*OpIdx*/1, // src
8949 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
8950 GIR_RootConstrainSelectedInstOperands,
8951 // GIR_Coverage, 20486,
8952 GIR_EraseRootFromParent_Done,
8953 // Label 669: @22454
8954 GIM_Try, /*On fail goto*//*Label 670*/ GIMT_Encode4(22473), // Rule ID 5746 //
8955 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
8956 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
8957 // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPXORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
8958 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZrr),
8959 GIR_RootConstrainSelectedInstOperands,
8960 // GIR_Coverage, 5746,
8961 GIR_Done,
8962 // Label 670: @22473
8963 GIM_Reject,
8964 // Label 668: @22474
8965 GIM_Reject,
8966 // Label 558: @22475
8967 GIM_Try, /*On fail goto*//*Label 671*/ GIMT_Encode4(22732),
8968 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
8969 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1,
8970 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
8971 GIM_Try, /*On fail goto*//*Label 672*/ GIMT_Encode4(22550), // Rule ID 22106 //
8972 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
8973 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8974 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8975 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
8976 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1,
8977 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
8978 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
8979 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
8980 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
8981 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
8982 GIM_CheckIsSafeToFold, /*NumInsns*/2,
8983 // (xor:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] }), VK16:{ *:[v16i1] }:$src2) => (KXNORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
8984 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
8985 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8986 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
8987 GIR_RootToRootCopy, /*OpIdx*/2, // src2
8988 GIR_RootConstrainSelectedInstOperands,
8989 // GIR_Coverage, 22106,
8990 GIR_EraseRootFromParent_Done,
8991 // Label 672: @22550
8992 GIM_Try, /*On fail goto*//*Label 673*/ GIMT_Encode4(22613), // Rule ID 4376 //
8993 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
8994 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8995 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
8996 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
8997 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1,
8998 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
8999 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9000 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
9001 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9002 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9003 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9004 // (xor:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2), immAllOnesV:{ *:[v16i1] }) => (KXNORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
9005 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
9006 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9007 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9008 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
9009 GIR_RootConstrainSelectedInstOperands,
9010 // GIR_Coverage, 4376,
9011 GIR_EraseRootFromParent_Done,
9012 // Label 673: @22613
9013 GIM_Try, /*On fail goto*//*Label 674*/ GIMT_Encode4(22673), // Rule ID 22107 //
9014 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9015 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9016 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9017 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
9018 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
9019 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1,
9020 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9021 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
9022 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9023 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9024 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9025 // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src2, (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] })) => (KXNORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
9026 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORWrr),
9027 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9028 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9029 GIR_RootToRootCopy, /*OpIdx*/1, // src2
9030 GIR_RootConstrainSelectedInstOperands,
9031 // GIR_Coverage, 22107,
9032 GIR_EraseRootFromParent_Done,
9033 // Label 674: @22673
9034 GIM_Try, /*On fail goto*//*Label 675*/ GIMT_Encode4(22708), // Rule ID 4364 //
9035 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9036 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9037 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9038 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9039 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9040 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9041 // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src, immAllOnesV:{ *:[v16i1] }) => (KNOTWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src)
9042 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTWrr),
9043 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9044 GIR_RootToRootCopy, /*OpIdx*/1, // src
9045 GIR_RootConstrainSelectedInstOperands,
9046 // GIR_Coverage, 4364,
9047 GIR_EraseRootFromParent_Done,
9048 // Label 675: @22708
9049 GIM_Try, /*On fail goto*//*Label 676*/ GIMT_Encode4(22731), // Rule ID 4380 //
9050 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9051 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9052 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9053 // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KXORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
9054 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORWrr),
9055 GIR_RootConstrainSelectedInstOperands,
9056 // GIR_Coverage, 4380,
9057 GIR_Done,
9058 // Label 676: @22731
9059 GIM_Reject,
9060 // Label 671: @22732
9061 GIM_Reject,
9062 // Label 559: @22733
9063 GIM_Try, /*On fail goto*//*Label 677*/ GIMT_Encode4(23104),
9064 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
9065 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
9066 GIM_Try, /*On fail goto*//*Label 678*/ GIMT_Encode4(22976), // Rule ID 20487 //
9067 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
9068 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9069 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
9070 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9071 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9072 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9073 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9074 // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, immAllOnesV:{ *:[v16i8] }) => (EXTRACT_SUBREG:{ *:[v16i8] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] })
9075 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
9076 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
9077 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
9078 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
9079 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
9080 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
9081 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
9082 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9083 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9084 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
9085 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9086 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9087 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
9088 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
9089 GIR_AddImm8, /*InsnID*/6, /*Imm*/9,
9090 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9091 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9092 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
9093 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9094 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9095 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
9096 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9097 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9098 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
9099 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
9100 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
9101 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9102 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9103 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
9104 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9105 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9106 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
9107 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9108 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9109 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
9110 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
9111 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
9112 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9113 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9114 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
9115 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
9116 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9117 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9118 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
9119 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
9120 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
9121 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9122 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9123 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9124 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
9125 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
9126 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9127 // GIR_Coverage, 20487,
9128 GIR_EraseRootFromParent_Done,
9129 // Label 678: @22976
9130 GIM_Try, /*On fail goto*//*Label 679*/ GIMT_Encode4(23022), // Rule ID 20495 //
9131 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
9132 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
9133 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
9134 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9135 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9136 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9137 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9138 // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, immAllOnesV:{ *:[v16i8] }) => (VPTERNLOGQZ128rri:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, VR128X:{ *:[v16i8] }:$src, VR128X:{ *:[v16i8] }:$src, 15:{ *:[i8] })
9139 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri),
9140 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9141 GIR_RootToRootCopy, /*OpIdx*/1, // src
9142 GIR_RootToRootCopy, /*OpIdx*/1, // src
9143 GIR_RootToRootCopy, /*OpIdx*/1, // src
9144 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
9145 GIR_RootConstrainSelectedInstOperands,
9146 // GIR_Coverage, 20495,
9147 GIR_EraseRootFromParent_Done,
9148 // Label 679: @23022
9149 GIM_Try, /*On fail goto*//*Label 680*/ GIMT_Encode4(23049), // Rule ID 16662 //
9150 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
9151 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
9152 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
9153 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
9154 // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
9155 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr),
9156 GIR_RootConstrainSelectedInstOperands,
9157 // GIR_Coverage, 16662,
9158 GIR_Done,
9159 // Label 680: @23049
9160 GIM_Try, /*On fail goto*//*Label 681*/ GIMT_Encode4(23076), // Rule ID 16686 //
9161 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
9162 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
9163 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
9164 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
9165 // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
9166 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr),
9167 GIR_RootConstrainSelectedInstOperands,
9168 // GIR_Coverage, 16686,
9169 GIR_Done,
9170 // Label 681: @23076
9171 GIM_Try, /*On fail goto*//*Label 682*/ GIMT_Encode4(23103), // Rule ID 18600 //
9172 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
9173 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
9174 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
9175 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
9176 // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPXORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
9177 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ128rr),
9178 GIR_RootConstrainSelectedInstOperands,
9179 // GIR_Coverage, 18600,
9180 GIR_Done,
9181 // Label 682: @23103
9182 GIM_Reject,
9183 // Label 677: @23104
9184 GIM_Reject,
9185 // Label 560: @23105
9186 GIM_Try, /*On fail goto*//*Label 683*/ GIMT_Encode4(23476),
9187 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
9188 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
9189 GIM_Try, /*On fail goto*//*Label 684*/ GIMT_Encode4(23348), // Rule ID 20492 //
9190 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
9191 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9192 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9193 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9194 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9195 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9196 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9197 // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, immAllOnesV:{ *:[v16i16] }) => (EXTRACT_SUBREG:{ *:[v16i16] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] })
9198 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
9199 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
9200 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
9201 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
9202 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
9203 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
9204 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
9205 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9206 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9207 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
9208 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9209 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9210 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
9211 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
9212 GIR_AddImm8, /*InsnID*/6, /*Imm*/10,
9213 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9214 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9215 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
9216 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9217 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9218 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
9219 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9220 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9221 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
9222 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
9223 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
9224 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9225 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9226 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
9227 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9228 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9229 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
9230 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9231 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9232 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
9233 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
9234 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
9235 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9236 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9237 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
9238 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
9239 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9240 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9241 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
9242 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
9243 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
9244 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9245 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9246 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9247 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
9248 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
9249 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9250 // GIR_Coverage, 20492,
9251 GIR_EraseRootFromParent_Done,
9252 // Label 684: @23348
9253 GIM_Try, /*On fail goto*//*Label 685*/ GIMT_Encode4(23394), // Rule ID 20500 //
9254 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
9255 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9256 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9257 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9258 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9259 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9260 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9261 // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, immAllOnesV:{ *:[v16i16] }) => (VPTERNLOGQZ256rri:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, VR256X:{ *:[v16i16] }:$src, VR256X:{ *:[v16i16] }:$src, 15:{ *:[i8] })
9262 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri),
9263 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9264 GIR_RootToRootCopy, /*OpIdx*/1, // src
9265 GIR_RootToRootCopy, /*OpIdx*/1, // src
9266 GIR_RootToRootCopy, /*OpIdx*/1, // src
9267 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
9268 GIR_RootConstrainSelectedInstOperands,
9269 // GIR_Coverage, 20500,
9270 GIR_EraseRootFromParent_Done,
9271 // Label 685: @23394
9272 GIM_Try, /*On fail goto*//*Label 686*/ GIMT_Encode4(23421), // Rule ID 16607 //
9273 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
9274 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9275 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9276 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9277 // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPXORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
9278 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr),
9279 GIR_RootConstrainSelectedInstOperands,
9280 // GIR_Coverage, 16607,
9281 GIR_Done,
9282 // Label 686: @23421
9283 GIM_Try, /*On fail goto*//*Label 687*/ GIMT_Encode4(23448), // Rule ID 16633 //
9284 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
9285 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9286 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9287 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9288 // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VXORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
9289 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr),
9290 GIR_RootConstrainSelectedInstOperands,
9291 // GIR_Coverage, 16633,
9292 GIR_Done,
9293 // Label 687: @23448
9294 GIM_Try, /*On fail goto*//*Label 688*/ GIMT_Encode4(23475), // Rule ID 18617 //
9295 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
9296 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9297 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9298 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9299 // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPXORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
9300 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ256rr),
9301 GIR_RootConstrainSelectedInstOperands,
9302 // GIR_Coverage, 18617,
9303 GIR_Done,
9304 // Label 688: @23475
9305 GIM_Reject,
9306 // Label 683: @23476
9307 GIM_Reject,
9308 // Label 561: @23477
9309 GIM_Try, /*On fail goto*//*Label 689*/ GIMT_Encode4(23554),
9310 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
9311 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
9312 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9313 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9314 GIM_Try, /*On fail goto*//*Label 690*/ GIMT_Encode4(23534), // Rule ID 20485 //
9315 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9316 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9317 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9318 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9319 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9320 // (xor:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src, immAllOnesV:{ *:[v16i32] }) => (VPTERNLOGQZrri:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src, VR512:{ *:[v16i32] }:$src, VR512:{ *:[v16i32] }:$src, 15:{ *:[i8] })
9321 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
9322 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9323 GIR_RootToRootCopy, /*OpIdx*/1, // src
9324 GIR_RootToRootCopy, /*OpIdx*/1, // src
9325 GIR_RootToRootCopy, /*OpIdx*/1, // src
9326 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
9327 GIR_RootConstrainSelectedInstOperands,
9328 // GIR_Coverage, 20485,
9329 GIR_EraseRootFromParent_Done,
9330 // Label 690: @23534
9331 GIM_Try, /*On fail goto*//*Label 691*/ GIMT_Encode4(23553), // Rule ID 5773 //
9332 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9333 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9334 // (xor:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPXORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
9335 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORDZrr),
9336 GIR_RootConstrainSelectedInstOperands,
9337 // GIR_Coverage, 5773,
9338 GIR_Done,
9339 // Label 691: @23553
9340 GIM_Reject,
9341 // Label 689: @23554
9342 GIM_Reject,
9343 // Label 562: @23555
9344 GIM_Try, /*On fail goto*//*Label 692*/ GIMT_Encode4(23812),
9345 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
9346 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1,
9347 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9348 GIM_Try, /*On fail goto*//*Label 693*/ GIMT_Encode4(23630), // Rule ID 22108 //
9349 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9350 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9351 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
9352 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1,
9353 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1,
9354 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9355 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
9356 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9357 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9358 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9359 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9360 // (xor:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] }), VK32:{ *:[v32i1] }:$src2) => (KXNORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
9361 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORDrr),
9362 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9363 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9364 GIR_RootToRootCopy, /*OpIdx*/2, // src2
9365 GIR_RootConstrainSelectedInstOperands,
9366 // GIR_Coverage, 22108,
9367 GIR_EraseRootFromParent_Done,
9368 // Label 693: @23630
9369 GIM_Try, /*On fail goto*//*Label 694*/ GIMT_Encode4(23693), // Rule ID 4377 //
9370 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9371 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9372 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
9373 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1,
9374 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1,
9375 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9376 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9377 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
9378 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9379 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9380 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9381 // (xor:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2), immAllOnesV:{ *:[v32i1] }) => (KXNORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
9382 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORDrr),
9383 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9384 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9385 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
9386 GIR_RootConstrainSelectedInstOperands,
9387 // GIR_Coverage, 4377,
9388 GIR_EraseRootFromParent_Done,
9389 // Label 694: @23693
9390 GIM_Try, /*On fail goto*//*Label 695*/ GIMT_Encode4(23753), // Rule ID 22109 //
9391 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9392 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9393 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9394 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
9395 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1,
9396 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1,
9397 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9398 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
9399 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9400 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9401 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9402 // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src2, (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] })) => (KXNORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
9403 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORDrr),
9404 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9405 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9406 GIR_RootToRootCopy, /*OpIdx*/1, // src2
9407 GIR_RootConstrainSelectedInstOperands,
9408 // GIR_Coverage, 22109,
9409 GIR_EraseRootFromParent_Done,
9410 // Label 695: @23753
9411 GIM_Try, /*On fail goto*//*Label 696*/ GIMT_Encode4(23788), // Rule ID 4365 //
9412 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9413 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9414 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9415 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9416 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9417 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9418 // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src, immAllOnesV:{ *:[v32i1] }) => (KNOTDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src)
9419 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTDrr),
9420 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9421 GIR_RootToRootCopy, /*OpIdx*/1, // src
9422 GIR_RootConstrainSelectedInstOperands,
9423 // GIR_Coverage, 4365,
9424 GIR_EraseRootFromParent_Done,
9425 // Label 696: @23788
9426 GIM_Try, /*On fail goto*//*Label 697*/ GIMT_Encode4(23811), // Rule ID 4381 //
9427 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9428 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9429 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9430 // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KXORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
9431 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORDrr),
9432 GIR_RootConstrainSelectedInstOperands,
9433 // GIR_Coverage, 4381,
9434 GIR_Done,
9435 // Label 697: @23811
9436 GIM_Reject,
9437 // Label 692: @23812
9438 GIM_Reject,
9439 // Label 563: @23813
9440 GIM_Try, /*On fail goto*//*Label 698*/ GIMT_Encode4(24184),
9441 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
9442 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
9443 GIM_Try, /*On fail goto*//*Label 699*/ GIMT_Encode4(24056), // Rule ID 20491 //
9444 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
9445 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9446 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9447 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9448 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9449 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9450 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9451 // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, immAllOnesV:{ *:[v32i8] }) => (EXTRACT_SUBREG:{ *:[v32i8] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] })
9452 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
9453 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
9454 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
9455 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
9456 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
9457 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
9458 GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64,
9459 GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9460 GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9461 GIR_ConstrainSelectedInstOperands, /*InsnID*/7,
9462 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9463 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9464 GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6,
9465 GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src
9466 GIR_AddImm8, /*InsnID*/6, /*Imm*/10,
9467 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9468 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9469 GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
9470 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9471 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9472 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
9473 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9474 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9475 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
9476 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src
9477 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
9478 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9479 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9480 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
9481 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9482 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9483 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
9484 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9485 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9486 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
9487 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
9488 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
9489 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
9490 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9491 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
9492 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
9493 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9494 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9495 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
9496 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5,
9497 GIR_AddImm8, /*InsnID*/1, /*Imm*/15,
9498 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9499 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9500 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9501 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
9502 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
9503 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
9504 // GIR_Coverage, 20491,
9505 GIR_EraseRootFromParent_Done,
9506 // Label 699: @24056
9507 GIM_Try, /*On fail goto*//*Label 700*/ GIMT_Encode4(24102), // Rule ID 20499 //
9508 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
9509 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9510 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9511 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9512 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9513 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9514 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9515 // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, immAllOnesV:{ *:[v32i8] }) => (VPTERNLOGQZ256rri:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, VR256X:{ *:[v32i8] }:$src, VR256X:{ *:[v32i8] }:$src, 15:{ *:[i8] })
9516 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri),
9517 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9518 GIR_RootToRootCopy, /*OpIdx*/1, // src
9519 GIR_RootToRootCopy, /*OpIdx*/1, // src
9520 GIR_RootToRootCopy, /*OpIdx*/1, // src
9521 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
9522 GIR_RootConstrainSelectedInstOperands,
9523 // GIR_Coverage, 20499,
9524 GIR_EraseRootFromParent_Done,
9525 // Label 700: @24102
9526 GIM_Try, /*On fail goto*//*Label 701*/ GIMT_Encode4(24129), // Rule ID 16606 //
9527 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
9528 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9529 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9530 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9531 // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPXORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
9532 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr),
9533 GIR_RootConstrainSelectedInstOperands,
9534 // GIR_Coverage, 16606,
9535 GIR_Done,
9536 // Label 701: @24129
9537 GIM_Try, /*On fail goto*//*Label 702*/ GIMT_Encode4(24156), // Rule ID 16632 //
9538 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only),
9539 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9540 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9541 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
9542 // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VXORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
9543 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr),
9544 GIR_RootConstrainSelectedInstOperands,
9545 // GIR_Coverage, 16632,
9546 GIR_Done,
9547 // Label 702: @24156
9548 GIM_Try, /*On fail goto*//*Label 703*/ GIMT_Encode4(24183), // Rule ID 18616 //
9549 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
9550 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9551 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9552 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
9553 // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPXORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
9554 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ256rr),
9555 GIR_RootConstrainSelectedInstOperands,
9556 // GIR_Coverage, 18616,
9557 GIR_Done,
9558 // Label 703: @24183
9559 GIM_Reject,
9560 // Label 698: @24184
9561 GIM_Reject,
9562 // Label 564: @24185
9563 GIM_Try, /*On fail goto*//*Label 704*/ GIMT_Encode4(24262),
9564 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
9565 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
9566 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9567 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9568 GIM_Try, /*On fail goto*//*Label 705*/ GIMT_Encode4(24242), // Rule ID 20484 //
9569 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9570 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9571 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9572 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9573 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9574 // (xor:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src, immAllOnesV:{ *:[v32i16] }) => (VPTERNLOGQZrri:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src, VR512:{ *:[v32i16] }:$src, VR512:{ *:[v32i16] }:$src, 15:{ *:[i8] })
9575 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
9576 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9577 GIR_RootToRootCopy, /*OpIdx*/1, // src
9578 GIR_RootToRootCopy, /*OpIdx*/1, // src
9579 GIR_RootToRootCopy, /*OpIdx*/1, // src
9580 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
9581 GIR_RootConstrainSelectedInstOperands,
9582 // GIR_Coverage, 20484,
9583 GIR_EraseRootFromParent_Done,
9584 // Label 705: @24242
9585 GIM_Try, /*On fail goto*//*Label 706*/ GIMT_Encode4(24261), // Rule ID 18633 //
9586 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9587 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9588 // (xor:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPXORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
9589 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZrr),
9590 GIR_RootConstrainSelectedInstOperands,
9591 // GIR_Coverage, 18633,
9592 GIR_Done,
9593 // Label 706: @24261
9594 GIM_Reject,
9595 // Label 704: @24262
9596 GIM_Reject,
9597 // Label 565: @24263
9598 GIM_Try, /*On fail goto*//*Label 707*/ GIMT_Encode4(24520),
9599 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1,
9600 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s1,
9601 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9602 GIM_Try, /*On fail goto*//*Label 708*/ GIMT_Encode4(24338), // Rule ID 22110 //
9603 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9604 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9605 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
9606 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1,
9607 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1,
9608 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9609 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
9610 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9611 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9612 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9613 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9614 // (xor:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] }), VK64:{ *:[v64i1] }:$src2) => (KXNORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
9615 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORQrr),
9616 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9617 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9618 GIR_RootToRootCopy, /*OpIdx*/2, // src2
9619 GIR_RootConstrainSelectedInstOperands,
9620 // GIR_Coverage, 22110,
9621 GIR_EraseRootFromParent_Done,
9622 // Label 708: @24338
9623 GIM_Try, /*On fail goto*//*Label 709*/ GIMT_Encode4(24401), // Rule ID 4378 //
9624 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9625 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9626 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
9627 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1,
9628 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1,
9629 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9630 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9631 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
9632 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9633 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9634 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9635 // (xor:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2), immAllOnesV:{ *:[v64i1] }) => (KXNORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
9636 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORQrr),
9637 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9638 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9639 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
9640 GIR_RootConstrainSelectedInstOperands,
9641 // GIR_Coverage, 4378,
9642 GIR_EraseRootFromParent_Done,
9643 // Label 709: @24401
9644 GIM_Try, /*On fail goto*//*Label 710*/ GIMT_Encode4(24461), // Rule ID 22111 //
9645 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9646 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9647 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9648 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
9649 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1,
9650 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1,
9651 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9652 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
9653 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9654 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
9655 GIM_CheckIsSafeToFold, /*NumInsns*/2,
9656 // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src2, (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] })) => (KXNORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
9657 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORQrr),
9658 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9659 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
9660 GIR_RootToRootCopy, /*OpIdx*/1, // src2
9661 GIR_RootConstrainSelectedInstOperands,
9662 // GIR_Coverage, 22111,
9663 GIR_EraseRootFromParent_Done,
9664 // Label 710: @24461
9665 GIM_Try, /*On fail goto*//*Label 711*/ GIMT_Encode4(24496), // Rule ID 4366 //
9666 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9667 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9668 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9669 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9670 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9671 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9672 // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src, immAllOnesV:{ *:[v64i1] }) => (KNOTQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src)
9673 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTQrr),
9674 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9675 GIR_RootToRootCopy, /*OpIdx*/1, // src
9676 GIR_RootConstrainSelectedInstOperands,
9677 // GIR_Coverage, 4366,
9678 GIR_EraseRootFromParent_Done,
9679 // Label 711: @24496
9680 GIM_Try, /*On fail goto*//*Label 712*/ GIMT_Encode4(24519), // Rule ID 4382 //
9681 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9682 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9683 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9684 // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KXORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
9685 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORQrr),
9686 GIR_RootConstrainSelectedInstOperands,
9687 // GIR_Coverage, 4382,
9688 GIR_Done,
9689 // Label 712: @24519
9690 GIM_Reject,
9691 // Label 707: @24520
9692 GIM_Reject,
9693 // Label 566: @24521
9694 GIM_Try, /*On fail goto*//*Label 713*/ GIMT_Encode4(24598),
9695 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
9696 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
9697 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9698 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9699 GIM_Try, /*On fail goto*//*Label 714*/ GIMT_Encode4(24578), // Rule ID 20483 //
9700 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9701 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9702 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
9703 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
9704 GIM_CheckIsSafeToFold, /*NumInsns*/1,
9705 // (xor:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src, immAllOnesV:{ *:[v64i8] }) => (VPTERNLOGQZrri:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src, VR512:{ *:[v64i8] }:$src, VR512:{ *:[v64i8] }:$src, 15:{ *:[i8] })
9706 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri),
9707 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9708 GIR_RootToRootCopy, /*OpIdx*/1, // src
9709 GIR_RootToRootCopy, /*OpIdx*/1, // src
9710 GIR_RootToRootCopy, /*OpIdx*/1, // src
9711 GIR_AddImm8, /*InsnID*/0, /*Imm*/15,
9712 GIR_RootConstrainSelectedInstOperands,
9713 // GIR_Coverage, 20483,
9714 GIR_EraseRootFromParent_Done,
9715 // Label 714: @24578
9716 GIM_Try, /*On fail goto*//*Label 715*/ GIMT_Encode4(24597), // Rule ID 18632 //
9717 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9718 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
9719 // (xor:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPXORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
9720 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZrr),
9721 GIR_RootConstrainSelectedInstOperands,
9722 // GIR_Coverage, 18632,
9723 GIR_Done,
9724 // Label 715: @24597
9725 GIM_Reject,
9726 // Label 713: @24598
9727 GIM_Reject,
9728 // Label 567: @24599
9729 GIM_Reject,
9730 // Label 6: @24600
9731 GIM_Try, /*On fail goto*//*Label 716*/ GIMT_Encode4(24766),
9732 GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
9733 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(16), GIMT_Encode2(24), /*)*//*default:*//*Label 720*/ GIMT_Encode4(24765),
9734 /*GILLT_v16s1*//*Label 717*/ GIMT_Encode4(24651), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
9735 /*GILLT_v32s1*//*Label 718*/ GIMT_Encode4(24689), GIMT_Encode4(0), GIMT_Encode4(0),
9736 /*GILLT_v64s1*//*Label 719*/ GIMT_Encode4(24727),
9737 // Label 717: @24651
9738 GIM_Try, /*On fail goto*//*Label 721*/ GIMT_Encode4(24688), // Rule ID 18037 //
9739 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
9740 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
9741 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1,
9742 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9743 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
9744 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
9745 // (concat_vectors:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KUNPCKBWrr:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK8:{ *:[v8i1] }:$src1)
9746 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KUNPCKBWrr),
9747 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9748 GIR_RootToRootCopy, /*OpIdx*/2, // src2
9749 GIR_RootToRootCopy, /*OpIdx*/1, // src1
9750 GIR_RootConstrainSelectedInstOperands,
9751 // GIR_Coverage, 18037,
9752 GIR_EraseRootFromParent_Done,
9753 // Label 721: @24688
9754 GIM_Reject,
9755 // Label 718: @24689
9756 GIM_Try, /*On fail goto*//*Label 722*/ GIMT_Encode4(24726), // Rule ID 18038 //
9757 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9758 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
9759 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1,
9760 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9761 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9762 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9763 // (concat_vectors:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KUNPCKWDrr:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src2, VK16:{ *:[v16i1] }:$src1)
9764 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KUNPCKWDrr),
9765 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9766 GIR_RootToRootCopy, /*OpIdx*/2, // src2
9767 GIR_RootToRootCopy, /*OpIdx*/1, // src1
9768 GIR_RootConstrainSelectedInstOperands,
9769 // GIR_Coverage, 18038,
9770 GIR_EraseRootFromParent_Done,
9771 // Label 722: @24726
9772 GIM_Reject,
9773 // Label 719: @24727
9774 GIM_Try, /*On fail goto*//*Label 723*/ GIMT_Encode4(24764), // Rule ID 18039 //
9775 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
9776 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
9777 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1,
9778 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
9779 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9780 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
9781 // (concat_vectors:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KUNPCKDQrr:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src2, VK32:{ *:[v32i1] }:$src1)
9782 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KUNPCKDQrr),
9783 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9784 GIR_RootToRootCopy, /*OpIdx*/2, // src2
9785 GIR_RootToRootCopy, /*OpIdx*/1, // src1
9786 GIR_RootConstrainSelectedInstOperands,
9787 // GIR_Coverage, 18039,
9788 GIR_EraseRootFromParent_Done,
9789 // Label 723: @24764
9790 GIM_Reject,
9791 // Label 720: @24765
9792 GIM_Reject,
9793 // Label 716: @24766
9794 GIM_Reject,
9795 // Label 7: @24767
9796 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(24), /*)*//*default:*//*Label 732*/ GIMT_Encode4(26505),
9797 /*GILLT_s8*//*Label 724*/ GIMT_Encode4(24870),
9798 /*GILLT_s16*//*Label 725*/ GIMT_Encode4(24928),
9799 /*GILLT_s32*//*Label 726*/ GIMT_Encode4(25743),
9800 /*GILLT_s64*//*Label 727*/ GIMT_Encode4(25971), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
9801 /*GILLT_v8s1*//*Label 728*/ GIMT_Encode4(26199), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
9802 /*GILLT_v16s1*//*Label 729*/ GIMT_Encode4(26281), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
9803 /*GILLT_v32s1*//*Label 730*/ GIMT_Encode4(26363), GIMT_Encode4(0), GIMT_Encode4(0),
9804 /*GILLT_v64s1*//*Label 731*/ GIMT_Encode4(26434),
9805 // Label 724: @24870
9806 GIM_Try, /*On fail goto*//*Label 733*/ GIMT_Encode4(24927), // Rule ID 17968 //
9807 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
9808 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
9809 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
9810 // (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] }), sub_8bit:{ *:[i32] })
9811 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
9812 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9813 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9814 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
9815 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9816 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9817 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9818 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_8bit),
9819 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID),
9820 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
9821 // GIR_Coverage, 17968,
9822 GIR_EraseRootFromParent_Done,
9823 // Label 733: @24927
9824 GIM_Reject,
9825 // Label 725: @24928
9826 GIM_Try, /*On fail goto*//*Label 734*/ GIMT_Encode4(24985), // Rule ID 17965 //
9827 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
9828 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
9829 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
9830 // (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }), sub_16bit:{ *:[i32] })
9831 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
9832 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9833 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9834 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
9835 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9836 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9837 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9838 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
9839 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
9840 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
9841 // GIR_Coverage, 17965,
9842 GIR_EraseRootFromParent_Done,
9843 // Label 734: @24985
9844 GIM_Try, /*On fail goto*//*Label 735*/ GIMT_Encode4(25086), // Rule ID 20689 //
9845 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
9846 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
9847 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
9848 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
9849 // (bitconvert:{ *:[f16] } GR16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VMOVW2SHrr:{ *:[f128] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] })), FR16X:{ *:[i32] })
9850 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
9851 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
9852 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32,
9853 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9854 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9855 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
9856 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9857 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9858 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
9859 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
9860 GIR_AddImm8, /*InsnID*/2, /*Imm*/4,
9861 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
9862 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
9863 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID),
9864 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVW2SHrr),
9865 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9866 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9867 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9868 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9869 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9870 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
9871 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
9872 // GIR_Coverage, 20689,
9873 GIR_EraseRootFromParent_Done,
9874 // Label 735: @25086
9875 GIM_Try, /*On fail goto*//*Label 736*/ GIMT_Encode4(25163), // Rule ID 20702 //
9876 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
9877 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
9878 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
9879 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
9880 // (bitconvert:{ *:[i16] } FR16X:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VMOVSH2Wrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[f128] } FR16X:{ *:[f16] }:$src, VR128X:{ *:[i32] })), sub_16bit:{ *:[i32] })
9881 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
9882 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
9883 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9884 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9885 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
9886 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
9887 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVSH2Wrr),
9888 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9889 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9890 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9891 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9892 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9893 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
9894 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
9895 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
9896 // GIR_Coverage, 20702,
9897 GIR_EraseRootFromParent_Done,
9898 // Label 736: @25163
9899 GIM_Try, /*On fail goto*//*Label 737*/ GIMT_Encode4(25239), // Rule ID 16850 //
9900 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoBWI),
9901 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
9902 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
9903 // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VPEXTRWrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16:{ *:[f16] }:$src, VR128:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] })
9904 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
9905 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16,
9906 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9907 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9908 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
9909 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
9910 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPEXTRWrr),
9911 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9912 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9913 GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
9914 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9915 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9916 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9917 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
9918 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
9919 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
9920 // GIR_Coverage, 16850,
9921 GIR_EraseRootFromParent_Done,
9922 // Label 737: @25239
9923 GIM_Try, /*On fail goto*//*Label 738*/ GIMT_Encode4(25356), // Rule ID 16851 //
9924 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoBWI),
9925 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
9926 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16RegClassID),
9927 // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VPINSRWrr:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16:{ *:[i32] })
9928 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
9929 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16,
9930 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32,
9931 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32,
9932 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9933 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9934 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
9935 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9936 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9937 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
9938 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src
9939 GIR_AddImm8, /*InsnID*/3, /*Imm*/4,
9940 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
9941 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
9942 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID),
9943 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9944 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9945 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
9946 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPINSRWrr),
9947 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9948 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9949 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
9950 GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
9951 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9952 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9953 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9954 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
9955 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16RegClassID),
9956 // GIR_Coverage, 16851,
9957 GIR_EraseRootFromParent_Done,
9958 // Label 738: @25356
9959 GIM_Try, /*On fail goto*//*Label 739*/ GIMT_Encode4(25432), // Rule ID 16847 //
9960 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
9961 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
9962 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
9963 // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (PEXTRWrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16:{ *:[f16] }:$src, VR128:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] })
9964 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
9965 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16,
9966 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9967 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9968 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
9969 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
9970 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::PEXTRWrr),
9971 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9972 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
9973 GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
9974 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9975 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
9976 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9977 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
9978 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
9979 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
9980 // GIR_Coverage, 16847,
9981 GIR_EraseRootFromParent_Done,
9982 // Label 739: @25432
9983 GIM_Try, /*On fail goto*//*Label 740*/ GIMT_Encode4(25549), // Rule ID 16848 //
9984 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
9985 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
9986 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16RegClassID),
9987 // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (PINSRWrr:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16:{ *:[i32] })
9988 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
9989 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16,
9990 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32,
9991 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32,
9992 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
9993 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9994 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
9995 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
9996 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
9997 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
9998 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src
9999 GIR_AddImm8, /*InsnID*/3, /*Imm*/4,
10000 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
10001 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
10002 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID),
10003 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
10004 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10005 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
10006 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::PINSRWrr),
10007 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10008 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
10009 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
10010 GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
10011 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10012 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10013 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10014 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10015 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16RegClassID),
10016 // GIR_Coverage, 16848,
10017 GIR_EraseRootFromParent_Done,
10018 // Label 740: @25549
10019 GIM_Try, /*On fail goto*//*Label 741*/ GIMT_Encode4(25625), // Rule ID 20385 //
10020 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
10021 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
10022 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10023 // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VPEXTRWZrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16X:{ *:[f16] }:$src, VR128X:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] })
10024 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
10025 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16,
10026 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10027 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10028 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
10029 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
10030 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPEXTRWZrr),
10031 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10032 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
10033 GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
10034 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10035 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10036 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10037 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
10038 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
10039 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
10040 // GIR_Coverage, 20385,
10041 GIR_EraseRootFromParent_Done,
10042 // Label 741: @25625
10043 GIM_Try, /*On fail goto*//*Label 742*/ GIMT_Encode4(25742), // Rule ID 20386 //
10044 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
10045 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
10046 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
10047 // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VPINSRWZrr:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16X:{ *:[i32] })
10048 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
10049 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16,
10050 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32,
10051 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32,
10052 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
10053 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10054 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
10055 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
10056 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10057 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
10058 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src
10059 GIR_AddImm8, /*InsnID*/3, /*Imm*/4,
10060 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
10061 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
10062 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID),
10063 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
10064 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10065 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
10066 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPINSRWZrr),
10067 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10068 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
10069 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
10070 GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
10071 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10072 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10073 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10074 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10075 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
10076 // GIR_Coverage, 20386,
10077 GIR_EraseRootFromParent_Done,
10078 // Label 742: @25742
10079 GIM_Reject,
10080 // Label 726: @25743
10081 GIM_Try, /*On fail goto*//*Label 743*/ GIMT_Encode4(25769), // Rule ID 2863 //
10082 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10083 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10084 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10085 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10086 // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
10087 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVDI2SSrr),
10088 GIR_RootConstrainSelectedInstOperands,
10089 // GIR_Coverage, 2863,
10090 GIR_Done,
10091 // Label 743: @25769
10092 GIM_Try, /*On fail goto*//*Label 744*/ GIMT_Encode4(25795), // Rule ID 2864 //
10093 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10094 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10095 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10096 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10097 // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (MOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
10098 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVDI2SSrr),
10099 GIR_RootConstrainSelectedInstOperands,
10100 // GIR_Coverage, 2864,
10101 GIR_Done,
10102 // Label 744: @25795
10103 GIM_Try, /*On fail goto*//*Label 745*/ GIMT_Encode4(25821), // Rule ID 2873 //
10104 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10105 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10106 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10107 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10108 // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VMOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
10109 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSS2DIrr),
10110 GIR_RootConstrainSelectedInstOperands,
10111 // GIR_Coverage, 2873,
10112 GIR_Done,
10113 // Label 745: @25821
10114 GIM_Try, /*On fail goto*//*Label 746*/ GIMT_Encode4(25847), // Rule ID 2874 //
10115 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10116 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10117 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10118 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10119 // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (MOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
10120 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSS2DIrr),
10121 GIR_RootConstrainSelectedInstOperands,
10122 // GIR_Coverage, 2874,
10123 GIR_Done,
10124 // Label 746: @25847
10125 GIM_Try, /*On fail goto*//*Label 747*/ GIMT_Encode4(25873), // Rule ID 4550 //
10126 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10127 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10128 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
10129 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10130 // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
10131 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVDI2SSZrr),
10132 GIR_RootConstrainSelectedInstOperands,
10133 // GIR_Coverage, 4550,
10134 GIR_Done,
10135 // Label 747: @25873
10136 GIM_Try, /*On fail goto*//*Label 748*/ GIMT_Encode4(25899), // Rule ID 4555 //
10137 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10138 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10139 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10140 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
10141 // (bitconvert:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)
10142 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSS2DIZrr),
10143 GIR_RootConstrainSelectedInstOperands,
10144 // GIR_Coverage, 4555,
10145 GIR_Done,
10146 // Label 748: @25899
10147 GIM_Try, /*On fail goto*//*Label 749*/ GIMT_Encode4(25926), // Rule ID 17976 //
10148 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
10149 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10150 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
10151 // (bitconvert:{ *:[i32] } VK32:{ *:[v32i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i32] } VK32:{ *:[v32i1] }:$src, GR32:{ *:[i32] })
10152 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10153 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR32RegClassID),
10154 // GIR_Coverage, 17976,
10155 GIR_Done,
10156 // Label 749: @25926
10157 GIM_Try, /*On fail goto*//*Label 750*/ GIMT_Encode4(25970), // Rule ID 18456 //
10158 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
10159 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
10160 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
10161 // (bitconvert:{ *:[f32] } VK32:{ *:[v32i1] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } (KMOVDrk:{ *:[i32] } VK32:{ *:[v32i1] }:$src))
10162 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
10163 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KMOVDrk),
10164 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10165 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
10166 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10167 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDI2SSZrr),
10168 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10169 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10170 GIR_RootConstrainSelectedInstOperands,
10171 // GIR_Coverage, 18456,
10172 GIR_EraseRootFromParent_Done,
10173 // Label 750: @25970
10174 GIM_Reject,
10175 // Label 727: @25971
10176 GIM_Try, /*On fail goto*//*Label 751*/ GIMT_Encode4(25997), // Rule ID 2858 //
10177 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10178 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10179 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10180 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10181 // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
10182 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOV64toSDrr),
10183 GIR_RootConstrainSelectedInstOperands,
10184 // GIR_Coverage, 2858,
10185 GIR_Done,
10186 // Label 751: @25997
10187 GIM_Try, /*On fail goto*//*Label 752*/ GIMT_Encode4(26023), // Rule ID 2862 //
10188 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10189 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10190 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10191 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10192 // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (MOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
10193 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOV64toSDrr),
10194 GIR_RootConstrainSelectedInstOperands,
10195 // GIR_Coverage, 2862,
10196 GIR_Done,
10197 // Label 752: @26023
10198 GIM_Try, /*On fail goto*//*Label 753*/ GIMT_Encode4(26049), // Rule ID 2871 //
10199 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10200 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10201 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10202 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10203 // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VMOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
10204 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSDto64rr),
10205 GIR_RootConstrainSelectedInstOperands,
10206 // GIR_Coverage, 2871,
10207 GIR_Done,
10208 // Label 753: @26049
10209 GIM_Try, /*On fail goto*//*Label 754*/ GIMT_Encode4(26075), // Rule ID 2872 //
10210 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10211 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10212 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10213 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10214 // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (MOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
10215 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSDto64rr),
10216 GIR_RootConstrainSelectedInstOperands,
10217 // GIR_Coverage, 2872,
10218 GIR_Done,
10219 // Label 754: @26075
10220 GIM_Try, /*On fail goto*//*Label 755*/ GIMT_Encode4(26101), // Rule ID 4548 //
10221 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10222 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10223 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
10224 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10225 // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDZrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
10226 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOV64toSDZrr),
10227 GIR_RootConstrainSelectedInstOperands,
10228 // GIR_Coverage, 4548,
10229 GIR_Done,
10230 // Label 755: @26101
10231 GIM_Try, /*On fail goto*//*Label 756*/ GIMT_Encode4(26127), // Rule ID 4549 //
10232 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10233 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10234 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10235 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
10236 // (bitconvert:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)
10237 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSDto64Zrr),
10238 GIR_RootConstrainSelectedInstOperands,
10239 // GIR_Coverage, 4549,
10240 GIR_Done,
10241 // Label 756: @26127
10242 GIM_Try, /*On fail goto*//*Label 757*/ GIMT_Encode4(26154), // Rule ID 17978 //
10243 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1,
10244 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10245 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
10246 // (bitconvert:{ *:[i64] } VK64:{ *:[v64i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i64] } VK64:{ *:[v64i1] }:$src, GR64:{ *:[i32] })
10247 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10248 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
10249 // GIR_Coverage, 17978,
10250 GIR_Done,
10251 // Label 757: @26154
10252 GIM_Try, /*On fail goto*//*Label 758*/ GIMT_Encode4(26198), // Rule ID 18458 //
10253 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1,
10254 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
10255 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
10256 // (bitconvert:{ *:[f64] } VK64:{ *:[v64i1] }:$src) => (VMOV64toSDZrr:{ *:[f64] } (KMOVQrk:{ *:[i64] } VK64:{ *:[v64i1] }:$src))
10257 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
10258 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KMOVQrk),
10259 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10260 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
10261 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10262 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOV64toSDZrr),
10263 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10264 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10265 GIR_RootConstrainSelectedInstOperands,
10266 // GIR_Coverage, 18458,
10267 GIR_EraseRootFromParent_Done,
10268 // Label 758: @26198
10269 GIM_Reject,
10270 // Label 728: @26199
10271 GIM_Try, /*On fail goto*//*Label 759*/ GIMT_Encode4(26280), // Rule ID 17967 //
10272 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
10273 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
10274 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
10275 // (bitconvert:{ *:[v8i1] } GR8:{ *:[i8] }:$src) => (COPY_TO_REGCLASS:{ *:[v8i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src, sub_8bit:{ *:[i32] }), VK8:{ *:[i32] })
10276 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
10277 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
10278 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
10279 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10280 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
10281 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
10282 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10283 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
10284 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
10285 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
10286 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
10287 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
10288 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
10289 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10290 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10291 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10292 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
10293 // GIR_Coverage, 17967,
10294 GIR_EraseRootFromParent_Done,
10295 // Label 759: @26280
10296 GIM_Reject,
10297 // Label 729: @26281
10298 GIM_Try, /*On fail goto*//*Label 760*/ GIMT_Encode4(26362), // Rule ID 17964 //
10299 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
10300 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
10301 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
10302 // (bitconvert:{ *:[v16i1] } GR16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[v16i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), VK16:{ *:[i32] })
10303 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
10304 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
10305 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
10306 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10307 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
10308 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
10309 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10310 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
10311 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
10312 GIR_AddImm8, /*InsnID*/1, /*Imm*/4,
10313 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
10314 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
10315 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID),
10316 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10317 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10318 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10319 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK16RegClassID),
10320 // GIR_Coverage, 17964,
10321 GIR_EraseRootFromParent_Done,
10322 // Label 760: @26362
10323 GIM_Reject,
10324 // Label 730: @26363
10325 GIM_Try, /*On fail goto*//*Label 761*/ GIMT_Encode4(26433),
10326 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10327 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
10328 GIM_Try, /*On fail goto*//*Label 762*/ GIMT_Encode4(26395), // Rule ID 17975 //
10329 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10330 // (bitconvert:{ *:[v32i1] } GR32:{ *:[i32] }:$src) => (COPY_TO_REGCLASS:{ *:[v32i1] } GR32:{ *:[i32] }:$src, VK32:{ *:[i32] })
10331 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10332 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK32RegClassID),
10333 // GIR_Coverage, 17975,
10334 GIR_Done,
10335 // Label 762: @26395
10336 GIM_Try, /*On fail goto*//*Label 763*/ GIMT_Encode4(26432), // Rule ID 18455 //
10337 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
10338 // (bitconvert:{ *:[v32i1] } FR32X:{ *:[f32] }:$src) => (KMOVDkr:{ *:[v32i1] } (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src))
10339 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
10340 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVSS2DIZrr),
10341 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10342 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
10343 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10344 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KMOVDkr),
10345 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10346 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10347 GIR_RootConstrainSelectedInstOperands,
10348 // GIR_Coverage, 18455,
10349 GIR_EraseRootFromParent_Done,
10350 // Label 763: @26432
10351 GIM_Reject,
10352 // Label 761: @26433
10353 GIM_Reject,
10354 // Label 731: @26434
10355 GIM_Try, /*On fail goto*//*Label 764*/ GIMT_Encode4(26504),
10356 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10357 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
10358 GIM_Try, /*On fail goto*//*Label 765*/ GIMT_Encode4(26466), // Rule ID 17977 //
10359 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10360 // (bitconvert:{ *:[v64i1] } GR64:{ *:[i64] }:$src) => (COPY_TO_REGCLASS:{ *:[v64i1] } GR64:{ *:[i64] }:$src, VK64:{ *:[i32] })
10361 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
10362 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK64RegClassID),
10363 // GIR_Coverage, 17977,
10364 GIR_Done,
10365 // Label 765: @26466
10366 GIM_Try, /*On fail goto*//*Label 766*/ GIMT_Encode4(26503), // Rule ID 18457 //
10367 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
10368 // (bitconvert:{ *:[v64i1] } FR64X:{ *:[f64] }:$src) => (KMOVQkr:{ *:[v64i1] } (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src))
10369 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
10370 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVSDto64Zrr),
10371 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
10372 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
10373 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10374 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KMOVQkr),
10375 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10376 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10377 GIR_RootConstrainSelectedInstOperands,
10378 // GIR_Coverage, 18457,
10379 GIR_EraseRootFromParent_Done,
10380 // Label 766: @26503
10381 GIM_Reject,
10382 // Label 764: @26504
10383 GIM_Reject,
10384 // Label 732: @26505
10385 GIM_Reject,
10386 // Label 8: @26506
10387 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(20), /*)*//*default:*//*Label 775*/ GIMT_Encode4(27367),
10388 /*GILLT_s32*//*Label 767*/ GIMT_Encode4(26585),
10389 /*GILLT_s64*//*Label 768*/ GIMT_Encode4(26766), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10390 /*GILLT_v2s64*//*Label 769*/ GIMT_Encode4(26947), GIMT_Encode4(0),
10391 /*GILLT_v4s32*//*Label 770*/ GIMT_Encode4(26978),
10392 /*GILLT_v4s64*//*Label 771*/ GIMT_Encode4(27129), GIMT_Encode4(0), GIMT_Encode4(0),
10393 /*GILLT_v8s32*//*Label 772*/ GIMT_Encode4(27190),
10394 /*GILLT_v8s64*//*Label 773*/ GIMT_Encode4(27278), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10395 /*GILLT_v16s32*//*Label 774*/ GIMT_Encode4(27339),
10396 // Label 767: @26585
10397 GIM_Try, /*On fail goto*//*Label 776*/ GIMT_Encode4(26615), // Rule ID 1743 //
10398 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10399 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10400 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10401 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10402 // (lrint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
10403 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SIrr),
10404 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10405 GIR_RootConstrainSelectedInstOperands,
10406 // GIR_Coverage, 1743,
10407 GIR_Done,
10408 // Label 776: @26615
10409 GIM_Try, /*On fail goto*//*Label 777*/ GIMT_Encode4(26645), // Rule ID 1747 //
10410 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10411 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10412 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10413 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10414 // (lrint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src)
10415 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SIrr),
10416 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10417 GIR_RootConstrainSelectedInstOperands,
10418 // GIR_Coverage, 1747,
10419 GIR_Done,
10420 // Label 777: @26645
10421 GIM_Try, /*On fail goto*//*Label 778*/ GIMT_Encode4(26675), // Rule ID 1767 //
10422 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
10423 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10424 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10425 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10426 // (lrint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
10427 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSS2SIrr),
10428 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10429 GIR_RootConstrainSelectedInstOperands,
10430 // GIR_Coverage, 1767,
10431 GIR_Done,
10432 // Label 778: @26675
10433 GIM_Try, /*On fail goto*//*Label 779*/ GIMT_Encode4(26705), // Rule ID 1771 //
10434 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10435 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10436 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10437 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10438 // (lrint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src)
10439 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSD2SIrr),
10440 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10441 GIR_RootConstrainSelectedInstOperands,
10442 // GIR_Coverage, 1771,
10443 GIR_Done,
10444 // Label 779: @26705
10445 GIM_Try, /*On fail goto*//*Label 780*/ GIMT_Encode4(26735), // Rule ID 10238 //
10446 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10447 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10448 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10449 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
10450 // (lrint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)
10451 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SIZrr),
10452 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10453 GIR_RootConstrainSelectedInstOperands,
10454 // GIR_Coverage, 10238,
10455 GIR_Done,
10456 // Label 780: @26735
10457 GIM_Try, /*On fail goto*//*Label 781*/ GIMT_Encode4(26765), // Rule ID 10242 //
10458 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10459 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10460 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
10461 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
10462 // (lrint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src)
10463 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SIZrr),
10464 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10465 GIR_RootConstrainSelectedInstOperands,
10466 // GIR_Coverage, 10242,
10467 GIR_Done,
10468 // Label 781: @26765
10469 GIM_Reject,
10470 // Label 768: @26766
10471 GIM_Try, /*On fail goto*//*Label 782*/ GIMT_Encode4(26796), // Rule ID 16499 //
10472 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10473 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10474 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10475 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10476 // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
10477 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64rr),
10478 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10479 GIR_RootConstrainSelectedInstOperands,
10480 // GIR_Coverage, 16499,
10481 GIR_Done,
10482 // Label 782: @26796
10483 GIM_Try, /*On fail goto*//*Label 783*/ GIMT_Encode4(26826), // Rule ID 16501 //
10484 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10485 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10486 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10487 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10488 // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
10489 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64rr),
10490 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10491 GIR_RootConstrainSelectedInstOperands,
10492 // GIR_Coverage, 16501,
10493 GIR_Done,
10494 // Label 783: @26826
10495 GIM_Try, /*On fail goto*//*Label 784*/ GIMT_Encode4(26856), // Rule ID 16503 //
10496 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
10497 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10498 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10499 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10500 // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
10501 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSS2SI64rr),
10502 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10503 GIR_RootConstrainSelectedInstOperands,
10504 // GIR_Coverage, 16503,
10505 GIR_Done,
10506 // Label 784: @26856
10507 GIM_Try, /*On fail goto*//*Label 785*/ GIMT_Encode4(26886), // Rule ID 16505 //
10508 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10509 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10510 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10511 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10512 // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
10513 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSD2SI64rr),
10514 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10515 GIR_RootConstrainSelectedInstOperands,
10516 // GIR_Coverage, 16505,
10517 GIR_Done,
10518 // Label 785: @26886
10519 GIM_Try, /*On fail goto*//*Label 786*/ GIMT_Encode4(26916), // Rule ID 19739 //
10520 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10521 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10522 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10523 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10524 // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64Zrr:{ *:[i64] } FR32:{ *:[f32] }:$src)
10525 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64Zrr),
10526 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10527 GIR_RootConstrainSelectedInstOperands,
10528 // GIR_Coverage, 19739,
10529 GIR_Done,
10530 // Label 786: @26916
10531 GIM_Try, /*On fail goto*//*Label 787*/ GIMT_Encode4(26946), // Rule ID 19741 //
10532 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10533 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10534 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10535 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10536 // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64Zrr:{ *:[i64] } FR64:{ *:[f64] }:$src)
10537 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64Zrr),
10538 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10539 GIR_RootConstrainSelectedInstOperands,
10540 // GIR_Coverage, 19741,
10541 GIR_Done,
10542 // Label 787: @26946
10543 GIM_Reject,
10544 // Label 769: @26947
10545 GIM_Try, /*On fail goto*//*Label 788*/ GIMT_Encode4(26977), // Rule ID 19964 //
10546 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
10547 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10548 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10549 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10550 // (lrint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTPD2QQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src)
10551 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ128rr),
10552 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10553 GIR_RootConstrainSelectedInstOperands,
10554 // GIR_Coverage, 19964,
10555 GIR_Done,
10556 // Label 788: @26977
10557 GIM_Reject,
10558 // Label 770: @26978
10559 GIM_Try, /*On fail goto*//*Label 789*/ GIMT_Encode4(27008), // Rule ID 16553 //
10560 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
10561 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10562 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10563 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10564 // (lrint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (VCVTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src)
10565 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQrr),
10566 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10567 GIR_RootConstrainSelectedInstOperands,
10568 // GIR_Coverage, 16553,
10569 GIR_Done,
10570 // Label 789: @27008
10571 GIM_Try, /*On fail goto*//*Label 790*/ GIMT_Encode4(27038), // Rule ID 16557 //
10572 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
10573 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
10574 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10575 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
10576 // (lrint:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) => (VCVTPD2DQYrr:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src)
10577 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2DQYrr),
10578 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10579 GIR_RootConstrainSelectedInstOperands,
10580 // GIR_Coverage, 16557,
10581 GIR_Done,
10582 // Label 790: @27038
10583 GIM_Try, /*On fail goto*//*Label 791*/ GIMT_Encode4(27068), // Rule ID 16559 //
10584 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10585 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10586 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10587 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10588 // (lrint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (CVTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src)
10589 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTPS2DQrr),
10590 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10591 GIR_RootConstrainSelectedInstOperands,
10592 // GIR_Coverage, 16559,
10593 GIR_Done,
10594 // Label 791: @27068
10595 GIM_Try, /*On fail goto*//*Label 792*/ GIMT_Encode4(27098), // Rule ID 19936 //
10596 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
10597 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10598 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10599 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10600 // (lrint:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2DQZ128rr:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src)
10601 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQZ128rr),
10602 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10603 GIR_RootConstrainSelectedInstOperands,
10604 // GIR_Coverage, 19936,
10605 GIR_Done,
10606 // Label 792: @27098
10607 GIM_Try, /*On fail goto*//*Label 793*/ GIMT_Encode4(27128), // Rule ID 19940 //
10608 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
10609 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
10610 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10611 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10612 // (lrint:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2DQZ256rr:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src)
10613 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2DQZ256rr),
10614 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10615 GIR_RootConstrainSelectedInstOperands,
10616 // GIR_Coverage, 19940,
10617 GIR_Done,
10618 // Label 793: @27128
10619 GIM_Reject,
10620 // Label 771: @27129
10621 GIM_Try, /*On fail goto*//*Label 794*/ GIMT_Encode4(27159), // Rule ID 19960 //
10622 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
10623 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10624 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10625 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10626 // (lrint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2QQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src)
10627 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZ256rr),
10628 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10629 GIR_RootConstrainSelectedInstOperands,
10630 // GIR_Coverage, 19960,
10631 GIR_Done,
10632 // Label 794: @27159
10633 GIM_Try, /*On fail goto*//*Label 795*/ GIMT_Encode4(27189), // Rule ID 19966 //
10634 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
10635 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
10636 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10637 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10638 // (lrint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2QQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src)
10639 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ256rr),
10640 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10641 GIR_RootConstrainSelectedInstOperands,
10642 // GIR_Coverage, 19966,
10643 GIR_Done,
10644 // Label 795: @27189
10645 GIM_Reject,
10646 // Label 772: @27190
10647 GIM_Try, /*On fail goto*//*Label 796*/ GIMT_Encode4(27220), // Rule ID 16555 //
10648 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
10649 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
10650 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
10651 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
10652 // (lrint:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src) => (VCVTPS2DQYrr:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src)
10653 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQYrr),
10654 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10655 GIR_RootConstrainSelectedInstOperands,
10656 // GIR_Coverage, 16555,
10657 GIR_Done,
10658 // Label 796: @27220
10659 GIM_Try, /*On fail goto*//*Label 797*/ GIMT_Encode4(27250), // Rule ID 19938 //
10660 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
10661 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
10662 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10663 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10664 // (lrint:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2DQZ256rr:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src)
10665 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQZ256rr),
10666 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10667 GIR_RootConstrainSelectedInstOperands,
10668 // GIR_Coverage, 19938,
10669 GIR_Done,
10670 // Label 797: @27250
10671 GIM_Try, /*On fail goto*//*Label 798*/ GIMT_Encode4(27277), // Rule ID 19944 //
10672 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
10673 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10674 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10675 // (lrint:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2DQZrr:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src)
10676 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2DQZrr),
10677 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10678 GIR_RootConstrainSelectedInstOperands,
10679 // GIR_Coverage, 19944,
10680 GIR_Done,
10681 // Label 798: @27277
10682 GIM_Reject,
10683 // Label 773: @27278
10684 GIM_Try, /*On fail goto*//*Label 799*/ GIMT_Encode4(27308), // Rule ID 19972 //
10685 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
10686 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
10687 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10688 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10689 // (lrint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2QQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src)
10690 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZrr),
10691 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10692 GIR_RootConstrainSelectedInstOperands,
10693 // GIR_Coverage, 19972,
10694 GIR_Done,
10695 // Label 799: @27308
10696 GIM_Try, /*On fail goto*//*Label 800*/ GIMT_Encode4(27338), // Rule ID 19976 //
10697 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
10698 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
10699 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10700 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10701 // (lrint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2QQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src)
10702 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZrr),
10703 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10704 GIR_RootConstrainSelectedInstOperands,
10705 // GIR_Coverage, 19976,
10706 GIR_Done,
10707 // Label 800: @27338
10708 GIM_Reject,
10709 // Label 774: @27339
10710 GIM_Try, /*On fail goto*//*Label 801*/ GIMT_Encode4(27366), // Rule ID 19942 //
10711 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
10712 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10713 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10714 // (lrint:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) => (VCVTPS2DQZrr:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src)
10715 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQZrr),
10716 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10717 GIR_RootConstrainSelectedInstOperands,
10718 // GIR_Coverage, 19942,
10719 GIR_Done,
10720 // Label 801: @27366
10721 GIM_Reject,
10722 // Label 775: @27367
10723 GIM_Reject,
10724 // Label 9: @27368
10725 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(16), /*)*//*default:*//*Label 806*/ GIMT_Encode4(27761),
10726 /*GILLT_s64*//*Label 802*/ GIMT_Encode4(27427), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10727 /*GILLT_v2s64*//*Label 803*/ GIMT_Encode4(27608), GIMT_Encode4(0), GIMT_Encode4(0),
10728 /*GILLT_v4s64*//*Label 804*/ GIMT_Encode4(27639), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10729 /*GILLT_v8s64*//*Label 805*/ GIMT_Encode4(27700),
10730 // Label 802: @27427
10731 GIM_Try, /*On fail goto*//*Label 807*/ GIMT_Encode4(27457), // Rule ID 1745 //
10732 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10733 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10734 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10735 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10736 // (llrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
10737 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64rr),
10738 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10739 GIR_RootConstrainSelectedInstOperands,
10740 // GIR_Coverage, 1745,
10741 GIR_Done,
10742 // Label 807: @27457
10743 GIM_Try, /*On fail goto*//*Label 808*/ GIMT_Encode4(27487), // Rule ID 1749 //
10744 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
10745 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10746 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10747 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10748 // (llrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
10749 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64rr),
10750 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10751 GIR_RootConstrainSelectedInstOperands,
10752 // GIR_Coverage, 1749,
10753 GIR_Done,
10754 // Label 808: @27487
10755 GIM_Try, /*On fail goto*//*Label 809*/ GIMT_Encode4(27517), // Rule ID 1769 //
10756 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
10757 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10758 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10759 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
10760 // (llrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
10761 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSS2SI64rr),
10762 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10763 GIR_RootConstrainSelectedInstOperands,
10764 // GIR_Coverage, 1769,
10765 GIR_Done,
10766 // Label 809: @27517
10767 GIM_Try, /*On fail goto*//*Label 810*/ GIMT_Encode4(27547), // Rule ID 1773 //
10768 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
10769 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10770 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10771 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
10772 // (llrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
10773 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSD2SI64rr),
10774 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10775 GIR_RootConstrainSelectedInstOperands,
10776 // GIR_Coverage, 1773,
10777 GIR_Done,
10778 // Label 810: @27547
10779 GIM_Try, /*On fail goto*//*Label 811*/ GIMT_Encode4(27577), // Rule ID 10240 //
10780 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10781 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10782 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10783 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
10784 // (llrint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src)
10785 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64Zrr),
10786 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10787 GIR_RootConstrainSelectedInstOperands,
10788 // GIR_Coverage, 10240,
10789 GIR_Done,
10790 // Label 811: @27577
10791 GIM_Try, /*On fail goto*//*Label 812*/ GIMT_Encode4(27607), // Rule ID 10244 //
10792 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
10793 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
10794 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
10795 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
10796 // (llrint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)
10797 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64Zrr),
10798 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10799 GIR_RootConstrainSelectedInstOperands,
10800 // GIR_Coverage, 10244,
10801 GIR_Done,
10802 // Label 812: @27607
10803 GIM_Reject,
10804 // Label 803: @27608
10805 GIM_Try, /*On fail goto*//*Label 813*/ GIMT_Encode4(27638), // Rule ID 19968 //
10806 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
10807 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10808 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10809 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10810 // (llrint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTPD2QQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src)
10811 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ128rr),
10812 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10813 GIR_RootConstrainSelectedInstOperands,
10814 // GIR_Coverage, 19968,
10815 GIR_Done,
10816 // Label 813: @27638
10817 GIM_Reject,
10818 // Label 804: @27639
10819 GIM_Try, /*On fail goto*//*Label 814*/ GIMT_Encode4(27669), // Rule ID 19962 //
10820 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
10821 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10822 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10823 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
10824 // (llrint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2QQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src)
10825 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZ256rr),
10826 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10827 GIR_RootConstrainSelectedInstOperands,
10828 // GIR_Coverage, 19962,
10829 GIR_Done,
10830 // Label 814: @27669
10831 GIM_Try, /*On fail goto*//*Label 815*/ GIMT_Encode4(27699), // Rule ID 19970 //
10832 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
10833 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
10834 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10835 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10836 // (llrint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2QQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src)
10837 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ256rr),
10838 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10839 GIR_RootConstrainSelectedInstOperands,
10840 // GIR_Coverage, 19970,
10841 GIR_Done,
10842 // Label 815: @27699
10843 GIM_Reject,
10844 // Label 805: @27700
10845 GIM_Try, /*On fail goto*//*Label 816*/ GIMT_Encode4(27730), // Rule ID 19974 //
10846 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
10847 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
10848 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10849 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
10850 // (llrint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2QQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src)
10851 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZrr),
10852 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10853 GIR_RootConstrainSelectedInstOperands,
10854 // GIR_Coverage, 19974,
10855 GIR_Done,
10856 // Label 816: @27730
10857 GIM_Try, /*On fail goto*//*Label 817*/ GIMT_Encode4(27760), // Rule ID 19978 //
10858 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
10859 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
10860 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10861 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
10862 // (llrint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2QQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src)
10863 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZrr),
10864 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
10865 GIR_RootConstrainSelectedInstOperands,
10866 // GIR_Coverage, 19978,
10867 GIR_Done,
10868 // Label 817: @27760
10869 GIM_Reject,
10870 // Label 806: @27761
10871 GIM_Reject,
10872 // Label 10: @27762
10873 GIM_Try, /*On fail goto*//*Label 818*/ GIMT_Encode4(28895),
10874 GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
10875 GIM_Try, /*On fail goto*//*Label 819*/ GIMT_Encode4(27806), // Rule ID 1517 //
10876 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10877 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphsubwd),
10878 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
10879 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10880 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10881 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10882 // (intrinsic_wo_chain:{ *:[v4i32] } 13847:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHSUBWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src)
10883 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBWDrr),
10884 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10885 GIR_RootToRootCopy, /*OpIdx*/2, // src
10886 GIR_RootConstrainSelectedInstOperands,
10887 // GIR_Coverage, 1517,
10888 GIR_EraseRootFromParent_Done,
10889 // Label 819: @27806
10890 GIM_Try, /*On fail goto*//*Label 820*/ GIMT_Encode4(27842), // Rule ID 1519 //
10891 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10892 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphsubdq),
10893 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
10894 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
10895 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10896 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10897 // (intrinsic_wo_chain:{ *:[v2i64] } 13846:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHSUBDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src)
10898 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBDQrr),
10899 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10900 GIR_RootToRootCopy, /*OpIdx*/2, // src
10901 GIR_RootConstrainSelectedInstOperands,
10902 // GIR_Coverage, 1519,
10903 GIR_EraseRootFromParent_Done,
10904 // Label 820: @27842
10905 GIM_Try, /*On fail goto*//*Label 821*/ GIMT_Encode4(27878), // Rule ID 1521 //
10906 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10907 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphsubbw),
10908 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
10909 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
10910 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10911 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10912 // (intrinsic_wo_chain:{ *:[v8i16] } 13845:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHSUBBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src)
10913 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBBWrr),
10914 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10915 GIR_RootToRootCopy, /*OpIdx*/2, // src
10916 GIR_RootConstrainSelectedInstOperands,
10917 // GIR_Coverage, 1521,
10918 GIR_EraseRootFromParent_Done,
10919 // Label 821: @27878
10920 GIM_Try, /*On fail goto*//*Label 822*/ GIMT_Encode4(27914), // Rule ID 1523 //
10921 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10922 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddwq),
10923 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
10924 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10925 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10926 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10927 // (intrinsic_wo_chain:{ *:[v2i64] } 13844:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src)
10928 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDWQrr),
10929 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10930 GIR_RootToRootCopy, /*OpIdx*/2, // src
10931 GIR_RootConstrainSelectedInstOperands,
10932 // GIR_Coverage, 1523,
10933 GIR_EraseRootFromParent_Done,
10934 // Label 822: @27914
10935 GIM_Try, /*On fail goto*//*Label 823*/ GIMT_Encode4(27950), // Rule ID 1525 //
10936 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10937 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddwd),
10938 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
10939 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10940 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10941 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10942 // (intrinsic_wo_chain:{ *:[v4i32] } 13843:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src)
10943 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDWDrr),
10944 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10945 GIR_RootToRootCopy, /*OpIdx*/2, // src
10946 GIR_RootConstrainSelectedInstOperands,
10947 // GIR_Coverage, 1525,
10948 GIR_EraseRootFromParent_Done,
10949 // Label 823: @27950
10950 GIM_Try, /*On fail goto*//*Label 824*/ GIMT_Encode4(27986), // Rule ID 1527 //
10951 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10952 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphadduwq),
10953 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
10954 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10955 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10956 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10957 // (intrinsic_wo_chain:{ *:[v2i64] } 13842:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src)
10958 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUWQrr),
10959 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10960 GIR_RootToRootCopy, /*OpIdx*/2, // src
10961 GIR_RootConstrainSelectedInstOperands,
10962 // GIR_Coverage, 1527,
10963 GIR_EraseRootFromParent_Done,
10964 // Label 824: @27986
10965 GIM_Try, /*On fail goto*//*Label 825*/ GIMT_Encode4(28022), // Rule ID 1529 //
10966 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10967 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphadduwd),
10968 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
10969 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10970 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10971 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10972 // (intrinsic_wo_chain:{ *:[v4i32] } 13841:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src)
10973 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUWDrr),
10974 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10975 GIR_RootToRootCopy, /*OpIdx*/2, // src
10976 GIR_RootConstrainSelectedInstOperands,
10977 // GIR_Coverage, 1529,
10978 GIR_EraseRootFromParent_Done,
10979 // Label 825: @28022
10980 GIM_Try, /*On fail goto*//*Label 826*/ GIMT_Encode4(28058), // Rule ID 1531 //
10981 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10982 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddudq),
10983 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
10984 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
10985 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10986 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
10987 // (intrinsic_wo_chain:{ *:[v2i64] } 13840:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDUDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src)
10988 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUDQrr),
10989 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10990 GIR_RootToRootCopy, /*OpIdx*/2, // src
10991 GIR_RootConstrainSelectedInstOperands,
10992 // GIR_Coverage, 1531,
10993 GIR_EraseRootFromParent_Done,
10994 // Label 826: @28058
10995 GIM_Try, /*On fail goto*//*Label 827*/ GIMT_Encode4(28094), // Rule ID 1533 //
10996 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
10997 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddubw),
10998 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
10999 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11000 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11001 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11002 // (intrinsic_wo_chain:{ *:[v8i16] } 13839:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src)
11003 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUBWrr),
11004 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11005 GIR_RootToRootCopy, /*OpIdx*/2, // src
11006 GIR_RootConstrainSelectedInstOperands,
11007 // GIR_Coverage, 1533,
11008 GIR_EraseRootFromParent_Done,
11009 // Label 827: @28094
11010 GIM_Try, /*On fail goto*//*Label 828*/ GIMT_Encode4(28130), // Rule ID 1535 //
11011 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11012 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddubq),
11013 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11014 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11015 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11016 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11017 // (intrinsic_wo_chain:{ *:[v2i64] } 13838:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src)
11018 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUBQrr),
11019 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11020 GIR_RootToRootCopy, /*OpIdx*/2, // src
11021 GIR_RootConstrainSelectedInstOperands,
11022 // GIR_Coverage, 1535,
11023 GIR_EraseRootFromParent_Done,
11024 // Label 828: @28130
11025 GIM_Try, /*On fail goto*//*Label 829*/ GIMT_Encode4(28166), // Rule ID 1537 //
11026 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11027 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddubd),
11028 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11029 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11030 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11031 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11032 // (intrinsic_wo_chain:{ *:[v4i32] } 13837:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src)
11033 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUBDrr),
11034 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11035 GIR_RootToRootCopy, /*OpIdx*/2, // src
11036 GIR_RootConstrainSelectedInstOperands,
11037 // GIR_Coverage, 1537,
11038 GIR_EraseRootFromParent_Done,
11039 // Label 829: @28166
11040 GIM_Try, /*On fail goto*//*Label 830*/ GIMT_Encode4(28202), // Rule ID 1539 //
11041 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11042 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphadddq),
11043 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11044 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11045 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11046 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11047 // (intrinsic_wo_chain:{ *:[v2i64] } 13836:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src)
11048 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDDQrr),
11049 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11050 GIR_RootToRootCopy, /*OpIdx*/2, // src
11051 GIR_RootConstrainSelectedInstOperands,
11052 // GIR_Coverage, 1539,
11053 GIR_EraseRootFromParent_Done,
11054 // Label 830: @28202
11055 GIM_Try, /*On fail goto*//*Label 831*/ GIMT_Encode4(28238), // Rule ID 1541 //
11056 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11057 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddbw),
11058 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11059 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11060 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11061 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11062 // (intrinsic_wo_chain:{ *:[v8i16] } 13835:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src)
11063 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDBWrr),
11064 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11065 GIR_RootToRootCopy, /*OpIdx*/2, // src
11066 GIR_RootConstrainSelectedInstOperands,
11067 // GIR_Coverage, 1541,
11068 GIR_EraseRootFromParent_Done,
11069 // Label 831: @28238
11070 GIM_Try, /*On fail goto*//*Label 832*/ GIMT_Encode4(28274), // Rule ID 1543 //
11071 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11072 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddbq),
11073 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11074 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11075 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11076 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11077 // (intrinsic_wo_chain:{ *:[v2i64] } 13834:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src)
11078 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDBQrr),
11079 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11080 GIR_RootToRootCopy, /*OpIdx*/2, // src
11081 GIR_RootConstrainSelectedInstOperands,
11082 // GIR_Coverage, 1543,
11083 GIR_EraseRootFromParent_Done,
11084 // Label 832: @28274
11085 GIM_Try, /*On fail goto*//*Label 833*/ GIMT_Encode4(28310), // Rule ID 1545 //
11086 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11087 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddbd),
11088 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11089 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11090 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11091 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11092 // (intrinsic_wo_chain:{ *:[v4i32] } 13833:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src)
11093 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDBDrr),
11094 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11095 GIR_RootToRootCopy, /*OpIdx*/2, // src
11096 GIR_RootConstrainSelectedInstOperands,
11097 // GIR_Coverage, 1545,
11098 GIR_EraseRootFromParent_Done,
11099 // Label 833: @28310
11100 GIM_Try, /*On fail goto*//*Label 834*/ GIMT_Encode4(28346), // Rule ID 1547 //
11101 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11102 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_ss),
11103 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11104 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11105 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11106 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11107 // (intrinsic_wo_chain:{ *:[v4f32] } 13828:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZSSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
11108 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZSSrr),
11109 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11110 GIR_RootToRootCopy, /*OpIdx*/2, // src
11111 GIR_RootConstrainSelectedInstOperands,
11112 // GIR_Coverage, 1547,
11113 GIR_EraseRootFromParent_Done,
11114 // Label 834: @28346
11115 GIM_Try, /*On fail goto*//*Label 835*/ GIMT_Encode4(28382), // Rule ID 1551 //
11116 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11117 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_ps),
11118 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11119 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11120 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11121 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11122 // (intrinsic_wo_chain:{ *:[v4f32] } 13825:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
11123 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPSrr),
11124 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11125 GIR_RootToRootCopy, /*OpIdx*/2, // src
11126 GIR_RootConstrainSelectedInstOperands,
11127 // GIR_Coverage, 1551,
11128 GIR_EraseRootFromParent_Done,
11129 // Label 835: @28382
11130 GIM_Try, /*On fail goto*//*Label 836*/ GIMT_Encode4(28418), // Rule ID 1553 //
11131 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11132 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_ps_256),
11133 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
11134 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
11135 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11136 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11137 // (intrinsic_wo_chain:{ *:[v8f32] } 13826:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VFRCZPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src)
11138 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPSYrr),
11139 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11140 GIR_RootToRootCopy, /*OpIdx*/2, // src
11141 GIR_RootConstrainSelectedInstOperands,
11142 // GIR_Coverage, 1553,
11143 GIR_EraseRootFromParent_Done,
11144 // Label 836: @28418
11145 GIM_Try, /*On fail goto*//*Label 837*/ GIMT_Encode4(28454), // Rule ID 1555 //
11146 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11147 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_sd),
11148 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11149 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11150 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11151 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11152 // (intrinsic_wo_chain:{ *:[v2f64] } 13827:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZSDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
11153 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZSDrr),
11154 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11155 GIR_RootToRootCopy, /*OpIdx*/2, // src
11156 GIR_RootConstrainSelectedInstOperands,
11157 // GIR_Coverage, 1555,
11158 GIR_EraseRootFromParent_Done,
11159 // Label 837: @28454
11160 GIM_Try, /*On fail goto*//*Label 838*/ GIMT_Encode4(28490), // Rule ID 1559 //
11161 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11162 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_pd),
11163 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11164 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11165 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11166 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11167 // (intrinsic_wo_chain:{ *:[v2f64] } 13823:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
11168 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPDrr),
11169 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11170 GIR_RootToRootCopy, /*OpIdx*/2, // src
11171 GIR_RootConstrainSelectedInstOperands,
11172 // GIR_Coverage, 1559,
11173 GIR_EraseRootFromParent_Done,
11174 // Label 838: @28490
11175 GIM_Try, /*On fail goto*//*Label 839*/ GIMT_Encode4(28526), // Rule ID 1561 //
11176 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
11177 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_pd_256),
11178 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
11179 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
11180 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11181 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11182 // (intrinsic_wo_chain:{ *:[v4f64] } 13824:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src) => (VFRCZPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src)
11183 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPDYrr),
11184 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11185 GIR_RootToRootCopy, /*OpIdx*/2, // src
11186 GIR_RootConstrainSelectedInstOperands,
11187 // GIR_Coverage, 1561,
11188 GIR_EraseRootFromParent_Done,
11189 // Label 839: @28526
11190 GIM_Try, /*On fail goto*//*Label 840*/ GIMT_Encode4(28562), // Rule ID 3311 //
11191 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX),
11192 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesimc),
11193 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11194 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11195 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11196 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11197 // (intrinsic_wo_chain:{ *:[v2i64] } 12508:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (VAESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1)
11198 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESIMCrr),
11199 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11200 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11201 GIR_RootConstrainSelectedInstOperands,
11202 // GIR_Coverage, 3311,
11203 GIR_EraseRootFromParent_Done,
11204 // Label 840: @28562
11205 GIM_Try, /*On fail goto*//*Label 841*/ GIMT_Encode4(28598), // Rule ID 3313 //
11206 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX),
11207 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesimc),
11208 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11209 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11210 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11211 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11212 // (intrinsic_wo_chain:{ *:[v2i64] } 12508:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (AESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1)
11213 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESIMCrr),
11214 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11215 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11216 GIR_RootConstrainSelectedInstOperands,
11217 // GIR_Coverage, 3313,
11218 GIR_EraseRootFromParent_Done,
11219 // Label 841: @28598
11220 GIM_Try, /*On fail goto*//*Label 842*/ GIMT_Encode4(28634), // Rule ID 3503 //
11221 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXNECONVERT),
11222 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16128),
11223 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11224 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11225 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11226 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11227 // (intrinsic_wo_chain:{ *:[v8bf16] } 13785:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VCVTNEPS2BF16rr:{ *:[v8bf16] } VR128:{ *:[v4f32] }:$src)
11228 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16rr),
11229 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11230 GIR_RootToRootCopy, /*OpIdx*/2, // src
11231 GIR_RootConstrainSelectedInstOperands,
11232 // GIR_Coverage, 3503,
11233 GIR_EraseRootFromParent_Done,
11234 // Label 842: @28634
11235 GIM_Try, /*On fail goto*//*Label 843*/ GIMT_Encode4(28670), // Rule ID 3505 //
11236 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXNECONVERT),
11237 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16256),
11238 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11239 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
11240 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11241 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11242 // (intrinsic_wo_chain:{ *:[v8bf16] } 13786:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VCVTNEPS2BF16Yrr:{ *:[v8bf16] } VR256:{ *:[v8f32] }:$src)
11243 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16Yrr),
11244 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11245 GIR_RootToRootCopy, /*OpIdx*/2, // src
11246 GIR_RootConstrainSelectedInstOperands,
11247 // GIR_Coverage, 3505,
11248 GIR_EraseRootFromParent_Done,
11249 // Label 843: @28670
11250 GIM_Try, /*On fail goto*//*Label 844*/ GIMT_Encode4(28708), // Rule ID 16776 //
11251 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
11252 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rsqrt_ss),
11253 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11254 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11255 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11256 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11257 // (intrinsic_wo_chain:{ *:[v4f32] } 13593:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
11258 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RSQRTSSr_Int),
11259 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11260 GIR_RootToRootCopy, /*OpIdx*/2, // src
11261 GIR_RootToRootCopy, /*OpIdx*/2, // src
11262 GIR_RootConstrainSelectedInstOperands,
11263 // GIR_Coverage, 16776,
11264 GIR_EraseRootFromParent_Done,
11265 // Label 844: @28708
11266 GIM_Try, /*On fail goto*//*Label 845*/ GIMT_Encode4(28746), // Rule ID 16780 //
11267 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
11268 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rsqrt_ss),
11269 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11270 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11271 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11272 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11273 // (intrinsic_wo_chain:{ *:[v4f32] } 13593:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
11274 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VRSQRTSSr_Int),
11275 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11276 GIR_RootToRootCopy, /*OpIdx*/2, // src
11277 GIR_RootToRootCopy, /*OpIdx*/2, // src
11278 GIR_RootConstrainSelectedInstOperands,
11279 // GIR_Coverage, 16780,
11280 GIR_EraseRootFromParent_Done,
11281 // Label 845: @28746
11282 GIM_Try, /*On fail goto*//*Label 846*/ GIMT_Encode4(28784), // Rule ID 16796 //
11283 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
11284 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rcp_ss),
11285 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11286 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11287 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11288 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11289 // (intrinsic_wo_chain:{ *:[v4f32] } 13591:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
11290 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RCPSSr_Int),
11291 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11292 GIR_RootToRootCopy, /*OpIdx*/2, // src
11293 GIR_RootToRootCopy, /*OpIdx*/2, // src
11294 GIR_RootConstrainSelectedInstOperands,
11295 // GIR_Coverage, 16796,
11296 GIR_EraseRootFromParent_Done,
11297 // Label 846: @28784
11298 GIM_Try, /*On fail goto*//*Label 847*/ GIMT_Encode4(28822), // Rule ID 16800 //
11299 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
11300 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rcp_ss),
11301 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11302 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11303 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11304 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11305 // (intrinsic_wo_chain:{ *:[v4f32] } 13591:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
11306 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VRCPSSr_Int),
11307 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11308 GIR_RootToRootCopy, /*OpIdx*/2, // src
11309 GIR_RootToRootCopy, /*OpIdx*/2, // src
11310 GIR_RootConstrainSelectedInstOperands,
11311 // GIR_Coverage, 16800,
11312 GIR_EraseRootFromParent_Done,
11313 // Label 847: @28822
11314 GIM_Try, /*On fail goto*//*Label 848*/ GIMT_Encode4(28858), // Rule ID 20675 //
11315 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBF16_HasVLX),
11316 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16128),
11317 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11318 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11319 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
11320 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
11321 // (intrinsic_wo_chain:{ *:[v8bf16] } 13785:{ *:[iPTR] }, VR128X:{ *:[v4f32] }:$src) => (VCVTNEPS2BF16Z128rr:{ *:[v8bf16] } VR128X:{ *:[v4f32] }:$src)
11322 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16Z128rr),
11323 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11324 GIR_RootToRootCopy, /*OpIdx*/2, // src
11325 GIR_RootConstrainSelectedInstOperands,
11326 // GIR_Coverage, 20675,
11327 GIR_EraseRootFromParent_Done,
11328 // Label 848: @28858
11329 GIM_Try, /*On fail goto*//*Label 849*/ GIMT_Encode4(28894), // Rule ID 20677 //
11330 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBF16_HasVLX),
11331 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16256),
11332 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11333 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
11334 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
11335 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
11336 // (intrinsic_wo_chain:{ *:[v8bf16] } 13786:{ *:[iPTR] }, VR256X:{ *:[v8f32] }:$src) => (VCVTNEPS2BF16Z256rr:{ *:[v8bf16] } VR256X:{ *:[v8f32] }:$src)
11337 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16Z256rr),
11338 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11339 GIR_RootToRootCopy, /*OpIdx*/2, // src
11340 GIR_RootConstrainSelectedInstOperands,
11341 // GIR_Coverage, 20677,
11342 GIR_EraseRootFromParent_Done,
11343 // Label 849: @28894
11344 GIM_Reject,
11345 // Label 818: @28895
11346 GIM_Try, /*On fail goto*//*Label 850*/ GIMT_Encode4(31686),
11347 GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
11348 GIM_Try, /*On fail goto*//*Label 851*/ GIMT_Encode4(28944), // Rule ID 3315 //
11349 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX),
11350 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aeskeygenassist),
11351 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11352 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11353 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11354 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11355 // MIs[0] src2
11356 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
11357 // (intrinsic_wo_chain:{ *:[v2i64] } 12509:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (VAESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2)
11358 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESKEYGENASSIST128rr),
11359 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11360 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11361 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11362 GIR_RootConstrainSelectedInstOperands,
11363 // GIR_Coverage, 3315,
11364 GIR_EraseRootFromParent_Done,
11365 // Label 851: @28944
11366 GIM_Try, /*On fail goto*//*Label 852*/ GIMT_Encode4(28985), // Rule ID 3317 //
11367 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX),
11368 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aeskeygenassist),
11369 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11370 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11371 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11372 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11373 // MIs[0] src2
11374 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
11375 // (intrinsic_wo_chain:{ *:[v2i64] } 12509:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (AESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2)
11376 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESKEYGENASSIST128rr),
11377 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11378 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11379 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11380 GIR_RootConstrainSelectedInstOperands,
11381 // GIR_Coverage, 3317,
11382 GIR_EraseRootFromParent_Done,
11383 // Label 852: @28985
11384 GIM_Try, /*On fail goto*//*Label 853*/ GIMT_Encode4(29030), // Rule ID 2970 //
11385 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
11386 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_b_128),
11387 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
11388 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11389 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
11390 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11391 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11392 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11393 // (intrinsic_wo_chain:{ *:[v16i8] } 13731:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
11394 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNBrr),
11395 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11396 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11397 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11398 GIR_RootConstrainSelectedInstOperands,
11399 // GIR_Coverage, 2970,
11400 GIR_EraseRootFromParent_Done,
11401 // Label 853: @29030
11402 GIM_Try, /*On fail goto*//*Label 854*/ GIMT_Encode4(29075), // Rule ID 2972 //
11403 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
11404 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_w_128),
11405 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11406 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11407 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11408 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11409 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11410 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11411 // (intrinsic_wo_chain:{ *:[v8i16] } 13735:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
11412 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNWrr),
11413 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11414 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11415 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11416 GIR_RootConstrainSelectedInstOperands,
11417 // GIR_Coverage, 2972,
11418 GIR_EraseRootFromParent_Done,
11419 // Label 854: @29075
11420 GIM_Try, /*On fail goto*//*Label 855*/ GIMT_Encode4(29120), // Rule ID 2974 //
11421 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
11422 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_d_128),
11423 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11424 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11425 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11426 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11427 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11428 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11429 // (intrinsic_wo_chain:{ *:[v4i32] } 13733:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
11430 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNDrr),
11431 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11432 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11433 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11434 GIR_RootConstrainSelectedInstOperands,
11435 // GIR_Coverage, 2974,
11436 GIR_EraseRootFromParent_Done,
11437 // Label 855: @29120
11438 GIM_Try, /*On fail goto*//*Label 856*/ GIMT_Encode4(29165), // Rule ID 2976 //
11439 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
11440 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phadd_sw_128),
11441 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11442 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11443 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11444 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11445 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11446 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11447 // (intrinsic_wo_chain:{ *:[v8i16] } 13715:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
11448 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDSWrr),
11449 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11450 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11451 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11452 GIR_RootConstrainSelectedInstOperands,
11453 // GIR_Coverage, 2976,
11454 GIR_EraseRootFromParent_Done,
11455 // Label 856: @29165
11456 GIM_Try, /*On fail goto*//*Label 857*/ GIMT_Encode4(29210), // Rule ID 2978 //
11457 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
11458 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phsub_sw_128),
11459 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11460 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11461 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11462 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11463 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11464 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11465 // (intrinsic_wo_chain:{ *:[v8i16] } 13721:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
11466 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBSWrr),
11467 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11468 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11469 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11470 GIR_RootConstrainSelectedInstOperands,
11471 // GIR_Coverage, 2978,
11472 GIR_EraseRootFromParent_Done,
11473 // Label 857: @29210
11474 GIM_Try, /*On fail goto*//*Label 858*/ GIMT_Encode4(29255), // Rule ID 2994 //
11475 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2),
11476 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_psign_b),
11477 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v32s8,
11478 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
11479 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s8,
11480 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11481 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11482 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11483 // (intrinsic_wo_chain:{ *:[v32i8] } 12627:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSIGNBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
11484 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNBYrr),
11485 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11486 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11487 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11488 GIR_RootConstrainSelectedInstOperands,
11489 // GIR_Coverage, 2994,
11490 GIR_EraseRootFromParent_Done,
11491 // Label 858: @29255
11492 GIM_Try, /*On fail goto*//*Label 859*/ GIMT_Encode4(29300), // Rule ID 2996 //
11493 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2),
11494 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_psign_w),
11495 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16,
11496 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
11497 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
11498 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11499 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11500 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11501 // (intrinsic_wo_chain:{ *:[v16i16] } 12629:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSIGNWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
11502 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNWYrr),
11503 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11504 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11505 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11506 GIR_RootConstrainSelectedInstOperands,
11507 // GIR_Coverage, 2996,
11508 GIR_EraseRootFromParent_Done,
11509 // Label 859: @29300
11510 GIM_Try, /*On fail goto*//*Label 860*/ GIMT_Encode4(29345), // Rule ID 2998 //
11511 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2),
11512 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_psign_d),
11513 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
11514 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
11515 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
11516 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11517 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11518 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11519 // (intrinsic_wo_chain:{ *:[v8i32] } 12628:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSIGNDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
11520 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNDYrr),
11521 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11522 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11523 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11524 GIR_RootConstrainSelectedInstOperands,
11525 // GIR_Coverage, 2998,
11526 GIR_EraseRootFromParent_Done,
11527 // Label 860: @29345
11528 GIM_Try, /*On fail goto*//*Label 861*/ GIMT_Encode4(29390), // Rule ID 3000 //
11529 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2),
11530 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_phadd_sw),
11531 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16,
11532 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
11533 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
11534 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11535 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11536 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11537 // (intrinsic_wo_chain:{ *:[v16i16] } 12614:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
11538 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDSWYrr),
11539 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11540 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11541 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11542 GIR_RootConstrainSelectedInstOperands,
11543 // GIR_Coverage, 3000,
11544 GIR_EraseRootFromParent_Done,
11545 // Label 861: @29390
11546 GIM_Try, /*On fail goto*//*Label 862*/ GIMT_Encode4(29435), // Rule ID 3002 //
11547 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2),
11548 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_phsub_sw),
11549 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16,
11550 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
11551 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
11552 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11553 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11554 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11555 // (intrinsic_wo_chain:{ *:[v16i16] } 12617:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
11556 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBSWYrr),
11557 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11558 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11559 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11560 GIR_RootConstrainSelectedInstOperands,
11561 // GIR_Coverage, 3002,
11562 GIR_EraseRootFromParent_Done,
11563 // Label 862: @29435
11564 GIM_Try, /*On fail goto*//*Label 863*/ GIMT_Encode4(29480), // Rule ID 3012 //
11565 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
11566 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_b_128),
11567 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
11568 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11569 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
11570 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11571 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11572 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11573 // (intrinsic_wo_chain:{ *:[v16i8] } 13731:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
11574 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PSIGNBrr),
11575 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11576 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11577 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11578 GIR_RootConstrainSelectedInstOperands,
11579 // GIR_Coverage, 3012,
11580 GIR_EraseRootFromParent_Done,
11581 // Label 863: @29480
11582 GIM_Try, /*On fail goto*//*Label 864*/ GIMT_Encode4(29525), // Rule ID 3014 //
11583 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
11584 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_w_128),
11585 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11586 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11587 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11588 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11589 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11590 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11591 // (intrinsic_wo_chain:{ *:[v8i16] } 13735:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
11592 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PSIGNWrr),
11593 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11594 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11595 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11596 GIR_RootConstrainSelectedInstOperands,
11597 // GIR_Coverage, 3014,
11598 GIR_EraseRootFromParent_Done,
11599 // Label 864: @29525
11600 GIM_Try, /*On fail goto*//*Label 865*/ GIMT_Encode4(29570), // Rule ID 3016 //
11601 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
11602 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_d_128),
11603 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11604 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11605 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11606 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11607 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11608 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11609 // (intrinsic_wo_chain:{ *:[v4i32] } 13733:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
11610 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PSIGNDrr),
11611 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11612 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11613 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11614 GIR_RootConstrainSelectedInstOperands,
11615 // GIR_Coverage, 3016,
11616 GIR_EraseRootFromParent_Done,
11617 // Label 865: @29570
11618 GIM_Try, /*On fail goto*//*Label 866*/ GIMT_Encode4(29615), // Rule ID 3020 //
11619 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
11620 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phadd_sw_128),
11621 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11622 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11623 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11624 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11625 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11626 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11627 // (intrinsic_wo_chain:{ *:[v8i16] } 13715:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
11628 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PHADDSWrr),
11629 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11630 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11631 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11632 GIR_RootConstrainSelectedInstOperands,
11633 // GIR_Coverage, 3020,
11634 GIR_EraseRootFromParent_Done,
11635 // Label 866: @29615
11636 GIM_Try, /*On fail goto*//*Label 867*/ GIMT_Encode4(29660), // Rule ID 3022 //
11637 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
11638 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phsub_sw_128),
11639 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
11640 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11641 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11642 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11643 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11644 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11645 // (intrinsic_wo_chain:{ *:[v8i16] } 13721:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
11646 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PHSUBSWrr),
11647 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11648 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11649 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11650 GIR_RootConstrainSelectedInstOperands,
11651 // GIR_Coverage, 3022,
11652 GIR_EraseRootFromParent_Done,
11653 // Label 867: @29660
11654 GIM_Try, /*On fail goto*//*Label 868*/ GIMT_Encode4(29705), // Rule ID 3257 //
11655 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR),
11656 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_8),
11657 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
11658 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11659 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8,
11660 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11661 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11662 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
11663 // (intrinsic_wo_chain:{ *:[i32] } 13689:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2)
11664 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r8),
11665 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11666 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11667 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11668 GIR_RootConstrainSelectedInstOperands,
11669 // GIR_Coverage, 3257,
11670 GIR_EraseRootFromParent_Done,
11671 // Label 868: @29705
11672 GIM_Try, /*On fail goto*//*Label 869*/ GIMT_Encode4(29750), // Rule ID 3259 //
11673 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR),
11674 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_16),
11675 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
11676 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11677 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s16,
11678 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11679 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11680 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
11681 // (intrinsic_wo_chain:{ *:[i32] } 13687:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2)
11682 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r16),
11683 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11684 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11685 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11686 GIR_RootConstrainSelectedInstOperands,
11687 // GIR_Coverage, 3259,
11688 GIR_EraseRootFromParent_Done,
11689 // Label 869: @29750
11690 GIM_Try, /*On fail goto*//*Label 870*/ GIMT_Encode4(29795), // Rule ID 3261 //
11691 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR),
11692 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_32),
11693 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
11694 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11695 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
11696 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11697 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11698 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11699 // (intrinsic_wo_chain:{ *:[i32] } 13688:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
11700 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r32),
11701 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11702 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11703 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11704 GIR_RootConstrainSelectedInstOperands,
11705 // GIR_Coverage, 3261,
11706 GIR_EraseRootFromParent_Done,
11707 // Label 870: @29795
11708 GIM_Try, /*On fail goto*//*Label 871*/ GIMT_Encode4(29840), // Rule ID 3263 //
11709 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR),
11710 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_64_64),
11711 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
11712 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
11713 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
11714 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
11715 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
11716 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
11717 // (intrinsic_wo_chain:{ *:[i64] } 13690:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
11718 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r64r64),
11719 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11720 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11721 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11722 GIR_RootConstrainSelectedInstOperands,
11723 // GIR_Coverage, 3263,
11724 GIR_EraseRootFromParent_Done,
11725 // Label 871: @29840
11726 GIM_Try, /*On fail goto*//*Label 872*/ GIMT_Encode4(29885), // Rule ID 3265 //
11727 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode),
11728 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_8),
11729 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
11730 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11731 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8,
11732 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11733 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11734 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
11735 // (intrinsic_wo_chain:{ *:[i32] } 13689:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2)
11736 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r8_EVEX),
11737 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11738 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11739 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11740 GIR_RootConstrainSelectedInstOperands,
11741 // GIR_Coverage, 3265,
11742 GIR_EraseRootFromParent_Done,
11743 // Label 872: @29885
11744 GIM_Try, /*On fail goto*//*Label 873*/ GIMT_Encode4(29930), // Rule ID 3267 //
11745 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode),
11746 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_16),
11747 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
11748 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11749 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s16,
11750 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11751 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11752 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
11753 // (intrinsic_wo_chain:{ *:[i32] } 13687:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2)
11754 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r16_EVEX),
11755 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11756 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11757 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11758 GIR_RootConstrainSelectedInstOperands,
11759 // GIR_Coverage, 3267,
11760 GIR_EraseRootFromParent_Done,
11761 // Label 873: @29930
11762 GIM_Try, /*On fail goto*//*Label 874*/ GIMT_Encode4(29975), // Rule ID 3269 //
11763 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode),
11764 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_32),
11765 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
11766 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11767 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
11768 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11769 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11770 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
11771 // (intrinsic_wo_chain:{ *:[i32] } 13688:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
11772 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r32_EVEX),
11773 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11774 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11775 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11776 GIR_RootConstrainSelectedInstOperands,
11777 // GIR_Coverage, 3269,
11778 GIR_EraseRootFromParent_Done,
11779 // Label 874: @29975
11780 GIM_Try, /*On fail goto*//*Label 875*/ GIMT_Encode4(30020), // Rule ID 3271 //
11781 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode),
11782 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_64_64),
11783 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
11784 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
11785 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
11786 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
11787 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
11788 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
11789 // (intrinsic_wo_chain:{ *:[i64] } 13690:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64_EVEX:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
11790 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r64r64_EVEX),
11791 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11792 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11793 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11794 GIR_RootConstrainSelectedInstOperands,
11795 // GIR_Coverage, 3271,
11796 GIR_EraseRootFromParent_Done,
11797 // Label 875: @30020
11798 GIM_Try, /*On fail goto*//*Label 876*/ GIMT_Encode4(30065), // Rule ID 3275 //
11799 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA),
11800 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1nexte),
11801 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11802 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11803 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11804 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11805 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11806 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11807 // (intrinsic_wo_chain:{ *:[v4i32] } 13559:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1NEXTErr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
11808 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1NEXTErr),
11809 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11810 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11811 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11812 GIR_RootConstrainSelectedInstOperands,
11813 // GIR_Coverage, 3275,
11814 GIR_EraseRootFromParent_Done,
11815 // Label 876: @30065
11816 GIM_Try, /*On fail goto*//*Label 877*/ GIMT_Encode4(30110), // Rule ID 3277 //
11817 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA),
11818 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1msg1),
11819 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11820 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11821 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11822 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11823 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11824 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11825 // (intrinsic_wo_chain:{ *:[v4i32] } 13557:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
11826 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1MSG1rr),
11827 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11828 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11829 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11830 GIR_RootConstrainSelectedInstOperands,
11831 // GIR_Coverage, 3277,
11832 GIR_EraseRootFromParent_Done,
11833 // Label 877: @30110
11834 GIM_Try, /*On fail goto*//*Label 878*/ GIMT_Encode4(30155), // Rule ID 3279 //
11835 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA),
11836 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1msg2),
11837 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11838 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11839 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11840 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11841 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11842 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11843 // (intrinsic_wo_chain:{ *:[v4i32] } 13558:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
11844 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1MSG2rr),
11845 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11846 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11847 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11848 GIR_RootConstrainSelectedInstOperands,
11849 // GIR_Coverage, 3279,
11850 GIR_EraseRootFromParent_Done,
11851 // Label 878: @30155
11852 GIM_Try, /*On fail goto*//*Label 879*/ GIMT_Encode4(30200), // Rule ID 3283 //
11853 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA),
11854 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha256msg1),
11855 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11856 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11857 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11858 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11859 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11860 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11861 // (intrinsic_wo_chain:{ *:[v4i32] } 13561:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
11862 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA256MSG1rr),
11863 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11864 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11865 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11866 GIR_RootConstrainSelectedInstOperands,
11867 // GIR_Coverage, 3283,
11868 GIR_EraseRootFromParent_Done,
11869 // Label 879: @30200
11870 GIM_Try, /*On fail goto*//*Label 880*/ GIMT_Encode4(30245), // Rule ID 3285 //
11871 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA),
11872 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha256msg2),
11873 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
11874 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11875 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11876 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11877 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11878 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11879 // (intrinsic_wo_chain:{ *:[v4i32] } 13562:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
11880 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA256MSG2rr),
11881 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11882 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11883 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11884 GIR_RootConstrainSelectedInstOperands,
11885 // GIR_Coverage, 3285,
11886 GIR_EraseRootFromParent_Done,
11887 // Label 880: @30245
11888 GIM_Try, /*On fail goto*//*Label 881*/ GIMT_Encode4(30290), // Rule ID 3287 //
11889 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES),
11890 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc),
11891 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11892 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11893 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11894 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11895 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11896 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11897 // (intrinsic_wo_chain:{ *:[v2i64] } 12502:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
11898 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCrr),
11899 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11900 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11901 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11902 GIR_RootConstrainSelectedInstOperands,
11903 // GIR_Coverage, 3287,
11904 GIR_EraseRootFromParent_Done,
11905 // Label 881: @30290
11906 GIM_Try, /*On fail goto*//*Label 882*/ GIMT_Encode4(30335), // Rule ID 3289 //
11907 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES),
11908 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast),
11909 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11910 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11911 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11912 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11913 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11914 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11915 // (intrinsic_wo_chain:{ *:[v2i64] } 12505:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
11916 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTrr),
11917 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11918 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11919 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11920 GIR_RootConstrainSelectedInstOperands,
11921 // GIR_Coverage, 3289,
11922 GIR_EraseRootFromParent_Done,
11923 // Label 882: @30335
11924 GIM_Try, /*On fail goto*//*Label 883*/ GIMT_Encode4(30380), // Rule ID 3291 //
11925 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES),
11926 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec),
11927 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11928 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11929 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11930 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11931 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11932 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11933 // (intrinsic_wo_chain:{ *:[v2i64] } 12496:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
11934 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECrr),
11935 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11936 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11937 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11938 GIR_RootConstrainSelectedInstOperands,
11939 // GIR_Coverage, 3291,
11940 GIR_EraseRootFromParent_Done,
11941 // Label 883: @30380
11942 GIM_Try, /*On fail goto*//*Label 884*/ GIMT_Encode4(30425), // Rule ID 3293 //
11943 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES),
11944 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast),
11945 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
11946 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11947 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11948 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11949 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11950 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
11951 // (intrinsic_wo_chain:{ *:[v2i64] } 12499:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
11952 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTrr),
11953 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11954 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11955 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11956 GIR_RootConstrainSelectedInstOperands,
11957 // GIR_Coverage, 3293,
11958 GIR_EraseRootFromParent_Done,
11959 // Label 884: @30425
11960 GIM_Try, /*On fail goto*//*Label 885*/ GIMT_Encode4(30470), // Rule ID 3295 //
11961 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX),
11962 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc_256),
11963 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
11964 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
11965 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
11966 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11967 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11968 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11969 // (intrinsic_wo_chain:{ *:[v4i64] } 12503:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
11970 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCYrr),
11971 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11972 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11973 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11974 GIR_RootConstrainSelectedInstOperands,
11975 // GIR_Coverage, 3295,
11976 GIR_EraseRootFromParent_Done,
11977 // Label 885: @30470
11978 GIM_Try, /*On fail goto*//*Label 886*/ GIMT_Encode4(30515), // Rule ID 3297 //
11979 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX),
11980 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast_256),
11981 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
11982 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
11983 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
11984 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11985 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11986 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
11987 // (intrinsic_wo_chain:{ *:[v4i64] } 12506:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
11988 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTYrr),
11989 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11990 GIR_RootToRootCopy, /*OpIdx*/2, // src1
11991 GIR_RootToRootCopy, /*OpIdx*/3, // src2
11992 GIR_RootConstrainSelectedInstOperands,
11993 // GIR_Coverage, 3297,
11994 GIR_EraseRootFromParent_Done,
11995 // Label 886: @30515
11996 GIM_Try, /*On fail goto*//*Label 887*/ GIMT_Encode4(30560), // Rule ID 3299 //
11997 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX),
11998 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec_256),
11999 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12000 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12001 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12002 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12003 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12004 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12005 // (intrinsic_wo_chain:{ *:[v4i64] } 12497:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
12006 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECYrr),
12007 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12008 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12009 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12010 GIR_RootConstrainSelectedInstOperands,
12011 // GIR_Coverage, 3299,
12012 GIR_EraseRootFromParent_Done,
12013 // Label 887: @30560
12014 GIM_Try, /*On fail goto*//*Label 888*/ GIMT_Encode4(30605), // Rule ID 3301 //
12015 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX),
12016 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast_256),
12017 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12018 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12019 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12020 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12021 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12022 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12023 // (intrinsic_wo_chain:{ *:[v4i64] } 12500:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
12024 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTYrr),
12025 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12026 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12027 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12028 GIR_RootConstrainSelectedInstOperands,
12029 // GIR_Coverage, 3301,
12030 GIR_EraseRootFromParent_Done,
12031 // Label 888: @30605
12032 GIM_Try, /*On fail goto*//*Label 889*/ GIMT_Encode4(30650), // Rule ID 3303 //
12033 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX),
12034 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc),
12035 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12036 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12037 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12038 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12039 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12040 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12041 // (intrinsic_wo_chain:{ *:[v2i64] } 12502:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
12042 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESENCrr),
12043 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12044 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12045 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12046 GIR_RootConstrainSelectedInstOperands,
12047 // GIR_Coverage, 3303,
12048 GIR_EraseRootFromParent_Done,
12049 // Label 889: @30650
12050 GIM_Try, /*On fail goto*//*Label 890*/ GIMT_Encode4(30695), // Rule ID 3305 //
12051 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX),
12052 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast),
12053 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12054 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12055 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12056 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12057 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12058 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12059 // (intrinsic_wo_chain:{ *:[v2i64] } 12505:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
12060 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESENCLASTrr),
12061 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12062 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12063 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12064 GIR_RootConstrainSelectedInstOperands,
12065 // GIR_Coverage, 3305,
12066 GIR_EraseRootFromParent_Done,
12067 // Label 890: @30695
12068 GIM_Try, /*On fail goto*//*Label 891*/ GIMT_Encode4(30740), // Rule ID 3307 //
12069 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX),
12070 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec),
12071 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12072 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12073 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12074 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12075 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12076 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12077 // (intrinsic_wo_chain:{ *:[v2i64] } 12496:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
12078 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESDECrr),
12079 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12080 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12081 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12082 GIR_RootConstrainSelectedInstOperands,
12083 // GIR_Coverage, 3307,
12084 GIR_EraseRootFromParent_Done,
12085 // Label 891: @30740
12086 GIM_Try, /*On fail goto*//*Label 892*/ GIMT_Encode4(30785), // Rule ID 3309 //
12087 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX),
12088 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast),
12089 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12090 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12091 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12092 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12093 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12094 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12095 // (intrinsic_wo_chain:{ *:[v2i64] } 12499:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
12096 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESDECLASTrr),
12097 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12098 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12099 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12100 GIR_RootConstrainSelectedInstOperands,
12101 // GIR_Coverage, 3309,
12102 GIR_EraseRootFromParent_Done,
12103 // Label 892: @30785
12104 GIM_Try, /*On fail goto*//*Label 893*/ GIMT_Encode4(30830), // Rule ID 3326 //
12105 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSSE4A),
12106 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse4a_extrq),
12107 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12108 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12109 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
12110 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12111 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12112 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12113 // (intrinsic_wo_chain:{ *:[v2i64] } 13705:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) => (EXTRQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask)
12114 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::EXTRQ),
12115 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12116 GIR_RootToRootCopy, /*OpIdx*/2, // src
12117 GIR_RootToRootCopy, /*OpIdx*/3, // mask
12118 GIR_RootConstrainSelectedInstOperands,
12119 // GIR_Coverage, 3326,
12120 GIR_EraseRootFromParent_Done,
12121 // Label 893: @30830
12122 GIM_Try, /*On fail goto*//*Label 894*/ GIMT_Encode4(30875), // Rule ID 3328 //
12123 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSSE4A),
12124 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse4a_insertq),
12125 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12126 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12127 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12128 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12129 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12130 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12131 // (intrinsic_wo_chain:{ *:[v2i64] } 13707:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) => (INSERTQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask)
12132 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INSERTQ),
12133 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12134 GIR_RootToRootCopy, /*OpIdx*/2, // src
12135 GIR_RootToRootCopy, /*OpIdx*/3, // mask
12136 GIR_RootConstrainSelectedInstOperands,
12137 // GIR_Coverage, 3328,
12138 GIR_EraseRootFromParent_Done,
12139 // Label 894: @30875
12140 GIM_Try, /*On fail goto*//*Label 895*/ GIMT_Encode4(30920), // Rule ID 3507 //
12141 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA512),
12142 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsha512msg1),
12143 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12144 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12145 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12146 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12147 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12148 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12149 // (intrinsic_wo_chain:{ *:[v4i64] } 13798:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VSHA512MSG1rr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
12150 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSHA512MSG1rr),
12151 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12152 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12153 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12154 GIR_RootConstrainSelectedInstOperands,
12155 // GIR_Coverage, 3507,
12156 GIR_EraseRootFromParent_Done,
12157 // Label 895: @30920
12158 GIM_Try, /*On fail goto*//*Label 896*/ GIMT_Encode4(30965), // Rule ID 3508 //
12159 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA512),
12160 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsha512msg2),
12161 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12162 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12163 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12164 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12165 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12166 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12167 // (intrinsic_wo_chain:{ *:[v4i64] } 13799:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VSHA512MSG2rr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
12168 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSHA512MSG2rr),
12169 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12170 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12171 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12172 GIR_RootConstrainSelectedInstOperands,
12173 // GIR_Coverage, 3508,
12174 GIR_EraseRootFromParent_Done,
12175 // Label 896: @30965
12176 GIM_Try, /*On fail goto*//*Label 897*/ GIMT_Encode4(31010), // Rule ID 3516 //
12177 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4),
12178 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4key4128),
12179 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12180 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12181 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12182 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12183 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12184 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12185 // (intrinsic_wo_chain:{ *:[v4i32] } 13804:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VSM4KEY4rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
12186 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4KEY4rr),
12187 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12188 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12189 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12190 GIR_RootConstrainSelectedInstOperands,
12191 // GIR_Coverage, 3516,
12192 GIR_EraseRootFromParent_Done,
12193 // Label 897: @31010
12194 GIM_Try, /*On fail goto*//*Label 898*/ GIMT_Encode4(31055), // Rule ID 3518 //
12195 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4),
12196 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4key4256),
12197 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
12198 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
12199 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
12200 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12201 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12202 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12203 // (intrinsic_wo_chain:{ *:[v8i32] } 13805:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VSM4KEY4Yrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
12204 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4KEY4Yrr),
12205 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12206 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12207 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12208 GIR_RootConstrainSelectedInstOperands,
12209 // GIR_Coverage, 3518,
12210 GIR_EraseRootFromParent_Done,
12211 // Label 898: @31055
12212 GIM_Try, /*On fail goto*//*Label 899*/ GIMT_Encode4(31100), // Rule ID 3520 //
12213 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4),
12214 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4rnds4128),
12215 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12216 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12217 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12218 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12219 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12220 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12221 // (intrinsic_wo_chain:{ *:[v4i32] } 13806:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VSM4RNDS4rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
12222 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4RNDS4rr),
12223 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12224 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12225 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12226 GIR_RootConstrainSelectedInstOperands,
12227 // GIR_Coverage, 3520,
12228 GIR_EraseRootFromParent_Done,
12229 // Label 899: @31100
12230 GIM_Try, /*On fail goto*//*Label 900*/ GIMT_Encode4(31145), // Rule ID 3522 //
12231 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4),
12232 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4rnds4256),
12233 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
12234 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
12235 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
12236 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12237 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12238 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12239 // (intrinsic_wo_chain:{ *:[v8i32] } 13807:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VSM4RNDS4Yrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
12240 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4RNDS4Yrr),
12241 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12242 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12243 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12244 GIR_RootConstrainSelectedInstOperands,
12245 // GIR_Coverage, 3522,
12246 GIR_EraseRootFromParent_Done,
12247 // Label 900: @31145
12248 GIM_Try, /*On fail goto*//*Label 901*/ GIMT_Encode4(31190), // Rule ID 13946 //
12249 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12250 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc),
12251 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12252 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12253 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12254 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12255 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12256 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12257 // (intrinsic_wo_chain:{ *:[v2i64] } 12502:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
12258 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCZ128rr),
12259 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12260 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12261 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12262 GIR_RootConstrainSelectedInstOperands,
12263 // GIR_Coverage, 13946,
12264 GIR_EraseRootFromParent_Done,
12265 // Label 901: @31190
12266 GIM_Try, /*On fail goto*//*Label 902*/ GIMT_Encode4(31235), // Rule ID 13948 //
12267 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12268 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc_256),
12269 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12270 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12271 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12272 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12273 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12274 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12275 // (intrinsic_wo_chain:{ *:[v4i64] } 12503:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
12276 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCZ256rr),
12277 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12278 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12279 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12280 GIR_RootConstrainSelectedInstOperands,
12281 // GIR_Coverage, 13948,
12282 GIR_EraseRootFromParent_Done,
12283 // Label 902: @31235
12284 GIM_Try, /*On fail goto*//*Label 903*/ GIMT_Encode4(31280), // Rule ID 13950 //
12285 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES),
12286 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc_512),
12287 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64,
12288 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
12289 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
12290 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12291 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12292 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12293 // (intrinsic_wo_chain:{ *:[v8i64] } 12504:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
12294 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCZrr),
12295 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12296 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12297 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12298 GIR_RootConstrainSelectedInstOperands,
12299 // GIR_Coverage, 13950,
12300 GIR_EraseRootFromParent_Done,
12301 // Label 903: @31280
12302 GIM_Try, /*On fail goto*//*Label 904*/ GIMT_Encode4(31325), // Rule ID 13952 //
12303 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12304 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast),
12305 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12306 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12307 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12308 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12309 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12310 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12311 // (intrinsic_wo_chain:{ *:[v2i64] } 12505:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
12312 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTZ128rr),
12313 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12314 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12315 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12316 GIR_RootConstrainSelectedInstOperands,
12317 // GIR_Coverage, 13952,
12318 GIR_EraseRootFromParent_Done,
12319 // Label 904: @31325
12320 GIM_Try, /*On fail goto*//*Label 905*/ GIMT_Encode4(31370), // Rule ID 13954 //
12321 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12322 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast_256),
12323 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12324 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12325 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12326 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12327 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12328 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12329 // (intrinsic_wo_chain:{ *:[v4i64] } 12506:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
12330 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTZ256rr),
12331 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12332 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12333 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12334 GIR_RootConstrainSelectedInstOperands,
12335 // GIR_Coverage, 13954,
12336 GIR_EraseRootFromParent_Done,
12337 // Label 905: @31370
12338 GIM_Try, /*On fail goto*//*Label 906*/ GIMT_Encode4(31415), // Rule ID 13956 //
12339 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES),
12340 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast_512),
12341 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64,
12342 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
12343 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
12344 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12345 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12346 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12347 // (intrinsic_wo_chain:{ *:[v8i64] } 12507:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
12348 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTZrr),
12349 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12350 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12351 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12352 GIR_RootConstrainSelectedInstOperands,
12353 // GIR_Coverage, 13956,
12354 GIR_EraseRootFromParent_Done,
12355 // Label 906: @31415
12356 GIM_Try, /*On fail goto*//*Label 907*/ GIMT_Encode4(31460), // Rule ID 13958 //
12357 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12358 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec),
12359 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12360 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12361 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12362 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12363 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12364 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12365 // (intrinsic_wo_chain:{ *:[v2i64] } 12496:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
12366 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECZ128rr),
12367 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12368 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12369 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12370 GIR_RootConstrainSelectedInstOperands,
12371 // GIR_Coverage, 13958,
12372 GIR_EraseRootFromParent_Done,
12373 // Label 907: @31460
12374 GIM_Try, /*On fail goto*//*Label 908*/ GIMT_Encode4(31505), // Rule ID 13960 //
12375 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12376 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec_256),
12377 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12378 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12379 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12380 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12381 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12382 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12383 // (intrinsic_wo_chain:{ *:[v4i64] } 12497:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
12384 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECZ256rr),
12385 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12386 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12387 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12388 GIR_RootConstrainSelectedInstOperands,
12389 // GIR_Coverage, 13960,
12390 GIR_EraseRootFromParent_Done,
12391 // Label 908: @31505
12392 GIM_Try, /*On fail goto*//*Label 909*/ GIMT_Encode4(31550), // Rule ID 13962 //
12393 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES),
12394 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec_512),
12395 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64,
12396 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
12397 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
12398 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12399 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12400 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12401 // (intrinsic_wo_chain:{ *:[v8i64] } 12498:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
12402 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECZrr),
12403 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12404 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12405 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12406 GIR_RootConstrainSelectedInstOperands,
12407 // GIR_Coverage, 13962,
12408 GIR_EraseRootFromParent_Done,
12409 // Label 909: @31550
12410 GIM_Try, /*On fail goto*//*Label 910*/ GIMT_Encode4(31595), // Rule ID 13964 //
12411 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12412 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast),
12413 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12414 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12415 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12416 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12417 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12418 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12419 // (intrinsic_wo_chain:{ *:[v2i64] } 12499:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
12420 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTZ128rr),
12421 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12422 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12423 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12424 GIR_RootConstrainSelectedInstOperands,
12425 // GIR_Coverage, 13964,
12426 GIR_EraseRootFromParent_Done,
12427 // Label 910: @31595
12428 GIM_Try, /*On fail goto*//*Label 911*/ GIMT_Encode4(31640), // Rule ID 13966 //
12429 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX),
12430 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast_256),
12431 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12432 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12433 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12434 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12435 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12436 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12437 // (intrinsic_wo_chain:{ *:[v4i64] } 12500:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
12438 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTZ256rr),
12439 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12440 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12441 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12442 GIR_RootConstrainSelectedInstOperands,
12443 // GIR_Coverage, 13966,
12444 GIR_EraseRootFromParent_Done,
12445 // Label 911: @31640
12446 GIM_Try, /*On fail goto*//*Label 912*/ GIMT_Encode4(31685), // Rule ID 13968 //
12447 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES),
12448 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast_512),
12449 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64,
12450 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
12451 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
12452 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12453 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12454 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12455 // (intrinsic_wo_chain:{ *:[v8i64] } 12501:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
12456 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTZrr),
12457 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12458 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12459 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12460 GIR_RootConstrainSelectedInstOperands,
12461 // GIR_Coverage, 13968,
12462 GIR_EraseRootFromParent_Done,
12463 // Label 912: @31685
12464 GIM_Reject,
12465 // Label 850: @31686
12466 GIM_Try, /*On fail goto*//*Label 913*/ GIMT_Encode4(33969),
12467 GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
12468 GIM_Try, /*On fail goto*//*Label 914*/ GIMT_Encode4(31744), // Rule ID 3199 //
12469 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
12470 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_mpsadbw),
12471 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
12472 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
12473 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
12474 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12475 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12476 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12477 // MIs[0] src3
12478 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12479 // (intrinsic_wo_chain:{ *:[v8i16] } 13676:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) => (VMPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3)
12480 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMPSADBWrri),
12481 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12482 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12483 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12484 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12485 GIR_RootConstrainSelectedInstOperands,
12486 // GIR_Coverage, 3199,
12487 GIR_EraseRootFromParent_Done,
12488 // Label 914: @31744
12489 GIM_Try, /*On fail goto*//*Label 915*/ GIMT_Encode4(31794), // Rule ID 3201 //
12490 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
12491 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dpps),
12492 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12493 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12494 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12495 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12496 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12497 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12498 // MIs[0] src3
12499 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12500 // (intrinsic_wo_chain:{ *:[v4f32] } 13674:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3)
12501 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VDPPSrri),
12502 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12503 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12504 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12505 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12506 GIR_RootConstrainSelectedInstOperands,
12507 // GIR_Coverage, 3201,
12508 GIR_EraseRootFromParent_Done,
12509 // Label 915: @31794
12510 GIM_Try, /*On fail goto*//*Label 916*/ GIMT_Encode4(31844), // Rule ID 3203 //
12511 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
12512 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dppd),
12513 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12514 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12515 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12516 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12517 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12518 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12519 // MIs[0] src3
12520 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12521 // (intrinsic_wo_chain:{ *:[v2f64] } 13673:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3)
12522 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VDPPDrri),
12523 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12524 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12525 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12526 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12527 GIR_RootConstrainSelectedInstOperands,
12528 // GIR_Coverage, 3203,
12529 GIR_EraseRootFromParent_Done,
12530 // Label 916: @31844
12531 GIM_Try, /*On fail goto*//*Label 917*/ GIMT_Encode4(31894), // Rule ID 3205 //
12532 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
12533 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx_dp_ps_256),
12534 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
12535 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
12536 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
12537 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12538 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12539 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12540 // MIs[0] src3
12541 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12542 // (intrinsic_wo_chain:{ *:[v8f32] } 12534:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSYrri:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3)
12543 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VDPPSYrri),
12544 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12545 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12546 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12547 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12548 GIR_RootConstrainSelectedInstOperands,
12549 // GIR_Coverage, 3205,
12550 GIR_EraseRootFromParent_Done,
12551 // Label 917: @31894
12552 GIM_Try, /*On fail goto*//*Label 918*/ GIMT_Encode4(31944), // Rule ID 3207 //
12553 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2),
12554 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_mpsadbw),
12555 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16,
12556 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
12557 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s8,
12558 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12559 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12560 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12561 // MIs[0] src3
12562 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12563 // (intrinsic_wo_chain:{ *:[v16i16] } 12603:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (timm:{ *:[i8] }):$src3) => (VMPSADBWYrri:{ *:[v16i16] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (timm:{ *:[i8] }):$src3)
12564 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMPSADBWYrri),
12565 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12566 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12567 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12568 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12569 GIR_RootConstrainSelectedInstOperands,
12570 // GIR_Coverage, 3207,
12571 GIR_EraseRootFromParent_Done,
12572 // Label 918: @31944
12573 GIM_Try, /*On fail goto*//*Label 919*/ GIMT_Encode4(31994), // Rule ID 3209 //
12574 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
12575 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_mpsadbw),
12576 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
12577 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
12578 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
12579 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12580 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12581 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12582 // MIs[0] src3
12583 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12584 // (intrinsic_wo_chain:{ *:[v8i16] } 13676:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) => (MPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3)
12585 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MPSADBWrri),
12586 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12587 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12588 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12589 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12590 GIR_RootConstrainSelectedInstOperands,
12591 // GIR_Coverage, 3209,
12592 GIR_EraseRootFromParent_Done,
12593 // Label 919: @31994
12594 GIM_Try, /*On fail goto*//*Label 920*/ GIMT_Encode4(32044), // Rule ID 3211 //
12595 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
12596 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dpps),
12597 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12598 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12599 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12600 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12601 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12602 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12603 // MIs[0] src3
12604 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12605 // (intrinsic_wo_chain:{ *:[v4f32] } 13674:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3)
12606 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DPPSrri),
12607 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12608 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12609 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12610 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12611 GIR_RootConstrainSelectedInstOperands,
12612 // GIR_Coverage, 3211,
12613 GIR_EraseRootFromParent_Done,
12614 // Label 920: @32044
12615 GIM_Try, /*On fail goto*//*Label 921*/ GIMT_Encode4(32094), // Rule ID 3213 //
12616 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
12617 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dppd),
12618 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12619 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12620 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12621 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12622 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12623 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12624 // MIs[0] src3
12625 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12626 // (intrinsic_wo_chain:{ *:[v2f64] } 13673:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3)
12627 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DPPDrri),
12628 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12629 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12630 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12631 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12632 GIR_RootConstrainSelectedInstOperands,
12633 // GIR_Coverage, 3213,
12634 GIR_EraseRootFromParent_Done,
12635 // Label 921: @32094
12636 GIM_Try, /*On fail goto*//*Label 922*/ GIMT_Encode4(32144), // Rule ID 3273 //
12637 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA),
12638 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1rnds4),
12639 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12640 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12641 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12642 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12643 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12644 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12645 // MIs[0] src3
12646 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12647 // (intrinsic_wo_chain:{ *:[v4i32] } 13560:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3) => (SHA1RNDS4rri:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3)
12648 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1RNDS4rri),
12649 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12650 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12651 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12652 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12653 GIR_RootConstrainSelectedInstOperands,
12654 // GIR_Coverage, 3273,
12655 GIR_EraseRootFromParent_Done,
12656 // Label 922: @32144
12657 GIM_Try, /*On fail goto*//*Label 923*/ GIMT_Encode4(32194), // Rule ID 3319 //
12658 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasPCLMUL_NoAVX),
12659 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq),
12660 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12661 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12662 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12663 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12664 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12665 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12666 // MIs[0] src3
12667 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12668 // (intrinsic_wo_chain:{ *:[v2i64] } 13526:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (PCLMULQDQrri:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3)
12669 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PCLMULQDQrri),
12670 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12671 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12672 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12673 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12674 GIR_RootConstrainSelectedInstOperands,
12675 // GIR_Coverage, 3319,
12676 GIR_EraseRootFromParent_Done,
12677 // Label 923: @32194
12678 GIM_Try, /*On fail goto*//*Label 924*/ GIMT_Encode4(32244), // Rule ID 3321 //
12679 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ),
12680 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq),
12681 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12682 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12683 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12684 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12685 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12686 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12687 // MIs[0] src3
12688 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12689 // (intrinsic_wo_chain:{ *:[v2i64] } 13526:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQrri:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3)
12690 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQrri),
12691 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12692 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12693 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12694 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12695 GIR_RootConstrainSelectedInstOperands,
12696 // GIR_Coverage, 3321,
12697 GIR_EraseRootFromParent_Done,
12698 // Label 924: @32244
12699 GIM_Try, /*On fail goto*//*Label 925*/ GIMT_Encode4(32294), // Rule ID 3323 //
12700 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVPCLMULQDQ_NoVLX),
12701 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq_256),
12702 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12703 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12704 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12705 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12706 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12707 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
12708 // MIs[0] src3
12709 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12710 // (intrinsic_wo_chain:{ *:[v4i64] } 13527:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQYrri:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3)
12711 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQYrri),
12712 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12713 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12714 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12715 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12716 GIR_RootConstrainSelectedInstOperands,
12717 // GIR_Coverage, 3323,
12718 GIR_EraseRootFromParent_Done,
12719 // Label 925: @32294
12720 GIM_Try, /*On fail goto*//*Label 926*/ GIMT_Encode4(32344), // Rule ID 13970 //
12721 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVPCLMULQDQ),
12722 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq_512),
12723 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64,
12724 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
12725 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
12726 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12727 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12728 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
12729 // MIs[0] src3
12730 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12731 // (intrinsic_wo_chain:{ *:[v8i64] } 13528:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZrri:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3)
12732 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQZrri),
12733 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12734 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12735 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12736 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12737 GIR_RootConstrainSelectedInstOperands,
12738 // GIR_Coverage, 13970,
12739 GIR_EraseRootFromParent_Done,
12740 // Label 926: @32344
12741 GIM_Try, /*On fail goto*//*Label 927*/ GIMT_Encode4(32394), // Rule ID 13972 //
12742 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPCLMULQDQ),
12743 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq),
12744 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12745 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12746 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12747 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12748 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12749 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
12750 // MIs[0] src3
12751 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12752 // (intrinsic_wo_chain:{ *:[v2i64] } 13526:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ128rri:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3)
12753 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQZ128rri),
12754 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12755 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12756 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12757 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12758 GIR_RootConstrainSelectedInstOperands,
12759 // GIR_Coverage, 13972,
12760 GIR_EraseRootFromParent_Done,
12761 // Label 927: @32394
12762 GIM_Try, /*On fail goto*//*Label 928*/ GIMT_Encode4(32444), // Rule ID 13974 //
12763 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPCLMULQDQ),
12764 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq_256),
12765 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
12766 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
12767 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
12768 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12769 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12770 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
12771 // MIs[0] src3
12772 GIM_CheckIsImm, /*MI*/0, /*Op*/4,
12773 // (intrinsic_wo_chain:{ *:[v4i64] } 13527:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ256rri:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3)
12774 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQZ256rri),
12775 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12776 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12777 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12778 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12779 GIR_RootConstrainSelectedInstOperands,
12780 // GIR_Coverage, 13974,
12781 GIR_EraseRootFromParent_Done,
12782 // Label 928: @32444
12783 GIM_Try, /*On fail goto*//*Label 929*/ GIMT_Encode4(32498), // Rule ID 1607 //
12784 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12785 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmadcswd),
12786 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12787 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12788 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12789 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
12790 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12791 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12792 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12793 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12794 // (intrinsic_wo_chain:{ *:[v4i32] } 13859:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
12795 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMADCSWDrr),
12796 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12797 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12798 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12799 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12800 GIR_RootConstrainSelectedInstOperands,
12801 // GIR_Coverage, 1607,
12802 GIR_EraseRootFromParent_Done,
12803 // Label 929: @32498
12804 GIM_Try, /*On fail goto*//*Label 930*/ GIMT_Encode4(32552), // Rule ID 1609 //
12805 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12806 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmadcsswd),
12807 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12808 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12809 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12810 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
12811 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12812 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12813 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12814 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12815 // (intrinsic_wo_chain:{ *:[v4i32] } 13858:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
12816 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMADCSSWDrr),
12817 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12818 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12819 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12820 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12821 GIR_RootConstrainSelectedInstOperands,
12822 // GIR_Coverage, 1609,
12823 GIR_EraseRootFromParent_Done,
12824 // Label 930: @32552
12825 GIM_Try, /*On fail goto*//*Label 931*/ GIMT_Encode4(32606), // Rule ID 1611 //
12826 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12827 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsww),
12828 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
12829 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12830 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12831 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
12832 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12833 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12834 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12835 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12836 // (intrinsic_wo_chain:{ *:[v8i16] } 13857:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
12837 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWWrr),
12838 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12839 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12840 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12841 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12842 GIR_RootConstrainSelectedInstOperands,
12843 // GIR_Coverage, 1611,
12844 GIR_EraseRootFromParent_Done,
12845 // Label 931: @32606
12846 GIM_Try, /*On fail goto*//*Label 932*/ GIMT_Encode4(32660), // Rule ID 1613 //
12847 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12848 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacswd),
12849 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12850 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12851 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12852 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
12853 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12854 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12855 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12856 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12857 // (intrinsic_wo_chain:{ *:[v4i32] } 13856:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
12858 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWDrr),
12859 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12860 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12861 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12862 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12863 GIR_RootConstrainSelectedInstOperands,
12864 // GIR_Coverage, 1613,
12865 GIR_EraseRootFromParent_Done,
12866 // Label 932: @32660
12867 GIM_Try, /*On fail goto*//*Label 933*/ GIMT_Encode4(32714), // Rule ID 1615 //
12868 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12869 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssww),
12870 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
12871 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12872 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12873 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
12874 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12875 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12876 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12877 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12878 // (intrinsic_wo_chain:{ *:[v8i16] } 13855:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
12879 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSWWrr),
12880 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12881 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12882 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12883 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12884 GIR_RootConstrainSelectedInstOperands,
12885 // GIR_Coverage, 1615,
12886 GIR_EraseRootFromParent_Done,
12887 // Label 933: @32714
12888 GIM_Try, /*On fail goto*//*Label 934*/ GIMT_Encode4(32768), // Rule ID 1617 //
12889 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12890 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsswd),
12891 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12892 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12893 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12894 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
12895 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12896 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12897 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12898 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12899 // (intrinsic_wo_chain:{ *:[v4i32] } 13854:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
12900 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSWDrr),
12901 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12902 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12903 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12904 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12905 GIR_RootConstrainSelectedInstOperands,
12906 // GIR_Coverage, 1617,
12907 GIR_EraseRootFromParent_Done,
12908 // Label 934: @32768
12909 GIM_Try, /*On fail goto*//*Label 935*/ GIMT_Encode4(32822), // Rule ID 1619 //
12910 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12911 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssdql),
12912 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12913 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12914 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12915 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
12916 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12917 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12918 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12919 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12920 // (intrinsic_wo_chain:{ *:[v2i64] } 13853:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
12921 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSDQLrr),
12922 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12923 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12924 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12925 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12926 GIR_RootConstrainSelectedInstOperands,
12927 // GIR_Coverage, 1619,
12928 GIR_EraseRootFromParent_Done,
12929 // Label 935: @32822
12930 GIM_Try, /*On fail goto*//*Label 936*/ GIMT_Encode4(32876), // Rule ID 1621 //
12931 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12932 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssdqh),
12933 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12934 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12935 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12936 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
12937 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12938 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12939 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12940 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12941 // (intrinsic_wo_chain:{ *:[v2i64] } 13852:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
12942 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSDQHrr),
12943 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12944 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12945 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12946 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12947 GIR_RootConstrainSelectedInstOperands,
12948 // GIR_Coverage, 1621,
12949 GIR_EraseRootFromParent_Done,
12950 // Label 936: @32876
12951 GIM_Try, /*On fail goto*//*Label 937*/ GIMT_Encode4(32930), // Rule ID 1623 //
12952 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12953 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssdd),
12954 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
12955 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12956 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12957 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
12958 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12959 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12960 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12961 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12962 // (intrinsic_wo_chain:{ *:[v4i32] } 13851:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
12963 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSDDrr),
12964 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12965 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12966 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12967 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12968 GIR_RootConstrainSelectedInstOperands,
12969 // GIR_Coverage, 1623,
12970 GIR_EraseRootFromParent_Done,
12971 // Label 937: @32930
12972 GIM_Try, /*On fail goto*//*Label 938*/ GIMT_Encode4(32984), // Rule ID 1625 //
12973 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12974 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsdql),
12975 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12976 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12977 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12978 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
12979 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12980 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12981 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12982 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
12983 // (intrinsic_wo_chain:{ *:[v2i64] } 13850:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
12984 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDQLrr),
12985 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12986 GIR_RootToRootCopy, /*OpIdx*/2, // src1
12987 GIR_RootToRootCopy, /*OpIdx*/3, // src2
12988 GIR_RootToRootCopy, /*OpIdx*/4, // src3
12989 GIR_RootConstrainSelectedInstOperands,
12990 // GIR_Coverage, 1625,
12991 GIR_EraseRootFromParent_Done,
12992 // Label 938: @32984
12993 GIM_Try, /*On fail goto*//*Label 939*/ GIMT_Encode4(33038), // Rule ID 1627 //
12994 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
12995 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsdqh),
12996 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
12997 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12998 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
12999 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
13000 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13001 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13002 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13003 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13004 // (intrinsic_wo_chain:{ *:[v2i64] } 13849:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
13005 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDQHrr),
13006 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13007 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13008 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13009 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13010 GIR_RootConstrainSelectedInstOperands,
13011 // GIR_Coverage, 1627,
13012 GIR_EraseRootFromParent_Done,
13013 // Label 939: @33038
13014 GIM_Try, /*On fail goto*//*Label 940*/ GIMT_Encode4(33092), // Rule ID 1629 //
13015 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
13016 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsdd),
13017 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13018 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13019 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13020 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13021 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13022 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13023 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13024 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13025 // (intrinsic_wo_chain:{ *:[v4i32] } 13848:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13026 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDDrr),
13027 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13028 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13029 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13030 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13031 GIR_RootConstrainSelectedInstOperands,
13032 // GIR_Coverage, 1629,
13033 GIR_EraseRootFromParent_Done,
13034 // Label 940: @33092
13035 GIM_Try, /*On fail goto*//*Label 941*/ GIMT_Encode4(33158), // Rule ID 3281 //
13036 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA),
13037 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha256rnds2),
13038 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13039 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13040 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13041 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13042 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13043 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13044 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13045 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13046 // (intrinsic_wo_chain:{ *:[v4i32] } 13563:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, XMM0:{ *:[v4i32] }) => (SHA256RNDS2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
13047 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
13048 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::XMM0), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
13049 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/4, // XMM0
13050 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA256RNDS2rr),
13051 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13052 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13053 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13054 GIR_RootConstrainSelectedInstOperands,
13055 // GIR_Coverage, 3281,
13056 GIR_EraseRootFromParent_Done,
13057 // Label 941: @33158
13058 GIM_Try, /*On fail goto*//*Label 942*/ GIMT_Encode4(33212), // Rule ID 3509 //
13059 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA512),
13060 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsha512rnds2),
13061 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64,
13062 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
13063 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
13064 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
13065 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13066 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13067 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13068 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13069 // (intrinsic_wo_chain:{ *:[v4i64] } 13800:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VSHA512RNDS2rr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, VR128:{ *:[v2i64] }:$src3)
13070 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSHA512RNDS2rr),
13071 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13072 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13073 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13074 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13075 GIR_RootConstrainSelectedInstOperands,
13076 // GIR_Coverage, 3509,
13077 GIR_EraseRootFromParent_Done,
13078 // Label 942: @33212
13079 GIM_Try, /*On fail goto*//*Label 943*/ GIMT_Encode4(33266), // Rule ID 3510 //
13080 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM3),
13081 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm3msg1),
13082 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13083 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13084 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13085 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13086 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13087 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13088 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13089 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13090 // (intrinsic_wo_chain:{ *:[v4i32] } 13801:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VSM3MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13091 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM3MSG1rr),
13092 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13093 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13094 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13095 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13096 GIR_RootConstrainSelectedInstOperands,
13097 // GIR_Coverage, 3510,
13098 GIR_EraseRootFromParent_Done,
13099 // Label 943: @33266
13100 GIM_Try, /*On fail goto*//*Label 944*/ GIMT_Encode4(33320), // Rule ID 3512 //
13101 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM3),
13102 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm3msg2),
13103 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13104 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13105 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13106 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13107 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13108 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13109 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13110 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13111 // (intrinsic_wo_chain:{ *:[v4i32] } 13802:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VSM3MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13112 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM3MSG2rr),
13113 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13114 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13115 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13116 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13117 GIR_RootConstrainSelectedInstOperands,
13118 // GIR_Coverage, 3512,
13119 GIR_EraseRootFromParent_Done,
13120 // Label 944: @33320
13121 GIM_Try, /*On fail goto*//*Label 945*/ GIMT_Encode4(33374), // Rule ID 3524 //
13122 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13123 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwsud_128),
13124 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13125 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13126 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13127 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13128 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13129 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13130 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13131 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13132 // (intrinsic_wo_chain:{ *:[v4i32] } 12668:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPDPWSUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13133 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWSUDrr),
13134 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13135 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13136 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13137 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13138 GIR_RootConstrainSelectedInstOperands,
13139 // GIR_Coverage, 3524,
13140 GIR_EraseRootFromParent_Done,
13141 // Label 945: @33374
13142 GIM_Try, /*On fail goto*//*Label 946*/ GIMT_Encode4(33428), // Rule ID 3526 //
13143 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13144 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwsud_256),
13145 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
13146 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
13147 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
13148 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s32,
13149 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13150 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13151 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13152 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13153 // (intrinsic_wo_chain:{ *:[v8i32] } 12669:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3) => (VPDPWSUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3)
13154 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWSUDYrr),
13155 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13156 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13157 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13158 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13159 GIR_RootConstrainSelectedInstOperands,
13160 // GIR_Coverage, 3526,
13161 GIR_EraseRootFromParent_Done,
13162 // Label 946: @33428
13163 GIM_Try, /*On fail goto*//*Label 947*/ GIMT_Encode4(33482), // Rule ID 3528 //
13164 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13165 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwsuds_128),
13166 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13167 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13168 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13169 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13170 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13171 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13172 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13173 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13174 // (intrinsic_wo_chain:{ *:[v4i32] } 12670:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPDPWSUDSrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13175 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWSUDSrr),
13176 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13177 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13178 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13179 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13180 GIR_RootConstrainSelectedInstOperands,
13181 // GIR_Coverage, 3528,
13182 GIR_EraseRootFromParent_Done,
13183 // Label 947: @33482
13184 GIM_Try, /*On fail goto*//*Label 948*/ GIMT_Encode4(33536), // Rule ID 3530 //
13185 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13186 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwsuds_256),
13187 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
13188 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
13189 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
13190 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s32,
13191 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13192 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13193 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13194 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13195 // (intrinsic_wo_chain:{ *:[v8i32] } 12671:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3) => (VPDPWSUDSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3)
13196 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWSUDSYrr),
13197 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13198 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13199 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13200 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13201 GIR_RootConstrainSelectedInstOperands,
13202 // GIR_Coverage, 3530,
13203 GIR_EraseRootFromParent_Done,
13204 // Label 948: @33536
13205 GIM_Try, /*On fail goto*//*Label 949*/ GIMT_Encode4(33590), // Rule ID 3532 //
13206 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13207 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwusd_128),
13208 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13209 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13210 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13211 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13212 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13213 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13214 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13215 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13216 // (intrinsic_wo_chain:{ *:[v4i32] } 12672:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPDPWUSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13217 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUSDrr),
13218 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13219 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13220 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13221 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13222 GIR_RootConstrainSelectedInstOperands,
13223 // GIR_Coverage, 3532,
13224 GIR_EraseRootFromParent_Done,
13225 // Label 949: @33590
13226 GIM_Try, /*On fail goto*//*Label 950*/ GIMT_Encode4(33644), // Rule ID 3534 //
13227 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13228 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwusd_256),
13229 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
13230 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
13231 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
13232 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s32,
13233 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13234 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13235 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13236 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13237 // (intrinsic_wo_chain:{ *:[v8i32] } 12673:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3) => (VPDPWUSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3)
13238 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUSDYrr),
13239 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13240 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13241 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13242 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13243 GIR_RootConstrainSelectedInstOperands,
13244 // GIR_Coverage, 3534,
13245 GIR_EraseRootFromParent_Done,
13246 // Label 950: @33644
13247 GIM_Try, /*On fail goto*//*Label 951*/ GIMT_Encode4(33698), // Rule ID 3536 //
13248 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13249 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwusds_128),
13250 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13251 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13252 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13253 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13254 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13255 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13256 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13257 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13258 // (intrinsic_wo_chain:{ *:[v4i32] } 12674:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPDPWUSDSrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13259 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUSDSrr),
13260 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13261 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13262 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13263 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13264 GIR_RootConstrainSelectedInstOperands,
13265 // GIR_Coverage, 3536,
13266 GIR_EraseRootFromParent_Done,
13267 // Label 951: @33698
13268 GIM_Try, /*On fail goto*//*Label 952*/ GIMT_Encode4(33752), // Rule ID 3538 //
13269 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13270 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwusds_256),
13271 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
13272 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
13273 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
13274 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s32,
13275 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13276 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13277 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13278 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13279 // (intrinsic_wo_chain:{ *:[v8i32] } 12675:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3) => (VPDPWUSDSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3)
13280 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUSDSYrr),
13281 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13282 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13283 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13284 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13285 GIR_RootConstrainSelectedInstOperands,
13286 // GIR_Coverage, 3538,
13287 GIR_EraseRootFromParent_Done,
13288 // Label 952: @33752
13289 GIM_Try, /*On fail goto*//*Label 953*/ GIMT_Encode4(33806), // Rule ID 3540 //
13290 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13291 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwuud_128),
13292 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13293 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13294 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13295 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13296 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13297 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13298 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13299 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13300 // (intrinsic_wo_chain:{ *:[v4i32] } 12676:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPDPWUUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13301 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUUDrr),
13302 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13303 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13304 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13305 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13306 GIR_RootConstrainSelectedInstOperands,
13307 // GIR_Coverage, 3540,
13308 GIR_EraseRootFromParent_Done,
13309 // Label 953: @33806
13310 GIM_Try, /*On fail goto*//*Label 954*/ GIMT_Encode4(33860), // Rule ID 3542 //
13311 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13312 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwuud_256),
13313 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
13314 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
13315 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
13316 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s32,
13317 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13318 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13319 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13320 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13321 // (intrinsic_wo_chain:{ *:[v8i32] } 12677:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3) => (VPDPWUUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3)
13322 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUUDYrr),
13323 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13324 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13325 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13326 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13327 GIR_RootConstrainSelectedInstOperands,
13328 // GIR_Coverage, 3542,
13329 GIR_EraseRootFromParent_Done,
13330 // Label 954: @33860
13331 GIM_Try, /*On fail goto*//*Label 955*/ GIMT_Encode4(33914), // Rule ID 3544 //
13332 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13333 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwuuds_128),
13334 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13335 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13336 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13337 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13338 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13339 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13340 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13341 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13342 // (intrinsic_wo_chain:{ *:[v4i32] } 12678:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPDPWUUDSrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
13343 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUUDSrr),
13344 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13345 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13346 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13347 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13348 GIR_RootConstrainSelectedInstOperands,
13349 // GIR_Coverage, 3544,
13350 GIR_EraseRootFromParent_Done,
13351 // Label 955: @33914
13352 GIM_Try, /*On fail goto*//*Label 956*/ GIMT_Encode4(33968), // Rule ID 3546 //
13353 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXVNNIINT16),
13354 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_vpdpwuuds_256),
13355 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32,
13356 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
13357 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
13358 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s32,
13359 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13360 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13361 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13362 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
13363 // (intrinsic_wo_chain:{ *:[v8i32] } 12679:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3) => (VPDPWUUDSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2, VR256:{ *:[v8i32] }:$src3)
13364 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPDPWUUDSYrr),
13365 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13366 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13367 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13368 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13369 GIR_RootConstrainSelectedInstOperands,
13370 // GIR_Coverage, 3546,
13371 GIR_EraseRootFromParent_Done,
13372 // Label 956: @33968
13373 GIM_Reject,
13374 // Label 913: @33969
13375 GIM_Try, /*On fail goto*//*Label 957*/ GIMT_Encode4(34031), // Rule ID 3514 //
13376 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM3),
13377 GIM_CheckNumOperands, /*MI*/0, /*Expected*/6,
13378 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm3rnds2),
13379 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
13380 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13381 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
13382 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
13383 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13384 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13385 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13386 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
13387 // MIs[0] src4
13388 GIM_CheckIsImm, /*MI*/0, /*Op*/5,
13389 // (intrinsic_wo_chain:{ *:[v4i32] } 13803:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3, (timm:{ *:[i32] }):$src4) => (VSM3RNDS2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3, (timm:{ *:[i32] }):$src4)
13390 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM3RNDS2rr),
13391 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13392 GIR_RootToRootCopy, /*OpIdx*/2, // src1
13393 GIR_RootToRootCopy, /*OpIdx*/3, // src2
13394 GIR_RootToRootCopy, /*OpIdx*/4, // src3
13395 GIR_RootToRootCopy, /*OpIdx*/5, // src4
13396 GIR_RootConstrainSelectedInstOperands,
13397 // GIR_Coverage, 3514,
13398 GIR_EraseRootFromParent_Done,
13399 // Label 957: @34031
13400 GIM_Reject,
13401 // Label 11: @34032
13402 GIM_Try, /*On fail goto*//*Label 958*/ GIMT_Encode4(34585),
13403 GIM_CheckNumOperands, /*MI*/0, /*Expected*/1,
13404 GIM_Try, /*On fail goto*//*Label 959*/ GIMT_Encode4(34062), // Rule ID 149 //
13405 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSERIALIZE),
13406 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_serialize),
13407 // (intrinsic_void 13555:{ *:[iPTR] }) => (SERIALIZE)
13408 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SERIALIZE),
13409 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13410 GIR_RootConstrainSelectedInstOperands,
13411 // GIR_Coverage, 149,
13412 GIR_EraseRootFromParent_Done,
13413 // Label 959: @34062
13414 GIM_Try, /*On fail goto*//*Label 960*/ GIMT_Encode4(34084), // Rule ID 150 //
13415 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTSXLDTRK),
13416 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_xsusldtrk),
13417 // (intrinsic_void 13883:{ *:[iPTR] }) => (XSUSLDTRK)
13418 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XSUSLDTRK),
13419 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13420 GIR_RootConstrainSelectedInstOperands,
13421 // GIR_Coverage, 150,
13422 GIR_EraseRootFromParent_Done,
13423 // Label 960: @34084
13424 GIM_Try, /*On fail goto*//*Label 961*/ GIMT_Encode4(34106), // Rule ID 151 //
13425 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTSXLDTRK),
13426 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_xresldtrk),
13427 // (intrinsic_void 13869:{ *:[iPTR] }) => (XRESLDTRK)
13428 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XRESLDTRK),
13429 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13430 GIR_RootConstrainSelectedInstOperands,
13431 // GIR_Coverage, 151,
13432 GIR_EraseRootFromParent_Done,
13433 // Label 961: @34106
13434 GIM_Try, /*On fail goto*//*Label 962*/ GIMT_Encode4(34128), // Rule ID 152 //
13435 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasUINTR_In64BitMode),
13436 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_clui),
13437 // (intrinsic_void 13418:{ *:[iPTR] }) => (CLUI)
13438 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CLUI),
13439 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13440 GIR_RootConstrainSelectedInstOperands,
13441 // GIR_Coverage, 152,
13442 GIR_EraseRootFromParent_Done,
13443 // Label 962: @34128
13444 GIM_Try, /*On fail goto*//*Label 963*/ GIMT_Encode4(34150), // Rule ID 153 //
13445 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasUINTR_In64BitMode),
13446 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_stui),
13447 // (intrinsic_void 13737:{ *:[iPTR] }) => (STUI)
13448 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::STUI),
13449 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13450 GIR_RootConstrainSelectedInstOperands,
13451 // GIR_Coverage, 153,
13452 GIR_EraseRootFromParent_Done,
13453 // Label 963: @34150
13454 GIM_Try, /*On fail goto*//*Label 964*/ GIMT_Encode4(34169), // Rule ID 2458 //
13455 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse2_pause),
13456 // (intrinsic_void 13632:{ *:[iPTR] }) => (PAUSE)
13457 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PAUSE),
13458 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13459 GIR_RootConstrainSelectedInstOperands,
13460 // GIR_Coverage, 2458,
13461 GIR_EraseRootFromParent_Done,
13462 // Label 964: @34169
13463 GIM_Try, /*On fail goto*//*Label 965*/ GIMT_Encode4(34191), // Rule ID 2459 //
13464 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSSE1),
13465 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse_sfence),
13466 // (intrinsic_void 13594:{ *:[iPTR] }) => (SFENCE)
13467 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SFENCE),
13468 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13469 GIR_RootConstrainSelectedInstOperands,
13470 // GIR_Coverage, 2459,
13471 GIR_EraseRootFromParent_Done,
13472 // Label 965: @34191
13473 GIM_Try, /*On fail goto*//*Label 966*/ GIMT_Encode4(34213), // Rule ID 2460 //
13474 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSSE2),
13475 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse2_lfence),
13476 // (intrinsic_void 13621:{ *:[iPTR] }) => (LFENCE)
13477 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LFENCE),
13478 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13479 GIR_RootConstrainSelectedInstOperands,
13480 // GIR_Coverage, 2460,
13481 GIR_EraseRootFromParent_Done,
13482 // Label 966: @34213
13483 GIM_Try, /*On fail goto*//*Label 967*/ GIMT_Encode4(34235), // Rule ID 2461 //
13484 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasMFence),
13485 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse2_mfence),
13486 // (intrinsic_void 13625:{ *:[iPTR] }) => (MFENCE)
13487 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MFENCE),
13488 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13489 GIR_RootConstrainSelectedInstOperands,
13490 // GIR_Coverage, 2461,
13491 GIR_EraseRootFromParent_Done,
13492 // Label 967: @34235
13493 GIM_Try, /*On fail goto*//*Label 968*/ GIMT_Encode4(34301), // Rule ID 3375 //
13494 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
13495 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_avx_vzeroall),
13496 // (intrinsic_void 12577:{ *:[iPTR] }) => (VZEROALL)
13497 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VZEROALL),
13498 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM0*/0,
13499 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM1*/1,
13500 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM2*/2,
13501 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM3*/3,
13502 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM4*/4,
13503 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM5*/5,
13504 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM6*/6,
13505 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM7*/7,
13506 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM8*/8,
13507 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM9*/9,
13508 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM10*/10,
13509 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM11*/11,
13510 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM12*/12,
13511 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM13*/13,
13512 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM14*/14,
13513 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM15*/15,
13514 GIR_RootConstrainSelectedInstOperands,
13515 // GIR_Coverage, 3375,
13516 GIR_EraseRootFromParent_Done,
13517 // Label 968: @34301
13518 GIM_Try, /*On fail goto*//*Label 969*/ GIMT_Encode4(34367), // Rule ID 3376 //
13519 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
13520 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_avx_vzeroupper),
13521 // (intrinsic_void 12578:{ *:[iPTR] }) => (VZEROUPPER)
13522 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VZEROUPPER),
13523 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM0*/0,
13524 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM1*/1,
13525 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM2*/2,
13526 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM3*/3,
13527 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM4*/4,
13528 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM5*/5,
13529 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM6*/6,
13530 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM7*/7,
13531 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM8*/8,
13532 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM9*/9,
13533 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM10*/10,
13534 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM11*/11,
13535 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM12*/12,
13536 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM13*/13,
13537 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM14*/14,
13538 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::YMM15*/15,
13539 GIR_RootConstrainSelectedInstOperands,
13540 // GIR_Coverage, 3376,
13541 GIR_EraseRootFromParent_Done,
13542 // Label 969: @34367
13543 GIM_Try, /*On fail goto*//*Label 970*/ GIMT_Encode4(34437), // Rule ID 15346 //
13544 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasMMX),
13545 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_mmx_emms),
13546 // (intrinsic_void 13453:{ *:[iPTR] }) => (MMX_EMMS:{ *:[x86mmx] })
13547 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MMX_EMMS),
13548 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM0*/0,
13549 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM1*/1,
13550 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM2*/2,
13551 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM3*/3,
13552 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM4*/4,
13553 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM5*/5,
13554 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM6*/6,
13555 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::MM7*/7,
13556 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST0*/8,
13557 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST1*/9,
13558 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST2*/10,
13559 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST3*/11,
13560 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST4*/12,
13561 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST5*/13,
13562 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST6*/14,
13563 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ST7*/15,
13564 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13565 GIR_RootConstrainSelectedInstOperands,
13566 // GIR_Coverage, 15346,
13567 GIR_EraseRootFromParent_Done,
13568 // Label 970: @34437
13569 GIM_Try, /*On fail goto*//*Label 971*/ GIMT_Encode4(34459), // Rule ID 15529 //
13570 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRTM),
13571 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_xend),
13572 // (intrinsic_void 13821:{ *:[iPTR] }) => (XEND)
13573 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XEND),
13574 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13575 GIR_RootConstrainSelectedInstOperands,
13576 // GIR_Coverage, 15529,
13577 GIR_EraseRootFromParent_Done,
13578 // Label 971: @34459
13579 GIM_Try, /*On fail goto*//*Label 972*/ GIMT_Encode4(34505), // Rule ID 15541 //
13580 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXTILE_In64BitMode),
13581 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tilerelease),
13582 // (intrinsic_void 13763:{ *:[iPTR] }) => (TILERELEASE:{ *:[x86amx] })
13583 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TILERELEASE),
13584 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM0*/0,
13585 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM1*/1,
13586 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM2*/2,
13587 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM3*/3,
13588 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM4*/4,
13589 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM5*/5,
13590 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM6*/6,
13591 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::TMM7*/7,
13592 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13593 GIR_RootConstrainSelectedInstOperands,
13594 // GIR_Coverage, 15541,
13595 GIR_EraseRootFromParent_Done,
13596 // Label 972: @34505
13597 GIM_Try, /*On fail goto*//*Label 973*/ GIMT_Encode4(34524), // Rule ID 15588 //
13598 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_wbinvd),
13599 // (intrinsic_void 13808:{ *:[iPTR] }) => (WBINVD)
13600 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WBINVD),
13601 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13602 GIR_RootConstrainSelectedInstOperands,
13603 // GIR_Coverage, 15588,
13604 GIR_EraseRootFromParent_Done,
13605 // Label 973: @34524
13606 GIM_Try, /*On fail goto*//*Label 974*/ GIMT_Encode4(34546), // Rule ID 15589 //
13607 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasWBNOINVD),
13608 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_wbnoinvd),
13609 // (intrinsic_void 13809:{ *:[iPTR] }) => (WBNOINVD)
13610 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WBNOINVD),
13611 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13612 GIR_RootConstrainSelectedInstOperands,
13613 // GIR_Coverage, 15589,
13614 GIR_EraseRootFromParent_Done,
13615 // Label 974: @34546
13616 GIM_Try, /*On fail goto*//*Label 975*/ GIMT_Encode4(34565), // Rule ID 15594 //
13617 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_saveprevssp),
13618 // (intrinsic_void 13550:{ *:[iPTR] }) => (SAVEPREVSSP)
13619 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAVEPREVSSP),
13620 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13621 GIR_RootConstrainSelectedInstOperands,
13622 // GIR_Coverage, 15594,
13623 GIR_EraseRootFromParent_Done,
13624 // Label 975: @34565
13625 GIM_Try, /*On fail goto*//*Label 976*/ GIMT_Encode4(34584), // Rule ID 15604 //
13626 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_setssbsy),
13627 // (intrinsic_void 13556:{ *:[iPTR] }) => (SETSSBSY)
13628 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SETSSBSY),
13629 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13630 GIR_RootConstrainSelectedInstOperands,
13631 // GIR_Coverage, 15604,
13632 GIR_EraseRootFromParent_Done,
13633 // Label 976: @34584
13634 GIM_Reject,
13635 // Label 958: @34585
13636 GIM_Try, /*On fail goto*//*Label 977*/ GIMT_Encode4(35579),
13637 GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
13638 GIM_Try, /*On fail goto*//*Label 978*/ GIMT_Encode4(34623), // Rule ID 15577 //
13639 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_int),
13640 // MIs[0] Operand 1
13641 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(3),
13642 // (intrinsic_void 13443:{ *:[iPTR] }, 3:{ *:[i8] }) => (INT3)
13643 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INT3),
13644 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13645 GIR_RootConstrainSelectedInstOperands,
13646 // GIR_Coverage, 15577,
13647 GIR_EraseRootFromParent_Done,
13648 // Label 978: @34623
13649 GIM_Try, /*On fail goto*//*Label 979*/ GIMT_Encode4(34650), // Rule ID 15531 //
13650 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRTM),
13651 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_xabort),
13652 // MIs[0] imm
13653 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
13654 // (intrinsic_void 13819:{ *:[iPTR] }, (timm:{ *:[i8] }):$imm) => (XABORT (timm:{ *:[i8] }):$imm)
13655 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XABORT),
13656 GIR_RootToRootCopy, /*OpIdx*/1, // imm
13657 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13658 GIR_RootConstrainSelectedInstOperands,
13659 // GIR_Coverage, 15531,
13660 GIR_EraseRootFromParent_Done,
13661 // Label 979: @34650
13662 GIM_Try, /*On fail goto*//*Label 980*/ GIMT_Encode4(34677), // Rule ID 15543 //
13663 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXTILE_In64BitMode),
13664 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tilezero),
13665 // MIs[0] src
13666 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
13667 // (intrinsic_void 13766:{ *:[iPTR] }, (timm:{ *:[i8] }):$src) => (PTILEZERO (timm:{ *:[i8] }):$src)
13668 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTILEZERO),
13669 GIR_RootToRootCopy, /*OpIdx*/1, // src
13670 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13671 GIR_RootConstrainSelectedInstOperands,
13672 // GIR_Coverage, 15543,
13673 GIR_EraseRootFromParent_Done,
13674 // Label 980: @34677
13675 GIM_Try, /*On fail goto*//*Label 981*/ GIMT_Encode4(34701), // Rule ID 15579 //
13676 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_int),
13677 // MIs[0] trap
13678 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
13679 // (intrinsic_void 13443:{ *:[iPTR] }, (timm:{ *:[i8] }):$trap) => (INT (timm:{ *:[i8] }):$trap)
13680 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INT),
13681 GIR_RootToRootCopy, /*OpIdx*/1, // trap
13682 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13683 GIR_RootConstrainSelectedInstOperands,
13684 // GIR_Coverage, 15579,
13685 GIR_EraseRootFromParent_Done,
13686 // Label 981: @34701
13687 GIM_Try, /*On fail goto*//*Label 982*/ GIMT_Encode4(34732), // Rule ID 1 //
13688 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode),
13689 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_flags_read_u32),
13690 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
13691 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13692 // (intrinsic_w_chain:{ *:[i32] } 13429:{ *:[iPTR] }) => (RDFLAGS32:{ *:[i32] }:{ *:[i32] })
13693 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDFLAGS32),
13694 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13695 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13696 GIR_RootConstrainSelectedInstOperands,
13697 // GIR_Coverage, 1,
13698 GIR_EraseRootFromParent_Done,
13699 // Label 982: @34732
13700 GIM_Try, /*On fail goto*//*Label 983*/ GIMT_Encode4(34766), // Rule ID 2 //
13701 GIM_CheckFeatures, GIMT_Encode2(GIFBS_In64BitMode),
13702 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_flags_read_u64),
13703 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
13704 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13705 // (intrinsic_w_chain:{ *:[i64] } 13430:{ *:[iPTR] }) => (RDFLAGS64:{ *:[i64] }:{ *:[i32] })
13706 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDFLAGS64),
13707 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13708 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::ESP*/0,
13709 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13710 GIR_RootConstrainSelectedInstOperands,
13711 // GIR_Coverage, 2,
13712 GIR_EraseRootFromParent_Done,
13713 // Label 983: @34766
13714 GIM_Try, /*On fail goto*//*Label 984*/ GIMT_Encode4(34797), // Rule ID 115 //
13715 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasLWP),
13716 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_slwpcb),
13717 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
13718 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13719 // (intrinsic_w_chain:{ *:[i32] } 13564:{ *:[iPTR] }) => (SLWPCB:{ *:[i32] })
13720 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SLWPCB),
13721 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13722 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13723 GIR_RootConstrainSelectedInstOperands,
13724 // GIR_Coverage, 115,
13725 GIR_EraseRootFromParent_Done,
13726 // Label 984: @34797
13727 GIM_Try, /*On fail goto*//*Label 985*/ GIMT_Encode4(34828), // Rule ID 117 //
13728 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasLWP),
13729 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_slwpcb),
13730 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
13731 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13732 // (intrinsic_w_chain:{ *:[i64] } 13564:{ *:[iPTR] }) => (SLWPCB64:{ *:[i64] })
13733 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SLWPCB64),
13734 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13735 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13736 GIR_RootConstrainSelectedInstOperands,
13737 // GIR_Coverage, 117,
13738 GIR_EraseRootFromParent_Done,
13739 // Label 985: @34828
13740 GIM_Try, /*On fail goto*//*Label 986*/ GIMT_Encode4(34859), // Rule ID 15528 //
13741 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRTM),
13742 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xbegin),
13743 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
13744 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13745 // (intrinsic_w_chain:{ *:[i32] } 13820:{ *:[iPTR] }) => (XBEGIN:{ *:[i32] })
13746 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XBEGIN),
13747 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13748 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13749 GIR_RootConstrainSelectedInstOperands,
13750 // GIR_Coverage, 15528,
13751 GIR_EraseRootFromParent_Done,
13752 // Label 986: @34859
13753 GIM_Try, /*On fail goto*//*Label 987*/ GIMT_Encode4(34890), // Rule ID 15621 //
13754 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13755 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdfsbase_32),
13756 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
13757 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13758 // (intrinsic_w_chain:{ *:[i32] } 13531:{ *:[iPTR] }) => (RDFSBASE:{ *:[i32] })
13759 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDFSBASE),
13760 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13761 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13762 GIR_RootConstrainSelectedInstOperands,
13763 // GIR_Coverage, 15621,
13764 GIR_EraseRootFromParent_Done,
13765 // Label 987: @34890
13766 GIM_Try, /*On fail goto*//*Label 988*/ GIMT_Encode4(34921), // Rule ID 15622 //
13767 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13768 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdfsbase_64),
13769 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
13770 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13771 // (intrinsic_w_chain:{ *:[i64] } 13532:{ *:[iPTR] }) => (RDFSBASE64:{ *:[i64] })
13772 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDFSBASE64),
13773 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13774 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13775 GIR_RootConstrainSelectedInstOperands,
13776 // GIR_Coverage, 15622,
13777 GIR_EraseRootFromParent_Done,
13778 // Label 988: @34921
13779 GIM_Try, /*On fail goto*//*Label 989*/ GIMT_Encode4(34952), // Rule ID 15623 //
13780 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13781 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdgsbase_32),
13782 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
13783 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13784 // (intrinsic_w_chain:{ *:[i32] } 13533:{ *:[iPTR] }) => (RDGSBASE:{ *:[i32] })
13785 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDGSBASE),
13786 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13787 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13788 GIR_RootConstrainSelectedInstOperands,
13789 // GIR_Coverage, 15623,
13790 GIR_EraseRootFromParent_Done,
13791 // Label 989: @34952
13792 GIM_Try, /*On fail goto*//*Label 990*/ GIMT_Encode4(34983), // Rule ID 15624 //
13793 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13794 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdgsbase_64),
13795 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
13796 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13797 // (intrinsic_w_chain:{ *:[i64] } 13534:{ *:[iPTR] }) => (RDGSBASE64:{ *:[i64] })
13798 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDGSBASE64),
13799 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13800 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13801 GIR_RootConstrainSelectedInstOperands,
13802 // GIR_Coverage, 15624,
13803 GIR_EraseRootFromParent_Done,
13804 // Label 990: @34983
13805 GIM_Try, /*On fail goto*//*Label 991*/ GIMT_Encode4(35014), // Rule ID 15630 //
13806 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRDPID_Not64BitMode),
13807 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdpid),
13808 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
13809 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13810 // (intrinsic_w_chain:{ *:[i32] } 13535:{ *:[iPTR] }) => (RDPID32:{ *:[i32] })
13811 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDPID32),
13812 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13813 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13814 GIR_RootConstrainSelectedInstOperands,
13815 // GIR_Coverage, 15630,
13816 GIR_EraseRootFromParent_Done,
13817 // Label 991: @35014
13818 GIM_Try, /*On fail goto*//*Label 992*/ GIMT_Encode4(35071), // Rule ID 20794 //
13819 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRDPID_In64BitMode),
13820 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdpid),
13821 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
13822 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13823 // (intrinsic_w_chain:{ *:[i32] } 13535:{ *:[iPTR] }) => (EXTRACT_SUBREG:{ *:[i32] } (RDPID64:{ *:[i64] }), sub_32bit:{ *:[i32] })
13824 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13825 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::RDPID64),
13826 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
13827 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13828 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
13829 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13830 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_32bit),
13831 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR32RegClassID),
13832 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
13833 // GIR_Coverage, 20794,
13834 GIR_EraseRootFromParent_Done,
13835 // Label 992: @35071
13836 GIM_Try, /*On fail goto*//*Label 993*/ GIMT_Encode4(35108), // Rule ID 3 //
13837 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode),
13838 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_flags_write_u32),
13839 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13840 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13841 // (intrinsic_void 13431:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFLAGS32:{ *:[i32] } GR32:{ *:[i32] }:$src)
13842 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WRFLAGS32),
13843 GIR_RootToRootCopy, /*OpIdx*/1, // src
13844 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/1,
13845 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::DF*/2,
13846 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13847 GIR_RootConstrainSelectedInstOperands,
13848 // GIR_Coverage, 3,
13849 GIR_EraseRootFromParent_Done,
13850 // Label 993: @35108
13851 GIM_Try, /*On fail goto*//*Label 994*/ GIMT_Encode4(35145), // Rule ID 4 //
13852 GIM_CheckFeatures, GIMT_Encode2(GIFBS_In64BitMode),
13853 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_flags_write_u64),
13854 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13855 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13856 // (intrinsic_void 13432:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFLAGS64:{ *:[i64] } GR64:{ *:[i64] }:$src)
13857 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WRFLAGS64),
13858 GIR_RootToRootCopy, /*OpIdx*/1, // src
13859 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/1,
13860 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::DF*/2,
13861 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13862 GIR_RootConstrainSelectedInstOperands,
13863 // GIR_Coverage, 4,
13864 GIR_EraseRootFromParent_Done,
13865 // Label 994: @35145
13866 GIM_Try, /*On fail goto*//*Label 995*/ GIMT_Encode4(35176), // Rule ID 154 //
13867 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasUINTR_In64BitMode),
13868 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_senduipi),
13869 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13870 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13871 // (intrinsic_void 13554:{ *:[iPTR] }, GR64:{ *:[i64] }:$arg) => (SENDUIPI GR64:{ *:[i64] }:$arg)
13872 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SENDUIPI),
13873 GIR_RootToRootCopy, /*OpIdx*/1, // arg
13874 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13875 GIR_RootConstrainSelectedInstOperands,
13876 // GIR_Coverage, 154,
13877 GIR_EraseRootFromParent_Done,
13878 // Label 995: @35176
13879 GIM_Try, /*On fail goto*//*Label 996*/ GIMT_Encode4(35204), // Rule ID 15590 //
13880 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_incsspd),
13881 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13882 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13883 // (intrinsic_void 13441:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (INCSSPD GR32:{ *:[i32] }:$src)
13884 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INCSSPD),
13885 GIR_RootToRootCopy, /*OpIdx*/1, // src
13886 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13887 GIR_RootConstrainSelectedInstOperands,
13888 // GIR_Coverage, 15590,
13889 GIR_EraseRootFromParent_Done,
13890 // Label 996: @35204
13891 GIM_Try, /*On fail goto*//*Label 997*/ GIMT_Encode4(35232), // Rule ID 15591 //
13892 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_incsspq),
13893 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13894 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13895 // (intrinsic_void 13442:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (INCSSPQ GR64:{ *:[i64] }:$src)
13896 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INCSSPQ),
13897 GIR_RootToRootCopy, /*OpIdx*/1, // src
13898 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13899 GIR_RootConstrainSelectedInstOperands,
13900 // GIR_Coverage, 15591,
13901 GIR_EraseRootFromParent_Done,
13902 // Label 997: @35232
13903 GIM_Try, /*On fail goto*//*Label 998*/ GIMT_Encode4(35263), // Rule ID 15625 //
13904 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13905 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_wrfsbase_32),
13906 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13907 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13908 // (intrinsic_void 13810:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFSBASE GR32:{ *:[i32] }:$src)
13909 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WRFSBASE),
13910 GIR_RootToRootCopy, /*OpIdx*/1, // src
13911 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13912 GIR_RootConstrainSelectedInstOperands,
13913 // GIR_Coverage, 15625,
13914 GIR_EraseRootFromParent_Done,
13915 // Label 998: @35263
13916 GIM_Try, /*On fail goto*//*Label 999*/ GIMT_Encode4(35294), // Rule ID 15626 //
13917 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13918 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_wrfsbase_64),
13919 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13920 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13921 // (intrinsic_void 13811:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFSBASE64 GR64:{ *:[i64] }:$src)
13922 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WRFSBASE64),
13923 GIR_RootToRootCopy, /*OpIdx*/1, // src
13924 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13925 GIR_RootConstrainSelectedInstOperands,
13926 // GIR_Coverage, 15626,
13927 GIR_EraseRootFromParent_Done,
13928 // Label 999: @35294
13929 GIM_Try, /*On fail goto*//*Label 1000*/ GIMT_Encode4(35325), // Rule ID 15627 //
13930 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13931 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_wrgsbase_32),
13932 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13933 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13934 // (intrinsic_void 13812:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRGSBASE GR32:{ *:[i32] }:$src)
13935 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WRGSBASE),
13936 GIR_RootToRootCopy, /*OpIdx*/1, // src
13937 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13938 GIR_RootConstrainSelectedInstOperands,
13939 // GIR_Coverage, 15627,
13940 GIR_EraseRootFromParent_Done,
13941 // Label 1000: @35325
13942 GIM_Try, /*On fail goto*//*Label 1001*/ GIMT_Encode4(35356), // Rule ID 15628 //
13943 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFSGSBase_In64BitMode),
13944 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_wrgsbase_64),
13945 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13946 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13947 // (intrinsic_void 13813:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRGSBASE64 GR64:{ *:[i64] }:$src)
13948 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::WRGSBASE64),
13949 GIR_RootToRootCopy, /*OpIdx*/1, // src
13950 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13951 GIR_RootConstrainSelectedInstOperands,
13952 // GIR_Coverage, 15628,
13953 GIR_EraseRootFromParent_Done,
13954 // Label 1001: @35356
13955 GIM_Try, /*On fail goto*//*Label 1002*/ GIMT_Encode4(35387), // Rule ID 15633 //
13956 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasPTWRITE),
13957 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_ptwrite32),
13958 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13959 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13960 // (intrinsic_void 13529:{ *:[iPTR] }, GR32:{ *:[i32] }:$dst) => (PTWRITEr GR32:{ *:[i32] }:$dst)
13961 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTWRITEr),
13962 GIR_RootToRootCopy, /*OpIdx*/1, // dst
13963 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13964 GIR_RootConstrainSelectedInstOperands,
13965 // GIR_Coverage, 15633,
13966 GIR_EraseRootFromParent_Done,
13967 // Label 1002: @35387
13968 GIM_Try, /*On fail goto*//*Label 1003*/ GIMT_Encode4(35418), // Rule ID 15634 //
13969 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasPTWRITE_In64BitMode),
13970 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_ptwrite64),
13971 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13972 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
13973 // (intrinsic_void 13530:{ *:[iPTR] }, GR64:{ *:[i64] }:$dst) => (PTWRITE64r GR64:{ *:[i64] }:$dst)
13974 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTWRITE64r),
13975 GIR_RootToRootCopy, /*OpIdx*/1, // dst
13976 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13977 GIR_RootConstrainSelectedInstOperands,
13978 // GIR_Coverage, 15634,
13979 GIR_EraseRootFromParent_Done,
13980 // Label 1003: @35418
13981 GIM_Try, /*On fail goto*//*Label 1004*/ GIMT_Encode4(35450), // Rule ID 114 //
13982 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasLWP),
13983 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_llwpcb),
13984 // MIs[0] src
13985 GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
13986 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
13987 // (intrinsic_void 13447:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (LLWPCB GR32:{ *:[i32] }:$src)
13988 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LLWPCB),
13989 GIR_RootToRootCopy, /*OpIdx*/1, // src
13990 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
13991 GIR_RootConstrainSelectedInstOperands,
13992 // GIR_Coverage, 114,
13993 GIR_EraseRootFromParent_Done,
13994 // Label 1004: @35450
13995 GIM_Try, /*On fail goto*//*Label 1005*/ GIMT_Encode4(35482), // Rule ID 116 //
13996 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasLWP),
13997 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_llwpcb),
13998 // MIs[0] src
13999 GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
14000 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14001 // (intrinsic_void 13447:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (LLWPCB64 GR64:{ *:[i64] }:$src)
14002 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LLWPCB64),
14003 GIR_RootToRootCopy, /*OpIdx*/1, // src
14004 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14005 GIR_RootConstrainSelectedInstOperands,
14006 // GIR_Coverage, 116,
14007 GIR_EraseRootFromParent_Done,
14008 // Label 1005: @35482
14009 GIM_Try, /*On fail goto*//*Label 1006*/ GIMT_Encode4(35514), // Rule ID 126 //
14010 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasWAITPKG_Not64BitMode),
14011 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_umonitor),
14012 // MIs[0] src
14013 GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/16,
14014 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
14015 // (intrinsic_void 13769:{ *:[iPTR] }, GR16:{ *:[i16] }:$src) => (UMONITOR16 GR16:{ *:[i16] }:$src)
14016 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::UMONITOR16),
14017 GIR_RootToRootCopy, /*OpIdx*/1, // src
14018 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14019 GIR_RootConstrainSelectedInstOperands,
14020 // GIR_Coverage, 126,
14021 GIR_EraseRootFromParent_Done,
14022 // Label 1006: @35514
14023 GIM_Try, /*On fail goto*//*Label 1007*/ GIMT_Encode4(35546), // Rule ID 127 //
14024 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasWAITPKG),
14025 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_umonitor),
14026 // MIs[0] src
14027 GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
14028 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14029 // (intrinsic_void 13769:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (UMONITOR32 GR32:{ *:[i32] }:$src)
14030 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::UMONITOR32),
14031 GIR_RootToRootCopy, /*OpIdx*/1, // src
14032 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14033 GIR_RootConstrainSelectedInstOperands,
14034 // GIR_Coverage, 127,
14035 GIR_EraseRootFromParent_Done,
14036 // Label 1007: @35546
14037 GIM_Try, /*On fail goto*//*Label 1008*/ GIMT_Encode4(35578), // Rule ID 128 //
14038 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasWAITPKG_In64BitMode),
14039 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_umonitor),
14040 // MIs[0] src
14041 GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
14042 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14043 // (intrinsic_void 13769:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (UMONITOR64 GR64:{ *:[i64] }:$src)
14044 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::UMONITOR64),
14045 GIR_RootToRootCopy, /*OpIdx*/1, // src
14046 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14047 GIR_RootConstrainSelectedInstOperands,
14048 // GIR_Coverage, 128,
14049 GIR_EraseRootFromParent_Done,
14050 // Label 1008: @35578
14051 GIM_Reject,
14052 // Label 977: @35579
14053 GIM_Try, /*On fail goto*//*Label 1009*/ GIMT_Encode4(35929),
14054 GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
14055 GIM_Try, /*On fail goto*//*Label 1010*/ GIMT_Encode4(35630), // Rule ID 15654 //
14056 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::asan_check_memaccess),
14057 // MIs[0] addr
14058 GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
14059 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64PLTSafeRegClassID),
14060 // MIs[0] accessinfo
14061 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14062 // (intrinsic_void 9:{ *:[iPTR] }, GR64PLTSafe:{ *:[i64] }:$addr, (timm:{ *:[i32] }):$accessinfo) => (ASAN_CHECK_MEMACCESS:{ *:[i64] } GR64PLTSafe:{ *:[i64] }:$addr, (timm:{ *:[i32] }):$accessinfo)
14063 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ASAN_CHECK_MEMACCESS),
14064 GIR_RootToRootCopy, /*OpIdx*/1, // addr
14065 GIR_RootToRootCopy, /*OpIdx*/2, // accessinfo
14066 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::R10*/0,
14067 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::R11*/1,
14068 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/2,
14069 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14070 GIR_RootConstrainSelectedInstOperands,
14071 // GIR_Coverage, 15654,
14072 GIR_EraseRootFromParent_Done,
14073 // Label 1010: @35630
14074 GIM_Try, /*On fail goto*//*Label 1011*/ GIMT_Encode4(35670), // Rule ID 15580 //
14075 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasUSERMSR_NoEGPR),
14076 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_urdmsr),
14077 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
14078 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
14079 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14080 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14081 // (intrinsic_w_chain:{ *:[i64] } 13771:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (URDMSRrr:{ *:[i64] } GR64:{ *:[i64] }:$src)
14082 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::URDMSRrr),
14083 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14084 GIR_RootToRootCopy, /*OpIdx*/2, // src
14085 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14086 GIR_RootConstrainSelectedInstOperands,
14087 // GIR_Coverage, 15580,
14088 GIR_EraseRootFromParent_Done,
14089 // Label 1011: @35670
14090 GIM_Try, /*On fail goto*//*Label 1012*/ GIMT_Encode4(35710), // Rule ID 15584 //
14091 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasEGPR_HasUSERMSR_In64BitMode),
14092 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_urdmsr),
14093 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
14094 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
14095 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14096 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14097 // (intrinsic_w_chain:{ *:[i64] } 13771:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (URDMSRrr_EVEX:{ *:[i64] } GR64:{ *:[i64] }:$src)
14098 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::URDMSRrr_EVEX),
14099 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14100 GIR_RootToRootCopy, /*OpIdx*/2, // src
14101 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14102 GIR_RootConstrainSelectedInstOperands,
14103 // GIR_Coverage, 15584,
14104 GIR_EraseRootFromParent_Done,
14105 // Label 1012: @35710
14106 GIM_Try, /*On fail goto*//*Label 1013*/ GIMT_Encode4(35747), // Rule ID 15592 //
14107 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdsspd),
14108 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
14109 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
14110 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14111 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14112 // (intrinsic_w_chain:{ *:[i32] } 13545:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (RDSSPD:{ *:[i32] } GR32:{ *:[i32] }:$src)
14113 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDSSPD),
14114 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14115 GIR_RootToRootCopy, /*OpIdx*/2, // src
14116 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14117 GIR_RootConstrainSelectedInstOperands,
14118 // GIR_Coverage, 15592,
14119 GIR_EraseRootFromParent_Done,
14120 // Label 1013: @35747
14121 GIM_Try, /*On fail goto*//*Label 1014*/ GIMT_Encode4(35784), // Rule ID 15593 //
14122 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_rdsspq),
14123 GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
14124 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
14125 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14126 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14127 // (intrinsic_w_chain:{ *:[i64] } 13546:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (RDSSPQ:{ *:[i64] } GR64:{ *:[i64] }:$src)
14128 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RDSSPQ),
14129 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14130 GIR_RootToRootCopy, /*OpIdx*/2, // src
14131 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14132 GIR_RootConstrainSelectedInstOperands,
14133 // GIR_Coverage, 15593,
14134 GIR_EraseRootFromParent_Done,
14135 // Label 1014: @35784
14136 GIM_Try, /*On fail goto*//*Label 1015*/ GIMT_Encode4(35848), // Rule ID 3034 //
14137 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSSE3),
14138 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse3_mwait),
14139 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14140 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
14141 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32_ArgRef_and_GR32_CBRegClassID),
14142 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32_ADRegClassID),
14143 // (intrinsic_void 13670:{ *:[iPTR] }, ECX:{ *:[i32] }, EAX:{ *:[i32] }) => (MWAITrr)
14144 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14145 GIR_AddRegister, /*InsnID*/2, GIMT_Encode2(X86::EAX), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14146 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/2, // EAX
14147 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14148 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::ECX), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14149 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // ECX
14150 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MWAITrr),
14151 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14152 GIR_RootConstrainSelectedInstOperands,
14153 // GIR_Coverage, 3034,
14154 GIR_EraseRootFromParent_Done,
14155 // Label 1015: @35848
14156 GIM_Try, /*On fail goto*//*Label 1016*/ GIMT_Encode4(35888), // Rule ID 15582 //
14157 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasUSERMSR_NoEGPR),
14158 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_uwrmsr),
14159 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14160 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
14161 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14162 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14163 // (intrinsic_void 13772:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (UWRMSRrr GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
14164 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::UWRMSRrr),
14165 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14166 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14167 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14168 GIR_RootConstrainSelectedInstOperands,
14169 // GIR_Coverage, 15582,
14170 GIR_EraseRootFromParent_Done,
14171 // Label 1016: @35888
14172 GIM_Try, /*On fail goto*//*Label 1017*/ GIMT_Encode4(35928), // Rule ID 15586 //
14173 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasEGPR_HasUSERMSR_In64BitMode),
14174 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_uwrmsr),
14175 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14176 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
14177 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14178 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14179 // (intrinsic_void 13772:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (UWRMSRrr_EVEX GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
14180 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::UWRMSRrr_EVEX),
14181 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14182 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14183 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14184 GIR_RootConstrainSelectedInstOperands,
14185 // GIR_Coverage, 15586,
14186 GIR_EraseRootFromParent_Done,
14187 // Label 1017: @35928
14188 GIM_Reject,
14189 // Label 1009: @35929
14190 GIM_Try, /*On fail goto*//*Label 1018*/ GIMT_Encode4(36703),
14191 GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
14192 GIM_Try, /*On fail goto*//*Label 1019*/ GIMT_Encode4(35974), // Rule ID 15548 //
14193 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXINT8_In64BitMode),
14194 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tdpbssd),
14195 // MIs[0] src1
14196 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14197 // MIs[0] src2
14198 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14199 // MIs[0] src3
14200 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14201 // (intrinsic_void 13748:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBSSD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14202 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTDPBSSD),
14203 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14204 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14205 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14206 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14207 GIR_RootConstrainSelectedInstOperands,
14208 // GIR_Coverage, 15548,
14209 GIR_EraseRootFromParent_Done,
14210 // Label 1019: @35974
14211 GIM_Try, /*On fail goto*//*Label 1020*/ GIMT_Encode4(36011), // Rule ID 15549 //
14212 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXINT8_In64BitMode),
14213 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tdpbsud),
14214 // MIs[0] src1
14215 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14216 // MIs[0] src2
14217 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14218 // MIs[0] src3
14219 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14220 // (intrinsic_void 13750:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBSUD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14221 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTDPBSUD),
14222 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14223 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14224 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14225 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14226 GIR_RootConstrainSelectedInstOperands,
14227 // GIR_Coverage, 15549,
14228 GIR_EraseRootFromParent_Done,
14229 // Label 1020: @36011
14230 GIM_Try, /*On fail goto*//*Label 1021*/ GIMT_Encode4(36048), // Rule ID 15550 //
14231 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXINT8_In64BitMode),
14232 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tdpbusd),
14233 // MIs[0] src1
14234 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14235 // MIs[0] src2
14236 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14237 // MIs[0] src3
14238 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14239 // (intrinsic_void 13752:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBUSD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14240 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTDPBUSD),
14241 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14242 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14243 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14244 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14245 GIR_RootConstrainSelectedInstOperands,
14246 // GIR_Coverage, 15550,
14247 GIR_EraseRootFromParent_Done,
14248 // Label 1021: @36048
14249 GIM_Try, /*On fail goto*//*Label 1022*/ GIMT_Encode4(36085), // Rule ID 15551 //
14250 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXINT8_In64BitMode),
14251 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tdpbuud),
14252 // MIs[0] src1
14253 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14254 // MIs[0] src2
14255 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14256 // MIs[0] src3
14257 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14258 // (intrinsic_void 13754:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBUUD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14259 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTDPBUUD),
14260 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14261 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14262 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14263 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14264 GIR_RootConstrainSelectedInstOperands,
14265 // GIR_Coverage, 15551,
14266 GIR_EraseRootFromParent_Done,
14267 // Label 1022: @36085
14268 GIM_Try, /*On fail goto*//*Label 1023*/ GIMT_Encode4(36122), // Rule ID 15553 //
14269 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXBF16_In64BitMode),
14270 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tdpbf16ps),
14271 // MIs[0] src1
14272 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14273 // MIs[0] src2
14274 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14275 // MIs[0] src3
14276 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14277 // (intrinsic_void 13746:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBF16PS (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14278 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTDPBF16PS),
14279 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14280 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14281 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14282 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14283 GIR_RootConstrainSelectedInstOperands,
14284 // GIR_Coverage, 15553,
14285 GIR_EraseRootFromParent_Done,
14286 // Label 1023: @36122
14287 GIM_Try, /*On fail goto*//*Label 1024*/ GIMT_Encode4(36159), // Rule ID 15555 //
14288 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXFP16_In64BitMode),
14289 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tdpfp16ps),
14290 // MIs[0] src1
14291 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14292 // MIs[0] src2
14293 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14294 // MIs[0] src3
14295 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14296 // (intrinsic_void 13756:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPFP16PS (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14297 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTDPFP16PS),
14298 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14299 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14300 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14301 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14302 GIR_RootConstrainSelectedInstOperands,
14303 // GIR_Coverage, 15555,
14304 GIR_EraseRootFromParent_Done,
14305 // Label 1024: @36159
14306 GIM_Try, /*On fail goto*//*Label 1025*/ GIMT_Encode4(36196), // Rule ID 15558 //
14307 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXCOMPLEX_In64BitMode),
14308 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tcmmimfp16ps),
14309 // MIs[0] src1
14310 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14311 // MIs[0] src2
14312 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14313 // MIs[0] src3
14314 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14315 // (intrinsic_void 13742:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTCMMIMFP16PS (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14316 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTCMMIMFP16PS),
14317 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14318 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14319 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14320 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14321 GIR_RootConstrainSelectedInstOperands,
14322 // GIR_Coverage, 15558,
14323 GIR_EraseRootFromParent_Done,
14324 // Label 1025: @36196
14325 GIM_Try, /*On fail goto*//*Label 1026*/ GIMT_Encode4(36233), // Rule ID 15559 //
14326 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAMXCOMPLEX_In64BitMode),
14327 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_tcmmrlfp16ps),
14328 // MIs[0] src1
14329 GIM_CheckIsImm, /*MI*/0, /*Op*/1,
14330 // MIs[0] src2
14331 GIM_CheckIsImm, /*MI*/0, /*Op*/2,
14332 // MIs[0] src3
14333 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14334 // (intrinsic_void 13744:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTCMMRLFP16PS (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3)
14335 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PTCMMRLFP16PS),
14336 GIR_RootToRootCopy, /*OpIdx*/1, // src1
14337 GIR_RootToRootCopy, /*OpIdx*/2, // src2
14338 GIR_RootToRootCopy, /*OpIdx*/3, // src3
14339 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14340 GIR_RootConstrainSelectedInstOperands,
14341 // GIR_Coverage, 15559,
14342 GIR_EraseRootFromParent_Done,
14343 // Label 1026: @36233
14344 GIM_Try, /*On fail goto*//*Label 1027*/ GIMT_Encode4(36278), // Rule ID 122 //
14345 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasLWP),
14346 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_lwpval32),
14347 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14348 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
14349 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14350 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14351 // MIs[0] cntl
14352 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14353 // (intrinsic_void 13451:{ *:[iPTR] }, GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) => (LWPVAL32rri GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl)
14354 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LWPVAL32rri),
14355 GIR_RootToRootCopy, /*OpIdx*/1, // src0
14356 GIR_RootToRootCopy, /*OpIdx*/2, // src1
14357 GIR_RootToRootCopy, /*OpIdx*/3, // cntl
14358 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14359 GIR_RootConstrainSelectedInstOperands,
14360 // GIR_Coverage, 122,
14361 GIR_EraseRootFromParent_Done,
14362 // Label 1027: @36278
14363 GIM_Try, /*On fail goto*//*Label 1028*/ GIMT_Encode4(36323), // Rule ID 124 //
14364 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasLWP),
14365 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_lwpval64),
14366 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14367 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
14368 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14369 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14370 // MIs[0] cntl
14371 GIM_CheckIsImm, /*MI*/0, /*Op*/3,
14372 // (intrinsic_void 13452:{ *:[iPTR] }, GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) => (LWPVAL64rri GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl)
14373 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LWPVAL64rri),
14374 GIR_RootToRootCopy, /*OpIdx*/1, // src0
14375 GIR_RootToRootCopy, /*OpIdx*/2, // src1
14376 GIR_RootToRootCopy, /*OpIdx*/3, // cntl
14377 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14378 GIR_RootConstrainSelectedInstOperands,
14379 // GIR_Coverage, 124,
14380 GIR_EraseRootFromParent_Done,
14381 // Label 1028: @36323
14382 GIM_Try, /*On fail goto*//*Label 1029*/ GIMT_Encode4(36405), // Rule ID 15606 //
14383 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_xsetbv),
14384 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14385 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
14386 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
14387 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32_ArgRef_and_GR32_CBRegClassID),
14388 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32_AD_and_GR32_ArgRefRegClassID),
14389 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32_ADRegClassID),
14390 // (intrinsic_void 13882:{ *:[iPTR] }, ECX:{ *:[i32] }, EDX:{ *:[i32] }, EAX:{ *:[i32] }) => (XSETBV)
14391 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14392 GIR_AddRegister, /*InsnID*/3, GIMT_Encode2(X86::EAX), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14393 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/3, // EAX
14394 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14395 GIR_AddRegister, /*InsnID*/2, GIMT_Encode2(X86::EDX), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14396 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/2, // EDX
14397 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14398 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::ECX), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14399 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // ECX
14400 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XSETBV),
14401 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14402 GIR_RootConstrainSelectedInstOperands,
14403 // GIR_Coverage, 15606,
14404 GIR_EraseRootFromParent_Done,
14405 // Label 1029: @36405
14406 GIM_Try, /*On fail goto*//*Label 1030*/ GIMT_Encode4(36454), // Rule ID 15795 //
14407 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasMWAITX),
14408 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_mwaitx),
14409 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14410 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
14411 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
14412 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14413 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14414 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14415 // (intrinsic_void 13525:{ *:[iPTR] }, GR32:{ *:[i32] }:$ecx, GR32:{ *:[i32] }:$eax, GR32:{ *:[i32] }:$ebx) => (MWAITX GR32:{ *:[i32] }:$ecx, GR32:{ *:[i32] }:$eax, GR32:{ *:[i32] }:$ebx)
14416 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MWAITX),
14417 GIR_RootToRootCopy, /*OpIdx*/1, // ecx
14418 GIR_RootToRootCopy, /*OpIdx*/2, // eax
14419 GIR_RootToRootCopy, /*OpIdx*/3, // ebx
14420 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14421 GIR_RootConstrainSelectedInstOperands,
14422 // GIR_Coverage, 15795,
14423 GIR_EraseRootFromParent_Done,
14424 // Label 1030: @36454
14425 GIM_Try, /*On fail goto*//*Label 1031*/ GIMT_Encode4(36516), // Rule ID 2851 //
14426 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_In64BitMode),
14427 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse2_maskmov_dqu),
14428 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
14429 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
14430 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14431 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14432 // MIs[0] Operand 3
14433 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/64,
14434 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID),
14435 // (intrinsic_void 13622:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, RDI:{ *:[i64] }) => (VMASKMOVDQU64 VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask)
14436 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14437 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::RDI), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14438 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // RDI
14439 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMASKMOVDQU64),
14440 GIR_RootToRootCopy, /*OpIdx*/1, // src
14441 GIR_RootToRootCopy, /*OpIdx*/2, // mask
14442 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14443 GIR_RootConstrainSelectedInstOperands,
14444 // GIR_Coverage, 2851,
14445 GIR_EraseRootFromParent_Done,
14446 // Label 1031: @36516
14447 GIM_Try, /*On fail goto*//*Label 1032*/ GIMT_Encode4(36578), // Rule ID 2852 //
14448 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX),
14449 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse2_maskmov_dqu),
14450 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
14451 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
14452 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14453 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14454 // MIs[0] Operand 3
14455 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/32,
14456 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32_DIBP_and_GR32_SIDIRegClassID),
14457 // (intrinsic_void 13622:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, EDI:{ *:[i32] }) => (VMASKMOVDQU VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask)
14458 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14459 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::EDI), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14460 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // EDI
14461 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMASKMOVDQU),
14462 GIR_RootToRootCopy, /*OpIdx*/1, // src
14463 GIR_RootToRootCopy, /*OpIdx*/2, // mask
14464 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14465 GIR_RootConstrainSelectedInstOperands,
14466 // GIR_Coverage, 2852,
14467 GIR_EraseRootFromParent_Done,
14468 // Label 1032: @36578
14469 GIM_Try, /*On fail goto*//*Label 1033*/ GIMT_Encode4(36640), // Rule ID 2853 //
14470 GIM_CheckFeatures, GIMT_Encode2(GIFBS_In64BitMode_UseSSE2),
14471 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse2_maskmov_dqu),
14472 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
14473 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
14474 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14475 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14476 // MIs[0] Operand 3
14477 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/64,
14478 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID),
14479 // (intrinsic_void 13622:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, RDI:{ *:[i64] }) => (MASKMOVDQU64 VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask)
14480 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14481 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::RDI), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14482 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // RDI
14483 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MASKMOVDQU64),
14484 GIR_RootToRootCopy, /*OpIdx*/1, // src
14485 GIR_RootToRootCopy, /*OpIdx*/2, // mask
14486 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14487 GIR_RootConstrainSelectedInstOperands,
14488 // GIR_Coverage, 2853,
14489 GIR_EraseRootFromParent_Done,
14490 // Label 1033: @36640
14491 GIM_Try, /*On fail goto*//*Label 1034*/ GIMT_Encode4(36702), // Rule ID 2854 //
14492 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
14493 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_sse2_maskmov_dqu),
14494 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
14495 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
14496 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14497 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14498 // MIs[0] Operand 3
14499 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/32,
14500 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32_DIBP_and_GR32_SIDIRegClassID),
14501 // (intrinsic_void 13622:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, EDI:{ *:[i32] }) => (MASKMOVDQU VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask)
14502 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14503 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::EDI), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14504 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // EDI
14505 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MASKMOVDQU),
14506 GIR_RootToRootCopy, /*OpIdx*/1, // src
14507 GIR_RootToRootCopy, /*OpIdx*/2, // mask
14508 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14509 GIR_RootConstrainSelectedInstOperands,
14510 // GIR_Coverage, 2854,
14511 GIR_EraseRootFromParent_Done,
14512 // Label 1034: @36702
14513 GIM_Reject,
14514 // Label 1018: @36703
14515 GIM_Try, /*On fail goto*//*Label 1035*/ GIMT_Encode4(36791), // Rule ID 15532 //
14516 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasKL),
14517 GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
14518 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_loadiwkey),
14519 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14520 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
14521 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
14522 GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
14523 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14524 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14525 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
14526 GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::GR32_ADRegClassID),
14527 // (intrinsic_void 13448:{ *:[iPTR] }, XMM0:{ *:[v2i64] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, EAX:{ *:[i32] }) => (LOADIWKEY:{ *:[i32] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
14528 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14529 GIR_AddRegister, /*InsnID*/2, GIMT_Encode2(X86::EAX), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14530 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/4, // EAX
14531 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14532 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::XMM0), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
14533 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // XMM0
14534 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LOADIWKEY),
14535 GIR_RootToRootCopy, /*OpIdx*/2, // src1
14536 GIR_RootToRootCopy, /*OpIdx*/3, // src2
14537 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
14538 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
14539 GIR_RootConstrainSelectedInstOperands,
14540 // GIR_Coverage, 15532,
14541 GIR_EraseRootFromParent_Done,
14542 // Label 1035: @36791
14543 GIM_Reject,
14544 // Label 12: @36792
14545 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 1039*/ GIMT_Encode4(37226),
14546 /*GILLT_s16*//*Label 1036*/ GIMT_Encode4(36815),
14547 /*GILLT_s32*//*Label 1037*/ GIMT_Encode4(36873),
14548 /*GILLT_s64*//*Label 1038*/ GIMT_Encode4(37048),
14549 // Label 1036: @36815
14550 GIM_Try, /*On fail goto*//*Label 1040*/ GIMT_Encode4(36872), // Rule ID 21001 //
14551 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
14552 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14553 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
14554 // (anyext:{ *:[i16] } GR8:{ *:[i8] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_16bit:{ *:[i32] })
14555 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
14556 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
14557 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14558 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
14559 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14560 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14561 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14562 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
14563 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
14564 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
14565 // GIR_Coverage, 21001,
14566 GIR_EraseRootFromParent_Done,
14567 // Label 1040: @36872
14568 GIM_Reject,
14569 // Label 1037: @36873
14570 GIM_Try, /*On fail goto*//*Label 1041*/ GIMT_Encode4(36919), // Rule ID 17971 //
14571 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
14572 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14573 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14574 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BITCAST),
14575 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
14576 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
14577 GIM_CheckIsSafeToFold, /*NumInsns*/1,
14578 // (anyext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] })
14579 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14580 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14581 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
14582 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR32RegClassID),
14583 // GIR_Coverage, 17971,
14584 GIR_EraseRootFromParent_Done,
14585 // Label 1041: @36919
14586 GIM_Try, /*On fail goto*//*Label 1042*/ GIMT_Encode4(36965), // Rule ID 17974 //
14587 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
14588 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14589 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14590 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BITCAST),
14591 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
14592 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
14593 GIM_CheckIsSafeToFold, /*NumInsns*/1,
14594 // (anyext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] })
14595 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14596 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14597 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
14598 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR32RegClassID),
14599 // GIR_Coverage, 17974,
14600 GIR_EraseRootFromParent_Done,
14601 // Label 1042: @36965
14602 GIM_Try, /*On fail goto*//*Label 1043*/ GIMT_Encode4(36988), // Rule ID 21002 //
14603 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
14604 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14605 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
14606 // (anyext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src)
14607 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
14608 GIR_RootConstrainSelectedInstOperands,
14609 // GIR_Coverage, 21002,
14610 GIR_Done,
14611 // Label 1043: @36988
14612 GIM_Try, /*On fail goto*//*Label 1044*/ GIMT_Encode4(37047), // Rule ID 21003 //
14613 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
14614 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
14615 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
14616 // (anyext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] })
14617 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
14618 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
14619 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14620 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14621 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
14622 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14623 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
14624 GIR_RootToRootCopy, /*OpIdx*/1, // src
14625 GIR_AddImm8, /*InsnID*/0, /*Imm*/4,
14626 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
14627 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID),
14628 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID),
14629 // GIR_Coverage, 21003,
14630 GIR_EraseRootFromParent_Done,
14631 // Label 1044: @37047
14632 GIM_Reject,
14633 // Label 1038: @37048
14634 GIM_Try, /*On fail goto*//*Label 1045*/ GIMT_Encode4(37107), // Rule ID 21004 //
14635 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
14636 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14637 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
14638 // (anyext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_32bit:{ *:[i32] })
14639 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
14640 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
14641 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14642 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
14643 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14644 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
14645 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14646 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
14647 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
14648 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
14649 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
14650 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
14651 // GIR_Coverage, 21004,
14652 GIR_EraseRootFromParent_Done,
14653 // Label 1045: @37107
14654 GIM_Try, /*On fail goto*//*Label 1046*/ GIMT_Encode4(37166), // Rule ID 21005 //
14655 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
14656 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14657 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
14658 // (anyext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src), sub_32bit:{ *:[i32] })
14659 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
14660 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr16),
14661 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14662 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
14663 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14664 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
14665 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14666 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
14667 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
14668 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
14669 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
14670 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
14671 // GIR_Coverage, 21005,
14672 GIR_EraseRootFromParent_Done,
14673 // Label 1046: @37166
14674 GIM_Try, /*On fail goto*//*Label 1047*/ GIMT_Encode4(37225), // Rule ID 21006 //
14675 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14676 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
14677 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14678 // (anyext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR32:{ *:[i32] }:$src, sub_32bit:{ *:[i32] })
14679 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
14680 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
14681 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14682 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14683 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
14684 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14685 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
14686 GIR_RootToRootCopy, /*OpIdx*/1, // src
14687 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
14688 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
14689 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR64RegClassID),
14690 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
14691 // GIR_Coverage, 21006,
14692 GIR_EraseRootFromParent_Done,
14693 // Label 1047: @37225
14694 GIM_Reject,
14695 // Label 1039: @37226
14696 GIM_Reject,
14697 // Label 13: @37227
14698 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(22), /*)*//*default:*//*Label 1056*/ GIMT_Encode4(38230),
14699 /*GILLT_s8*//*Label 1048*/ GIMT_Encode4(37322),
14700 /*GILLT_s16*//*Label 1049*/ GIMT_Encode4(37597), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14701 /*GILLT_v4s32*//*Label 1050*/ GIMT_Encode4(37636), GIMT_Encode4(0), GIMT_Encode4(0),
14702 /*GILLT_v8s16*//*Label 1051*/ GIMT_Encode4(37776),
14703 /*GILLT_v8s32*//*Label 1052*/ GIMT_Encode4(37939), GIMT_Encode4(0), GIMT_Encode4(0),
14704 /*GILLT_v16s8*//*Label 1053*/ GIMT_Encode4(37966),
14705 /*GILLT_v16s16*//*Label 1054*/ GIMT_Encode4(38176), GIMT_Encode4(0), GIMT_Encode4(0),
14706 /*GILLT_v32s8*//*Label 1055*/ GIMT_Encode4(38203),
14707 // Label 1048: @37322
14708 GIM_Try, /*On fail goto*//*Label 1057*/ GIMT_Encode4(37394), // Rule ID 17966 //
14709 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
14710 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14711 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14712 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BITCAST),
14713 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
14714 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
14715 GIM_CheckIsSafeToFold, /*NumInsns*/1,
14716 // (trunc:{ *:[i8] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }), sub_8bit:{ *:[i32] })
14717 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
14718 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14719 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14720 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src
14721 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14722 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14723 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14724 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_8bit),
14725 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID),
14726 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
14727 // GIR_Coverage, 17966,
14728 GIR_EraseRootFromParent_Done,
14729 // Label 1057: @37394
14730 GIM_Try, /*On fail goto*//*Label 1058*/ GIMT_Encode4(37454), // Rule ID 21063 //
14731 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode),
14732 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14733 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32_ABCDRegClassID),
14734 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14735 // (trunc:{ *:[i8] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32_ABCD:{ *:[i32] }), sub_8bit:{ *:[i32] })
14736 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
14737 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14738 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14739 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
14740 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14741 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14742 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14743 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_8bit),
14744 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
14745 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32_ABCDRegClassID),
14746 // GIR_Coverage, 21063,
14747 GIR_EraseRootFromParent_Done,
14748 // Label 1058: @37454
14749 GIM_Try, /*On fail goto*//*Label 1059*/ GIMT_Encode4(37514), // Rule ID 21064 //
14750 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode),
14751 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
14752 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16_ABCDRegClassID),
14753 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
14754 // (trunc:{ *:[i8] } GR16:{ *:[i16] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i16] } GR16:{ *:[i16] }:$src, GR16_ABCD:{ *:[i32] }), sub_8bit:{ *:[i32] })
14755 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
14756 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14757 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14758 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
14759 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14760 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14761 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14762 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_8bit),
14763 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
14764 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR16_ABCDRegClassID),
14765 // GIR_Coverage, 21064,
14766 GIR_EraseRootFromParent_Done,
14767 // Label 1059: @37514
14768 GIM_Try, /*On fail goto*//*Label 1060*/ GIMT_Encode4(37555), // Rule ID 21068 //
14769 GIM_CheckFeatures, GIMT_Encode2(GIFBS_In64BitMode),
14770 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14771 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14772 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14773 // (trunc:{ *:[i8] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src, sub_8bit:{ *:[i32] })
14774 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14775 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14776 GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(1), // src
14777 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID),
14778 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
14779 // GIR_Coverage, 21068,
14780 GIR_EraseRootFromParent_Done,
14781 // Label 1060: @37555
14782 GIM_Try, /*On fail goto*//*Label 1061*/ GIMT_Encode4(37596), // Rule ID 21069 //
14783 GIM_CheckFeatures, GIMT_Encode2(GIFBS_In64BitMode),
14784 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
14785 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
14786 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
14787 // (trunc:{ *:[i8] } GR16:{ *:[i16] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src, sub_8bit:{ *:[i32] })
14788 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14789 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14790 GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(1), // src
14791 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID),
14792 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID),
14793 // GIR_Coverage, 21069,
14794 GIR_EraseRootFromParent_Done,
14795 // Label 1061: @37596
14796 GIM_Reject,
14797 // Label 1049: @37597
14798 GIM_Try, /*On fail goto*//*Label 1062*/ GIMT_Encode4(37635), // Rule ID 21062 //
14799 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14800 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14801 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
14802 // (trunc:{ *:[i16] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src, sub_16bit:{ *:[i32] })
14803 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14804 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14805 GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(4), // src
14806 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
14807 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
14808 // GIR_Coverage, 21062,
14809 GIR_EraseRootFromParent_Done,
14810 // Label 1062: @37635
14811 GIM_Reject,
14812 // Label 1050: @37636
14813 GIM_Try, /*On fail goto*//*Label 1063*/ GIMT_Encode4(37775),
14814 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
14815 GIM_Try, /*On fail goto*//*Label 1064*/ GIMT_Encode4(37667), // Rule ID 12148 //
14816 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
14817 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
14818 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14819 // (trunc:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src) => (VPMOVQDZ256rr:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src)
14820 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVQDZ256rr),
14821 GIR_RootConstrainSelectedInstOperands,
14822 // GIR_Coverage, 12148,
14823 GIR_Done,
14824 // Label 1064: @37667
14825 GIM_Try, /*On fail goto*//*Label 1065*/ GIMT_Encode4(37774), // Rule ID 20137 //
14826 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
14827 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14828 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14829 // (trunc:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPMOVQDZrr:{ *:[v8i32] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] })), sub_xmm:{ *:[i32] })
14830 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s32,
14831 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
14832 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
14833 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
14834 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14835 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
14836 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
14837 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14838 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
14839 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
14840 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
14841 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
14842 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
14843 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
14844 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVQDZrr),
14845 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14846 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
14847 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14848 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14849 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14850 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
14851 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
14852 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR256XRegClassID),
14853 // GIR_Coverage, 20137,
14854 GIR_EraseRootFromParent_Done,
14855 // Label 1065: @37774
14856 GIM_Reject,
14857 // Label 1063: @37775
14858 GIM_Reject,
14859 // Label 1051: @37776
14860 GIM_Try, /*On fail goto*//*Label 1066*/ GIMT_Encode4(37802), // Rule ID 12124 //
14861 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
14862 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
14863 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
14864 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
14865 // (trunc:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src) => (VPMOVQWZrr:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src)
14866 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVQWZrr),
14867 GIR_RootConstrainSelectedInstOperands,
14868 // GIR_Coverage, 12124,
14869 GIR_Done,
14870 // Label 1066: @37802
14871 GIM_Try, /*On fail goto*//*Label 1067*/ GIMT_Encode4(37828), // Rule ID 12202 //
14872 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
14873 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
14874 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
14875 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14876 // (trunc:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src)
14877 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVDWZ256rr),
14878 GIR_RootConstrainSelectedInstOperands,
14879 // GIR_Coverage, 12202,
14880 GIR_Done,
14881 // Label 1067: @37828
14882 GIM_Try, /*On fail goto*//*Label 1068*/ GIMT_Encode4(37938), // Rule ID 20136 //
14883 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
14884 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
14885 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14886 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14887 // (trunc:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src) => (EXTRACT_SUBREG:{ *:[v8i16] } (VPMOVDWZrr:{ *:[v16i16] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] })), sub_xmm:{ *:[i32] })
14888 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s16,
14889 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
14890 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
14891 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
14892 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14893 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
14894 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
14895 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14896 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
14897 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
14898 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
14899 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
14900 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
14901 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
14902 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVDWZrr),
14903 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14904 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
14905 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14906 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14907 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14908 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
14909 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
14910 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR256XRegClassID),
14911 // GIR_Coverage, 20136,
14912 GIR_EraseRootFromParent_Done,
14913 // Label 1068: @37938
14914 GIM_Reject,
14915 // Label 1052: @37939
14916 GIM_Try, /*On fail goto*//*Label 1069*/ GIMT_Encode4(37965), // Rule ID 12151 //
14917 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
14918 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
14919 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14920 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
14921 // (trunc:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src) => (VPMOVQDZrr:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src)
14922 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVQDZrr),
14923 GIR_RootConstrainSelectedInstOperands,
14924 // GIR_Coverage, 12151,
14925 GIR_Done,
14926 // Label 1069: @37965
14927 GIM_Reject,
14928 // Label 1053: @37966
14929 GIM_Try, /*On fail goto*//*Label 1070*/ GIMT_Encode4(37992), // Rule ID 12178 //
14930 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
14931 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
14932 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
14933 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
14934 // (trunc:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src)
14935 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVDBZrr),
14936 GIR_RootConstrainSelectedInstOperands,
14937 // GIR_Coverage, 12178,
14938 GIR_Done,
14939 // Label 1070: @37992
14940 GIM_Try, /*On fail goto*//*Label 1071*/ GIMT_Encode4(38018), // Rule ID 12229 //
14941 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
14942 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
14943 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
14944 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14945 // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (VPMOVWBZ256rr:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src)
14946 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVWBZ256rr),
14947 GIR_RootConstrainSelectedInstOperands,
14948 // GIR_Coverage, 12229,
14949 GIR_Done,
14950 // Label 1071: @38018
14951 GIM_Try, /*On fail goto*//*Label 1072*/ GIMT_Encode4(38128), // Rule ID 20138 //
14952 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
14953 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
14954 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14955 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14956 // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (EXTRACT_SUBREG:{ *:[v16i8] } (VPMOVWBZrr:{ *:[v32i8] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] })), sub_xmm:{ *:[i32] })
14957 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s8,
14958 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
14959 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
14960 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
14961 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14962 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
14963 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
14964 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14965 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
14966 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
14967 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
14968 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
14969 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
14970 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
14971 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVWBZrr),
14972 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14973 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
14974 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14975 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
14976 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14977 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
14978 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
14979 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR256XRegClassID),
14980 // GIR_Coverage, 20138,
14981 GIR_EraseRootFromParent_Done,
14982 // Label 1072: @38128
14983 GIM_Try, /*On fail goto*//*Label 1073*/ GIMT_Encode4(38175), // Rule ID 20229 //
14984 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_NoBWI),
14985 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
14986 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
14987 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
14988 // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVZXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src))
14989 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
14990 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVZXWDZrr),
14991 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
14992 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
14993 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
14994 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVDBZrr),
14995 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14996 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
14997 GIR_RootConstrainSelectedInstOperands,
14998 // GIR_Coverage, 20229,
14999 GIR_EraseRootFromParent_Done,
15000 // Label 1073: @38175
15001 GIM_Reject,
15002 // Label 1054: @38176
15003 GIM_Try, /*On fail goto*//*Label 1074*/ GIMT_Encode4(38202), // Rule ID 12205 //
15004 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
15005 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
15006 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15007 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15008 // (trunc:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src)
15009 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVDWZrr),
15010 GIR_RootConstrainSelectedInstOperands,
15011 // GIR_Coverage, 12205,
15012 GIR_Done,
15013 // Label 1074: @38202
15014 GIM_Reject,
15015 // Label 1055: @38203
15016 GIM_Try, /*On fail goto*//*Label 1075*/ GIMT_Encode4(38229), // Rule ID 12232 //
15017 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
15018 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
15019 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15020 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15021 // (trunc:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src) => (VPMOVWBZrr:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src)
15022 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVWBZrr),
15023 GIR_RootConstrainSelectedInstOperands,
15024 // GIR_Coverage, 12232,
15025 GIR_Done,
15026 // Label 1075: @38229
15027 GIM_Reject,
15028 // Label 1056: @38230
15029 GIM_Reject,
15030 // Label 14: @38231
15031 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(5), /*)*//*default:*//*Label 1080*/ GIMT_Encode4(38840),
15032 /*GILLT_s8*//*Label 1076*/ GIMT_Encode4(38258),
15033 /*GILLT_s16*//*Label 1077*/ GIMT_Encode4(38338),
15034 /*GILLT_s32*//*Label 1078*/ GIMT_Encode4(38544),
15035 /*GILLT_s64*//*Label 1079*/ GIMT_Encode4(38686),
15036 // Label 1076: @38258
15037 GIM_Try, /*On fail goto*//*Label 1081*/ GIMT_Encode4(38318), // Rule ID 20797 //
15038 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15039 // MIs[0] Operand 1
15040 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(0),
15041 // 0:{ *:[i8] } => (EXTRACT_SUBREG:{ *:[i8] } (MOV32r0:{ *:[i32] }:{ *:[i32] }), sub_8bit:{ *:[i32] })
15042 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15043 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOV32r0),
15044 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15045 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::EFLAGS*/0,
15046 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15047 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
15048 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15049 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_8bit),
15050 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID),
15051 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
15052 // GIR_Coverage, 20797,
15053 GIR_EraseRootFromParent_Done,
15054 // Label 1081: @38318
15055 GIM_Try, /*On fail goto*//*Label 1082*/ GIMT_Encode4(38337), // Rule ID 19 //
15056 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
15057 // MIs[0] Operand 1
15058 // No operand predicates
15059 // (imm:{ *:[i8] }):$src => (MOV8ri:{ *:[i8] } (imm:{ *:[i8] }):$src)
15060 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV8ri),
15061 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15062 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15063 GIR_RootConstrainSelectedInstOperands,
15064 // GIR_Coverage, 19,
15065 GIR_EraseRootFromParent_Done,
15066 // Label 1082: @38337
15067 GIM_Reject,
15068 // Label 1077: @38338
15069 GIM_Try, /*On fail goto*//*Label 1083*/ GIMT_Encode4(38398), // Rule ID 20798 //
15070 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15071 // MIs[0] Operand 1
15072 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(0),
15073 // 0:{ *:[i16] } => (EXTRACT_SUBREG:{ *:[i16] } (MOV32r0:{ *:[i32] }:{ *:[i32] }), sub_16bit:{ *:[i32] })
15074 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15075 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOV32r0),
15076 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15077 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::EFLAGS*/0,
15078 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15079 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
15080 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15081 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
15082 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
15083 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
15084 // GIR_Coverage, 20798,
15085 GIR_EraseRootFromParent_Done,
15086 // Label 1083: @38398
15087 GIM_Try, /*On fail goto*//*Label 1084*/ GIMT_Encode4(38461), // Rule ID 20800 //
15088 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode_OptForSize),
15089 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15090 // MIs[0] Operand 1
15091 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(1),
15092 // 1:{ *:[i16] } => (EXTRACT_SUBREG:{ *:[i16] } (MOV32r1:{ *:[i32] }:{ *:[i32] }), sub_16bit:{ *:[i32] })
15093 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15094 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOV32r1),
15095 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15096 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::EFLAGS*/0,
15097 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15098 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
15099 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15100 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
15101 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
15102 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
15103 // GIR_Coverage, 20800,
15104 GIR_EraseRootFromParent_Done,
15105 // Label 1084: @38461
15106 GIM_Try, /*On fail goto*//*Label 1085*/ GIMT_Encode4(38524), // Rule ID 20801 //
15107 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode_OptForSize),
15108 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15109 // MIs[0] Operand 1
15110 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(-1),
15111 // -1:{ *:[i16] } => (EXTRACT_SUBREG:{ *:[i16] } (MOV32r_1:{ *:[i32] }:{ *:[i32] }), sub_16bit:{ *:[i32] })
15112 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15113 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOV32r_1),
15114 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15115 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::EFLAGS*/0,
15116 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15117 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
15118 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15119 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
15120 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
15121 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
15122 // GIR_Coverage, 20801,
15123 GIR_EraseRootFromParent_Done,
15124 // Label 1085: @38524
15125 GIM_Try, /*On fail goto*//*Label 1086*/ GIMT_Encode4(38543), // Rule ID 20 //
15126 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
15127 // MIs[0] Operand 1
15128 // No operand predicates
15129 // (imm:{ *:[i16] }):$src => (MOV16ri:{ *:[i16] } (imm:{ *:[i16] }):$src)
15130 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV16ri),
15131 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15132 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15133 GIR_RootConstrainSelectedInstOperands,
15134 // GIR_Coverage, 20,
15135 GIR_EraseRootFromParent_Done,
15136 // Label 1086: @38543
15137 GIM_Reject,
15138 // Label 1078: @38544
15139 GIM_Try, /*On fail goto*//*Label 1087*/ GIMT_Encode4(38574), // Rule ID 15655 //
15140 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15141 // MIs[0] Operand 1
15142 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(0),
15143 // 0:{ *:[i32] } => (MOV32r0:{ *:[i32] }:{ *:[i32] })
15144 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV32r0),
15145 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15146 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
15147 GIR_RootConstrainSelectedInstOperands,
15148 // GIR_Coverage, 15655,
15149 GIR_EraseRootFromParent_Done,
15150 // Label 1087: @38574
15151 GIM_Try, /*On fail goto*//*Label 1088*/ GIMT_Encode4(38607), // Rule ID 15656 //
15152 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode_OptForSize),
15153 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15154 // MIs[0] Operand 1
15155 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(1),
15156 // 1:{ *:[i32] } => (MOV32r1:{ *:[i32] }:{ *:[i32] })
15157 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV32r1),
15158 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15159 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
15160 GIR_RootConstrainSelectedInstOperands,
15161 // GIR_Coverage, 15656,
15162 GIR_EraseRootFromParent_Done,
15163 // Label 1088: @38607
15164 GIM_Try, /*On fail goto*//*Label 1089*/ GIMT_Encode4(38640), // Rule ID 15657 //
15165 GIM_CheckFeatures, GIMT_Encode2(GIFBS_Not64BitMode_OptForSize),
15166 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15167 // MIs[0] Operand 1
15168 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(-1),
15169 // -1:{ *:[i32] } => (MOV32r_1:{ *:[i32] }:{ *:[i32] })
15170 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV32r_1),
15171 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15172 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
15173 GIR_RootConstrainSelectedInstOperands,
15174 // GIR_Coverage, 15657,
15175 GIR_EraseRootFromParent_Done,
15176 // Label 1089: @38640
15177 GIM_Try, /*On fail goto*//*Label 1090*/ GIMT_Encode4(38666), // Rule ID 15658 //
15178 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotWin64WithoutFP_OptForMinSize),
15179 GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i32immSExt8),
15180 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15181 // MIs[0] Operand 1
15182 // No operand predicates
15183 // (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src => (MOV32ImmSExti8:{ *:[i32] } (imm:{ *:[i32] }):$src)
15184 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV32ImmSExti8),
15185 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15186 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15187 GIR_RootConstrainSelectedInstOperands,
15188 // GIR_Coverage, 15658,
15189 GIR_EraseRootFromParent_Done,
15190 // Label 1090: @38666
15191 GIM_Try, /*On fail goto*//*Label 1091*/ GIMT_Encode4(38685), // Rule ID 21 //
15192 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15193 // MIs[0] Operand 1
15194 // No operand predicates
15195 // (imm:{ *:[i32] }):$src => (MOV32ri:{ *:[i32] } (imm:{ *:[i32] }):$src)
15196 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV32ri),
15197 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15198 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15199 GIR_RootConstrainSelectedInstOperands,
15200 // GIR_Coverage, 21,
15201 GIR_EraseRootFromParent_Done,
15202 // Label 1091: @38685
15203 GIM_Reject,
15204 // Label 1079: @38686
15205 GIM_Try, /*On fail goto*//*Label 1092*/ GIMT_Encode4(38748), // Rule ID 20799 //
15206 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15207 // MIs[0] Operand 1
15208 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, GIMT_Encode8(0),
15209 // 0:{ *:[i64] } => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOV32r0:{ *:[i32] }:{ *:[i32] }), sub_32bit:{ *:[i32] })
15210 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15211 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOV32r0),
15212 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15213 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::EFLAGS*/0,
15214 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15215 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
15216 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15217 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
15218 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15219 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
15220 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
15221 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
15222 // GIR_Coverage, 20799,
15223 GIR_EraseRootFromParent_Done,
15224 // Label 1092: @38748
15225 GIM_Try, /*On fail goto*//*Label 1093*/ GIMT_Encode4(38774), // Rule ID 15659 //
15226 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotWin64WithoutFP_OptForMinSize),
15227 GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt8),
15228 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15229 // MIs[0] Operand 1
15230 // No operand predicates
15231 // (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src => (MOV64ImmSExti8:{ *:[i64] } (imm:{ *:[i64] }):$src)
15232 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV64ImmSExti8),
15233 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15234 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15235 GIR_RootConstrainSelectedInstOperands,
15236 // GIR_Coverage, 15659,
15237 GIR_EraseRootFromParent_Done,
15238 // Label 1093: @38774
15239 GIM_Try, /*On fail goto*//*Label 1094*/ GIMT_Encode4(38797), // Rule ID 15660 //
15240 GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immZExt32),
15241 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15242 // MIs[0] Operand 1
15243 // No operand predicates
15244 // (imm:{ *:[i64] })<<P:Predicate_i64immZExt32>>:$src => (MOV32ri64:{ *:[i64] } (imm:{ *:[i64] }):$src)
15245 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV32ri64),
15246 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15247 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15248 GIR_RootConstrainSelectedInstOperands,
15249 // GIR_Coverage, 15660,
15250 GIR_EraseRootFromParent_Done,
15251 // Label 1094: @38797
15252 GIM_Try, /*On fail goto*//*Label 1095*/ GIMT_Encode4(38820), // Rule ID 22 //
15253 GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32),
15254 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15255 // MIs[0] Operand 1
15256 // No operand predicates
15257 // (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src => (MOV64ri32:{ *:[i64] } (imm:{ *:[i64] }):$src)
15258 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV64ri32),
15259 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15260 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15261 GIR_RootConstrainSelectedInstOperands,
15262 // GIR_Coverage, 22,
15263 GIR_EraseRootFromParent_Done,
15264 // Label 1095: @38820
15265 GIM_Try, /*On fail goto*//*Label 1096*/ GIMT_Encode4(38839), // Rule ID 23 //
15266 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15267 // MIs[0] Operand 1
15268 // No operand predicates
15269 // (imm:{ *:[i64] }):$src => (MOV64ri:{ *:[i64] } (imm:{ *:[i64] }):$src)
15270 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOV64ri),
15271 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15272 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
15273 GIR_RootConstrainSelectedInstOperands,
15274 // GIR_Coverage, 23,
15275 GIR_EraseRootFromParent_Done,
15276 // Label 1096: @38839
15277 GIM_Reject,
15278 // Label 1080: @38840
15279 GIM_Reject,
15280 // Label 15: @38841
15281 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(6), /*)*//*default:*//*Label 1100*/ GIMT_Encode4(39293),
15282 /*GILLT_s32*//*Label 1097*/ GIMT_Encode4(38864),
15283 /*GILLT_s64*//*Label 1098*/ GIMT_Encode4(39009),
15284 /*GILLT_s80*//*Label 1099*/ GIMT_Encode4(39154),
15285 // Label 1097: @38864
15286 GIM_Try, /*On fail goto*//*Label 1101*/ GIMT_Encode4(38890), // Rule ID 1104 //
15287 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
15288 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimm0),
15289 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
15290 // MIs[0] Operand 1
15291 // No operand predicates
15292 // (fpimm:{ *:[f32] })<<P:Predicate_fpimm0>> => (LD_Fp032:{ *:[f32] }:{ *:[i16] })
15293 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LD_Fp032),
15294 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15295 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15296 GIR_RootConstrainSelectedInstOperands,
15297 // GIR_Coverage, 1104,
15298 GIR_EraseRootFromParent_Done,
15299 // Label 1101: @38890
15300 GIM_Try, /*On fail goto*//*Label 1102*/ GIMT_Encode4(38916), // Rule ID 1105 //
15301 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
15302 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimm1),
15303 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
15304 // MIs[0] Operand 1
15305 // No operand predicates
15306 // (fpimm:{ *:[f32] })<<P:Predicate_fpimm1>> => (LD_Fp132:{ *:[f32] }:{ *:[i16] })
15307 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LD_Fp132),
15308 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15309 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15310 GIR_RootConstrainSelectedInstOperands,
15311 // GIR_Coverage, 1105,
15312 GIR_EraseRootFromParent_Done,
15313 // Label 1102: @38916
15314 GIM_Try, /*On fail goto*//*Label 1103*/ GIMT_Encode4(38962), // Rule ID 16222 //
15315 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
15316 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimmneg0),
15317 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
15318 // MIs[0] Operand 1
15319 // No operand predicates
15320 // (fpimm:{ *:[f32] })<<P:Predicate_fpimmneg0>> => (CHS_Fp32:{ *:[f32] }:{ *:[i16] } (LD_Fp032:{ *:[f32] }:{ *:[i16] }))
15321 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15322 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::LD_Fp032),
15323 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15324 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::FPSW*/0,
15325 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15326 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CHS_Fp32),
15327 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15328 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15329 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15330 GIR_RootConstrainSelectedInstOperands,
15331 // GIR_Coverage, 16222,
15332 GIR_EraseRootFromParent_Done,
15333 // Label 1103: @38962
15334 GIM_Try, /*On fail goto*//*Label 1104*/ GIMT_Encode4(39008), // Rule ID 16223 //
15335 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
15336 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimmneg1),
15337 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
15338 // MIs[0] Operand 1
15339 // No operand predicates
15340 // (fpimm:{ *:[f32] })<<P:Predicate_fpimmneg1>> => (CHS_Fp32:{ *:[f32] }:{ *:[i16] } (LD_Fp132:{ *:[f32] }:{ *:[i16] }))
15341 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15342 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::LD_Fp132),
15343 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15344 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::FPSW*/0,
15345 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15346 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CHS_Fp32),
15347 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15348 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15349 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15350 GIR_RootConstrainSelectedInstOperands,
15351 // GIR_Coverage, 16223,
15352 GIR_EraseRootFromParent_Done,
15353 // Label 1104: @39008
15354 GIM_Reject,
15355 // Label 1098: @39009
15356 GIM_Try, /*On fail goto*//*Label 1105*/ GIMT_Encode4(39035), // Rule ID 1106 //
15357 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
15358 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimm0),
15359 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
15360 // MIs[0] Operand 1
15361 // No operand predicates
15362 // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>> => (LD_Fp064:{ *:[f64] }:{ *:[i16] })
15363 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LD_Fp064),
15364 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15365 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15366 GIR_RootConstrainSelectedInstOperands,
15367 // GIR_Coverage, 1106,
15368 GIR_EraseRootFromParent_Done,
15369 // Label 1105: @39035
15370 GIM_Try, /*On fail goto*//*Label 1106*/ GIMT_Encode4(39061), // Rule ID 1107 //
15371 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
15372 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimm1),
15373 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
15374 // MIs[0] Operand 1
15375 // No operand predicates
15376 // (fpimm:{ *:[f64] })<<P:Predicate_fpimm1>> => (LD_Fp164:{ *:[f64] }:{ *:[i16] })
15377 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LD_Fp164),
15378 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15379 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15380 GIR_RootConstrainSelectedInstOperands,
15381 // GIR_Coverage, 1107,
15382 GIR_EraseRootFromParent_Done,
15383 // Label 1106: @39061
15384 GIM_Try, /*On fail goto*//*Label 1107*/ GIMT_Encode4(39107), // Rule ID 16224 //
15385 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
15386 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimmneg0),
15387 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
15388 // MIs[0] Operand 1
15389 // No operand predicates
15390 // (fpimm:{ *:[f64] })<<P:Predicate_fpimmneg0>> => (CHS_Fp64:{ *:[f64] }:{ *:[i16] } (LD_Fp064:{ *:[f64] }:{ *:[i16] }))
15391 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
15392 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::LD_Fp064),
15393 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15394 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::FPSW*/0,
15395 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15396 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CHS_Fp64),
15397 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15398 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15399 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15400 GIR_RootConstrainSelectedInstOperands,
15401 // GIR_Coverage, 16224,
15402 GIR_EraseRootFromParent_Done,
15403 // Label 1107: @39107
15404 GIM_Try, /*On fail goto*//*Label 1108*/ GIMT_Encode4(39153), // Rule ID 16225 //
15405 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
15406 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimmneg1),
15407 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
15408 // MIs[0] Operand 1
15409 // No operand predicates
15410 // (fpimm:{ *:[f64] })<<P:Predicate_fpimmneg1>> => (CHS_Fp64:{ *:[f64] }:{ *:[i16] } (LD_Fp164:{ *:[f64] }:{ *:[i16] }))
15411 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
15412 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::LD_Fp164),
15413 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15414 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::FPSW*/0,
15415 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15416 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CHS_Fp64),
15417 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15418 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15419 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15420 GIR_RootConstrainSelectedInstOperands,
15421 // GIR_Coverage, 16225,
15422 GIR_EraseRootFromParent_Done,
15423 // Label 1108: @39153
15424 GIM_Reject,
15425 // Label 1099: @39154
15426 GIM_Try, /*On fail goto*//*Label 1109*/ GIMT_Encode4(39180), // Rule ID 1108 //
15427 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
15428 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimm0),
15429 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
15430 // MIs[0] Operand 1
15431 // No operand predicates
15432 // (fpimm:{ *:[f80] })<<P:Predicate_fpimm0>> => (LD_Fp080:{ *:[f80] }:{ *:[i16] })
15433 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LD_Fp080),
15434 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15435 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15436 GIR_RootConstrainSelectedInstOperands,
15437 // GIR_Coverage, 1108,
15438 GIR_EraseRootFromParent_Done,
15439 // Label 1109: @39180
15440 GIM_Try, /*On fail goto*//*Label 1110*/ GIMT_Encode4(39206), // Rule ID 1109 //
15441 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
15442 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimm1),
15443 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
15444 // MIs[0] Operand 1
15445 // No operand predicates
15446 // (fpimm:{ *:[f80] })<<P:Predicate_fpimm1>> => (LD_Fp180:{ *:[f80] }:{ *:[i16] })
15447 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::LD_Fp180),
15448 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15449 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15450 GIR_RootConstrainSelectedInstOperands,
15451 // GIR_Coverage, 1109,
15452 GIR_EraseRootFromParent_Done,
15453 // Label 1110: @39206
15454 GIM_Try, /*On fail goto*//*Label 1111*/ GIMT_Encode4(39249), // Rule ID 16226 //
15455 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimmneg0),
15456 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
15457 // MIs[0] Operand 1
15458 // No operand predicates
15459 // (fpimm:{ *:[f80] })<<P:Predicate_fpimmneg0>> => (CHS_Fp80:{ *:[f80] }:{ *:[i16] } (LD_Fp080:{ *:[f80] }:{ *:[i16] }))
15460 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s80,
15461 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::LD_Fp080),
15462 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15463 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::FPSW*/0,
15464 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15465 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CHS_Fp80),
15466 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15467 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15468 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15469 GIR_RootConstrainSelectedInstOperands,
15470 // GIR_Coverage, 16226,
15471 GIR_EraseRootFromParent_Done,
15472 // Label 1111: @39249
15473 GIM_Try, /*On fail goto*//*Label 1112*/ GIMT_Encode4(39292), // Rule ID 16227 //
15474 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIMT_Encode2(GICXXPred_APFloat_Predicate_fpimmneg1),
15475 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
15476 // MIs[0] Operand 1
15477 // No operand predicates
15478 // (fpimm:{ *:[f80] })<<P:Predicate_fpimmneg1>> => (CHS_Fp80:{ *:[f80] }:{ *:[i16] } (LD_Fp180:{ *:[f80] }:{ *:[i16] }))
15479 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s80,
15480 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::LD_Fp180),
15481 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15482 GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for X86::FPSW*/0,
15483 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15484 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CHS_Fp80),
15485 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15486 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15487 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::FPSW*/0,
15488 GIR_RootConstrainSelectedInstOperands,
15489 // GIR_Coverage, 16227,
15490 GIR_EraseRootFromParent_Done,
15491 // Label 1112: @39292
15492 GIM_Reject,
15493 // Label 1100: @39293
15494 GIM_Reject,
15495 // Label 16: @39294
15496 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(25), /*)*//*default:*//*Label 1128*/ GIMT_Encode4(40316),
15497 /*GILLT_s16*//*Label 1113*/ GIMT_Encode4(39397),
15498 /*GILLT_s32*//*Label 1114*/ GIMT_Encode4(39455),
15499 /*GILLT_s64*//*Label 1115*/ GIMT_Encode4(39502), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15500 /*GILLT_v2s64*//*Label 1116*/ GIMT_Encode4(39575), GIMT_Encode4(0),
15501 /*GILLT_v4s32*//*Label 1117*/ GIMT_Encode4(39602),
15502 /*GILLT_v4s64*//*Label 1118*/ GIMT_Encode4(39629), GIMT_Encode4(0),
15503 /*GILLT_v8s16*//*Label 1119*/ GIMT_Encode4(39708),
15504 /*GILLT_v8s32*//*Label 1120*/ GIMT_Encode4(39777),
15505 /*GILLT_v8s64*//*Label 1121*/ GIMT_Encode4(39856), GIMT_Encode4(0),
15506 /*GILLT_v16s8*//*Label 1122*/ GIMT_Encode4(39935),
15507 /*GILLT_v16s16*//*Label 1123*/ GIMT_Encode4(40004),
15508 /*GILLT_v16s32*//*Label 1124*/ GIMT_Encode4(40130), GIMT_Encode4(0),
15509 /*GILLT_v32s8*//*Label 1125*/ GIMT_Encode4(40209),
15510 /*GILLT_v32s16*//*Label 1126*/ GIMT_Encode4(40236), GIMT_Encode4(0),
15511 /*GILLT_v64s8*//*Label 1127*/ GIMT_Encode4(40289),
15512 // Label 1113: @39397
15513 GIM_Try, /*On fail goto*//*Label 1129*/ GIMT_Encode4(39454), // Rule ID 21058 //
15514 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
15515 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15516 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
15517 // (sext:{ *:[i16] } GR8:{ *:[i8] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (MOVSX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_16bit:{ *:[i32] })
15518 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15519 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVSX32rr8),
15520 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15521 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
15522 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15523 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
15524 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15525 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
15526 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
15527 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
15528 // GIR_Coverage, 21058,
15529 GIR_EraseRootFromParent_Done,
15530 // Label 1129: @39454
15531 GIM_Reject,
15532 // Label 1114: @39455
15533 GIM_Try, /*On fail goto*//*Label 1130*/ GIMT_Encode4(39478), // Rule ID 603 //
15534 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
15535 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15536 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
15537 // (sext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVSX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src)
15538 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSX32rr8),
15539 GIR_RootConstrainSelectedInstOperands,
15540 // GIR_Coverage, 603,
15541 GIR_Done,
15542 // Label 1130: @39478
15543 GIM_Try, /*On fail goto*//*Label 1131*/ GIMT_Encode4(39501), // Rule ID 605 //
15544 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
15545 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15546 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
15547 // (sext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVSX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src)
15548 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSX32rr16),
15549 GIR_RootConstrainSelectedInstOperands,
15550 // GIR_Coverage, 605,
15551 GIR_Done,
15552 // Label 1131: @39501
15553 GIM_Reject,
15554 // Label 1115: @39502
15555 GIM_Try, /*On fail goto*//*Label 1132*/ GIMT_Encode4(39525), // Rule ID 611 //
15556 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
15557 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15558 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
15559 // (sext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (MOVSX64rr8:{ *:[i64] } GR8:{ *:[i8] }:$src)
15560 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSX64rr8),
15561 GIR_RootConstrainSelectedInstOperands,
15562 // GIR_Coverage, 611,
15563 GIR_Done,
15564 // Label 1132: @39525
15565 GIM_Try, /*On fail goto*//*Label 1133*/ GIMT_Encode4(39548), // Rule ID 613 //
15566 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
15567 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15568 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
15569 // (sext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (MOVSX64rr16:{ *:[i64] } GR16:{ *:[i16] }:$src)
15570 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSX64rr16),
15571 GIR_RootConstrainSelectedInstOperands,
15572 // GIR_Coverage, 613,
15573 GIR_Done,
15574 // Label 1133: @39548
15575 GIM_Try, /*On fail goto*//*Label 1134*/ GIMT_Encode4(39574), // Rule ID 615 //
15576 GIM_CheckFeatures, GIMT_Encode2(GIFBS_In64BitMode),
15577 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
15578 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
15579 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15580 // (sext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (MOVSX64rr32:{ *:[i64] } GR32:{ *:[i32] }:$src)
15581 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSX64rr32),
15582 GIR_RootConstrainSelectedInstOperands,
15583 // GIR_Coverage, 615,
15584 GIR_Done,
15585 // Label 1134: @39574
15586 GIM_Reject,
15587 // Label 1116: @39575
15588 GIM_Try, /*On fail goto*//*Label 1135*/ GIMT_Encode4(39601), // Rule ID 12480 //
15589 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
15590 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1,
15591 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15592 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
15593 // (sext:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) => (VPMOVM2QZ128rr:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src)
15594 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2QZ128rr),
15595 GIR_RootConstrainSelectedInstOperands,
15596 // GIR_Coverage, 12480,
15597 GIR_Done,
15598 // Label 1135: @39601
15599 GIM_Reject,
15600 // Label 1117: @39602
15601 GIM_Try, /*On fail goto*//*Label 1136*/ GIMT_Encode4(39628), // Rule ID 12477 //
15602 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
15603 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1,
15604 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15605 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
15606 // (sext:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2DZ128rr:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src)
15607 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2DZ128rr),
15608 GIR_RootConstrainSelectedInstOperands,
15609 // GIR_Coverage, 12477,
15610 GIR_Done,
15611 // Label 1136: @39628
15612 GIM_Reject,
15613 // Label 1118: @39629
15614 GIM_Try, /*On fail goto*//*Label 1137*/ GIMT_Encode4(39655), // Rule ID 12457 //
15615 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
15616 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
15617 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15618 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15619 // (sext:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) => (VPMOVSXDQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src)
15620 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXDQZ256rr),
15621 GIR_RootConstrainSelectedInstOperands,
15622 // GIR_Coverage, 12457,
15623 GIR_Done,
15624 // Label 1137: @39655
15625 GIM_Try, /*On fail goto*//*Label 1138*/ GIMT_Encode4(39681), // Rule ID 12479 //
15626 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
15627 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1,
15628 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15629 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
15630 // (sext:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2QZ256rr:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src)
15631 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2QZ256rr),
15632 GIR_RootConstrainSelectedInstOperands,
15633 // GIR_Coverage, 12479,
15634 GIR_Done,
15635 // Label 1138: @39681
15636 GIM_Try, /*On fail goto*//*Label 1139*/ GIMT_Encode4(39707), // Rule ID 16888 //
15637 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
15638 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
15639 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
15640 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
15641 // (sext:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) => (VPMOVSXDQYrr:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src)
15642 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXDQYrr),
15643 GIR_RootConstrainSelectedInstOperands,
15644 // GIR_Coverage, 16888,
15645 GIR_Done,
15646 // Label 1139: @39707
15647 GIM_Reject,
15648 // Label 1119: @39708
15649 GIM_Try, /*On fail goto*//*Label 1140*/ GIMT_Encode4(39776),
15650 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
15651 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15652 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
15653 GIM_Try, /*On fail goto*//*Label 1141*/ GIMT_Encode4(39739), // Rule ID 12474 //
15654 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
15655 // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2WZ128rr:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src)
15656 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2WZ128rr),
15657 GIR_RootConstrainSelectedInstOperands,
15658 // GIR_Coverage, 12474,
15659 GIR_Done,
15660 // Label 1141: @39739
15661 GIM_Try, /*On fail goto*//*Label 1142*/ GIMT_Encode4(39775), // Rule ID 20241 //
15662 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX_NoBWI),
15663 // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src))
15664 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s32,
15665 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVM2DZ256rr),
15666 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15667 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
15668 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15669 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVDWZ256rr),
15670 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15671 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15672 GIR_RootConstrainSelectedInstOperands,
15673 // GIR_Coverage, 20241,
15674 GIR_EraseRootFromParent_Done,
15675 // Label 1142: @39775
15676 GIM_Reject,
15677 // Label 1140: @39776
15678 GIM_Reject,
15679 // Label 1120: @39777
15680 GIM_Try, /*On fail goto*//*Label 1143*/ GIMT_Encode4(39803), // Rule ID 12421 //
15681 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
15682 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
15683 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15684 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15685 // (sext:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) => (VPMOVSXWDZ256rr:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src)
15686 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXWDZ256rr),
15687 GIR_RootConstrainSelectedInstOperands,
15688 // GIR_Coverage, 12421,
15689 GIR_Done,
15690 // Label 1143: @39803
15691 GIM_Try, /*On fail goto*//*Label 1144*/ GIMT_Encode4(39829), // Rule ID 12476 //
15692 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
15693 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
15694 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15695 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
15696 // (sext:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src)
15697 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2DZ256rr),
15698 GIR_RootConstrainSelectedInstOperands,
15699 // GIR_Coverage, 12476,
15700 GIR_Done,
15701 // Label 1144: @39829
15702 GIM_Try, /*On fail goto*//*Label 1145*/ GIMT_Encode4(39855), // Rule ID 16886 //
15703 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
15704 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
15705 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
15706 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
15707 // (sext:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) => (VPMOVSXWDYrr:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src)
15708 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXWDYrr),
15709 GIR_RootConstrainSelectedInstOperands,
15710 // GIR_Coverage, 16886,
15711 GIR_Done,
15712 // Label 1145: @39855
15713 GIM_Reject,
15714 // Label 1121: @39856
15715 GIM_Try, /*On fail goto*//*Label 1146*/ GIMT_Encode4(39882), // Rule ID 12445 //
15716 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
15717 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
15718 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15719 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15720 // (sext:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) => (VPMOVSXWQZrr:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src)
15721 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXWQZrr),
15722 GIR_RootConstrainSelectedInstOperands,
15723 // GIR_Coverage, 12445,
15724 GIR_Done,
15725 // Label 1146: @39882
15726 GIM_Try, /*On fail goto*//*Label 1147*/ GIMT_Encode4(39908), // Rule ID 12463 //
15727 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
15728 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
15729 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15730 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15731 // (sext:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) => (VPMOVSXDQZrr:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src)
15732 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXDQZrr),
15733 GIR_RootConstrainSelectedInstOperands,
15734 // GIR_Coverage, 12463,
15735 GIR_Done,
15736 // Label 1147: @39908
15737 GIM_Try, /*On fail goto*//*Label 1148*/ GIMT_Encode4(39934), // Rule ID 12478 //
15738 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
15739 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
15740 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15741 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
15742 // (sext:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2QZrr:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src)
15743 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2QZrr),
15744 GIR_RootConstrainSelectedInstOperands,
15745 // GIR_Coverage, 12478,
15746 GIR_Done,
15747 // Label 1148: @39934
15748 GIM_Reject,
15749 // Label 1122: @39935
15750 GIM_Try, /*On fail goto*//*Label 1149*/ GIMT_Encode4(40003),
15751 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
15752 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15753 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
15754 GIM_Try, /*On fail goto*//*Label 1150*/ GIMT_Encode4(39966), // Rule ID 12471 //
15755 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
15756 // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2BZ128rr:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src)
15757 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2BZ128rr),
15758 GIR_RootConstrainSelectedInstOperands,
15759 // GIR_Coverage, 12471,
15760 GIR_Done,
15761 // Label 1150: @39966
15762 GIM_Try, /*On fail goto*//*Label 1151*/ GIMT_Encode4(40002), // Rule ID 20239 //
15763 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_NoBWI),
15764 // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src))
15765 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
15766 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVM2DZrr),
15767 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15768 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
15769 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15770 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVDBZrr),
15771 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15772 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15773 GIR_RootConstrainSelectedInstOperands,
15774 // GIR_Coverage, 20239,
15775 GIR_EraseRootFromParent_Done,
15776 // Label 1151: @40002
15777 GIM_Reject,
15778 // Label 1149: @40003
15779 GIM_Reject,
15780 // Label 1123: @40004
15781 GIM_Try, /*On fail goto*//*Label 1152*/ GIMT_Encode4(40030), // Rule ID 12367 //
15782 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
15783 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
15784 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15785 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15786 // (sext:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) => (VPMOVSXBWZ256rr:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src)
15787 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXBWZ256rr),
15788 GIR_RootConstrainSelectedInstOperands,
15789 // GIR_Coverage, 12367,
15790 GIR_Done,
15791 // Label 1152: @40030
15792 GIM_Try, /*On fail goto*//*Label 1153*/ GIMT_Encode4(40056), // Rule ID 12473 //
15793 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
15794 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
15795 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15796 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
15797 // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2WZ256rr:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src)
15798 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2WZ256rr),
15799 GIR_RootConstrainSelectedInstOperands,
15800 // GIR_Coverage, 12473,
15801 GIR_Done,
15802 // Label 1153: @40056
15803 GIM_Try, /*On fail goto*//*Label 1154*/ GIMT_Encode4(40082), // Rule ID 16883 //
15804 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
15805 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
15806 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
15807 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
15808 // (sext:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) => (VPMOVSXBWYrr:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src)
15809 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXBWYrr),
15810 GIR_RootConstrainSelectedInstOperands,
15811 // GIR_Coverage, 16883,
15812 GIR_Done,
15813 // Label 1154: @40082
15814 GIM_Try, /*On fail goto*//*Label 1155*/ GIMT_Encode4(40129), // Rule ID 20240 //
15815 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_NoBWI),
15816 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
15817 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15818 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
15819 // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src))
15820 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
15821 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVM2DZrr),
15822 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15823 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
15824 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15825 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVDWZrr),
15826 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15827 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15828 GIR_RootConstrainSelectedInstOperands,
15829 // GIR_Coverage, 20240,
15830 GIR_EraseRootFromParent_Done,
15831 // Label 1155: @40129
15832 GIM_Reject,
15833 // Label 1124: @40130
15834 GIM_Try, /*On fail goto*//*Label 1156*/ GIMT_Encode4(40156), // Rule ID 12391 //
15835 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
15836 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
15837 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15838 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
15839 // (sext:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) => (VPMOVSXBDZrr:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src)
15840 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXBDZrr),
15841 GIR_RootConstrainSelectedInstOperands,
15842 // GIR_Coverage, 12391,
15843 GIR_Done,
15844 // Label 1156: @40156
15845 GIM_Try, /*On fail goto*//*Label 1157*/ GIMT_Encode4(40182), // Rule ID 12427 //
15846 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
15847 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
15848 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15849 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15850 // (sext:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) => (VPMOVSXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src)
15851 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXWDZrr),
15852 GIR_RootConstrainSelectedInstOperands,
15853 // GIR_Coverage, 12427,
15854 GIR_Done,
15855 // Label 1157: @40182
15856 GIM_Try, /*On fail goto*//*Label 1158*/ GIMT_Encode4(40208), // Rule ID 12475 //
15857 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
15858 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
15859 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15860 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
15861 // (sext:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)
15862 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2DZrr),
15863 GIR_RootConstrainSelectedInstOperands,
15864 // GIR_Coverage, 12475,
15865 GIR_Done,
15866 // Label 1158: @40208
15867 GIM_Reject,
15868 // Label 1125: @40209
15869 GIM_Try, /*On fail goto*//*Label 1159*/ GIMT_Encode4(40235), // Rule ID 12470 //
15870 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
15871 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
15872 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15873 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
15874 // (sext:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2BZ256rr:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src)
15875 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2BZ256rr),
15876 GIR_RootConstrainSelectedInstOperands,
15877 // GIR_Coverage, 12470,
15878 GIR_Done,
15879 // Label 1159: @40235
15880 GIM_Reject,
15881 // Label 1126: @40236
15882 GIM_Try, /*On fail goto*//*Label 1160*/ GIMT_Encode4(40262), // Rule ID 12373 //
15883 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
15884 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
15885 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15886 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
15887 // (sext:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) => (VPMOVSXBWZrr:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src)
15888 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVSXBWZrr),
15889 GIR_RootConstrainSelectedInstOperands,
15890 // GIR_Coverage, 12373,
15891 GIR_Done,
15892 // Label 1160: @40262
15893 GIM_Try, /*On fail goto*//*Label 1161*/ GIMT_Encode4(40288), // Rule ID 12472 //
15894 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
15895 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
15896 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15897 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
15898 // (sext:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2WZrr:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src)
15899 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2WZrr),
15900 GIR_RootConstrainSelectedInstOperands,
15901 // GIR_Coverage, 12472,
15902 GIR_Done,
15903 // Label 1161: @40288
15904 GIM_Reject,
15905 // Label 1127: @40289
15906 GIM_Try, /*On fail goto*//*Label 1162*/ GIMT_Encode4(40315), // Rule ID 12469 //
15907 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
15908 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1,
15909 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
15910 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
15911 // (sext:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) => (VPMOVM2BZrr:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src)
15912 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVM2BZrr),
15913 GIR_RootConstrainSelectedInstOperands,
15914 // GIR_Coverage, 12469,
15915 GIR_Done,
15916 // Label 1162: @40315
15917 GIM_Reject,
15918 // Label 1128: @40316
15919 GIM_Reject,
15920 // Label 17: @40317
15921 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 1172*/ GIMT_Encode4(41234),
15922 /*GILLT_s16*//*Label 1163*/ GIMT_Encode4(40412),
15923 /*GILLT_s32*//*Label 1164*/ GIMT_Encode4(40470),
15924 /*GILLT_s64*//*Label 1165*/ GIMT_Encode4(40604), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15925 /*GILLT_v4s64*//*Label 1166*/ GIMT_Encode4(40933), GIMT_Encode4(0), GIMT_Encode4(0),
15926 /*GILLT_v8s32*//*Label 1167*/ GIMT_Encode4(40989),
15927 /*GILLT_v8s64*//*Label 1168*/ GIMT_Encode4(41045), GIMT_Encode4(0), GIMT_Encode4(0),
15928 /*GILLT_v16s16*//*Label 1169*/ GIMT_Encode4(41098),
15929 /*GILLT_v16s32*//*Label 1170*/ GIMT_Encode4(41154), GIMT_Encode4(0), GIMT_Encode4(0),
15930 /*GILLT_v32s16*//*Label 1171*/ GIMT_Encode4(41207),
15931 // Label 1163: @40412
15932 GIM_Try, /*On fail goto*//*Label 1173*/ GIMT_Encode4(40469), // Rule ID 21060 //
15933 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
15934 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15935 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
15936 // (zext:{ *:[i16] } GR8:{ *:[i8] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_16bit:{ *:[i32] })
15937 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
15938 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
15939 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
15940 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
15941 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15942 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
15943 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15944 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit),
15945 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID),
15946 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID),
15947 // GIR_Coverage, 21060,
15948 GIR_EraseRootFromParent_Done,
15949 // Label 1173: @40469
15950 GIM_Reject,
15951 // Label 1164: @40470
15952 GIM_Try, /*On fail goto*//*Label 1174*/ GIMT_Encode4(40512), // Rule ID 17969 //
15953 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
15954 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15955 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
15956 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BITCAST),
15957 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
15958 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
15959 GIM_CheckIsSafeToFold, /*NumInsns*/1,
15960 // (zext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src)
15961 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KMOVWrk),
15962 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15963 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
15964 GIR_RootConstrainSelectedInstOperands,
15965 // GIR_Coverage, 17969,
15966 GIR_EraseRootFromParent_Done,
15967 // Label 1174: @40512
15968 GIM_Try, /*On fail goto*//*Label 1175*/ GIMT_Encode4(40557), // Rule ID 17972 //
15969 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
15970 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
15971 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15972 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
15973 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BITCAST),
15974 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
15975 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
15976 GIM_CheckIsSafeToFold, /*NumInsns*/1,
15977 // (zext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src)
15978 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KMOVBrk),
15979 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15980 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
15981 GIR_RootConstrainSelectedInstOperands,
15982 // GIR_Coverage, 17972,
15983 GIR_EraseRootFromParent_Done,
15984 // Label 1175: @40557
15985 GIM_Try, /*On fail goto*//*Label 1176*/ GIMT_Encode4(40580), // Rule ID 607 //
15986 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
15987 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15988 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
15989 // (zext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src)
15990 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
15991 GIR_RootConstrainSelectedInstOperands,
15992 // GIR_Coverage, 607,
15993 GIR_Done,
15994 // Label 1176: @40580
15995 GIM_Try, /*On fail goto*//*Label 1177*/ GIMT_Encode4(40603), // Rule ID 609 //
15996 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
15997 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
15998 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
15999 // (zext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src)
16000 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr16),
16001 GIR_RootConstrainSelectedInstOperands,
16002 // GIR_Coverage, 609,
16003 GIR_Done,
16004 // Label 1177: @40603
16005 GIM_Reject,
16006 // Label 1165: @40604
16007 GIM_Try, /*On fail goto*//*Label 1178*/ GIMT_Encode4(40678), // Rule ID 17970 //
16008 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
16009 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
16010 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16011 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BITCAST),
16012 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
16013 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
16014 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16015 // (zext:{ *:[i64] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src), sub_32bit:{ *:[i32] })
16016 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16017 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KMOVWrk),
16018 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16019 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src
16020 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
16021 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
16022 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16023 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16024 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16025 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
16026 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
16027 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
16028 // GIR_Coverage, 17970,
16029 GIR_EraseRootFromParent_Done,
16030 // Label 1178: @40678
16031 GIM_Try, /*On fail goto*//*Label 1179*/ GIMT_Encode4(40755), // Rule ID 17973 //
16032 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
16033 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
16034 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
16035 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16036 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BITCAST),
16037 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
16038 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
16039 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16040 // (zext:{ *:[i64] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src), sub_32bit:{ *:[i32] })
16041 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16042 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KMOVBrk),
16043 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16044 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src
16045 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
16046 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
16047 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16048 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16049 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16050 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
16051 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
16052 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
16053 // GIR_Coverage, 17973,
16054 GIR_EraseRootFromParent_Done,
16055 // Label 1179: @40755
16056 GIM_Try, /*On fail goto*//*Label 1180*/ GIMT_Encode4(40814), // Rule ID 16092 //
16057 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
16058 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
16059 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16060 // (zext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_32bit:{ *:[i32] })
16061 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16062 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8),
16063 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16064 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
16065 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
16066 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
16067 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16068 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16069 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16070 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
16071 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
16072 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
16073 // GIR_Coverage, 16092,
16074 GIR_EraseRootFromParent_Done,
16075 // Label 1180: @40814
16076 GIM_Try, /*On fail goto*//*Label 1181*/ GIMT_Encode4(40873), // Rule ID 16094 //
16077 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
16078 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
16079 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
16080 // (zext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src), sub_32bit:{ *:[i32] })
16081 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16082 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr16),
16083 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16084 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
16085 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
16086 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
16087 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16088 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16089 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16090 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
16091 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
16092 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
16093 // GIR_Coverage, 16094,
16094 GIR_EraseRootFromParent_Done,
16095 // Label 1181: @40873
16096 GIM_Try, /*On fail goto*//*Label 1182*/ GIMT_Encode4(40932), // Rule ID 16096 //
16097 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
16098 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
16099 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
16100 // (zext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOV32rr:{ *:[i32] } GR32:{ *:[i32] }:$src), sub_32bit:{ *:[i32] })
16101 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16102 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOV32rr),
16103 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16104 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
16105 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
16106 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::SUBREG_TO_REG),
16107 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16108 GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16109 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16110 GIR_AddImm8, /*InsnID*/0, /*Imm*/6,
16111 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID),
16112 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, GIMT_Encode2(X86::GR32RegClassID),
16113 // GIR_Coverage, 16096,
16114 GIR_EraseRootFromParent_Done,
16115 // Label 1182: @40932
16116 GIM_Reject,
16117 // Label 1166: @40933
16118 GIM_Try, /*On fail goto*//*Label 1183*/ GIMT_Encode4(40988),
16119 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
16120 GIM_Try, /*On fail goto*//*Label 1184*/ GIMT_Encode4(40964), // Rule ID 12349 //
16121 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
16122 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
16123 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
16124 // (zext:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) => (VPMOVZXDQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src)
16125 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXDQZ256rr),
16126 GIR_RootConstrainSelectedInstOperands,
16127 // GIR_Coverage, 12349,
16128 GIR_Done,
16129 // Label 1184: @40964
16130 GIM_Try, /*On fail goto*//*Label 1185*/ GIMT_Encode4(40987), // Rule ID 16911 //
16131 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
16132 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
16133 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
16134 // (zext:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) => (VPMOVZXDQYrr:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src)
16135 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXDQYrr),
16136 GIR_RootConstrainSelectedInstOperands,
16137 // GIR_Coverage, 16911,
16138 GIR_Done,
16139 // Label 1185: @40987
16140 GIM_Reject,
16141 // Label 1183: @40988
16142 GIM_Reject,
16143 // Label 1167: @40989
16144 GIM_Try, /*On fail goto*//*Label 1186*/ GIMT_Encode4(41044),
16145 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
16146 GIM_Try, /*On fail goto*//*Label 1187*/ GIMT_Encode4(41020), // Rule ID 12313 //
16147 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
16148 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
16149 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
16150 // (zext:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) => (VPMOVZXWDZ256rr:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src)
16151 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXWDZ256rr),
16152 GIR_RootConstrainSelectedInstOperands,
16153 // GIR_Coverage, 12313,
16154 GIR_Done,
16155 // Label 1187: @41020
16156 GIM_Try, /*On fail goto*//*Label 1188*/ GIMT_Encode4(41043), // Rule ID 16909 //
16157 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
16158 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
16159 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
16160 // (zext:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) => (VPMOVZXWDYrr:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src)
16161 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXWDYrr),
16162 GIR_RootConstrainSelectedInstOperands,
16163 // GIR_Coverage, 16909,
16164 GIR_Done,
16165 // Label 1188: @41043
16166 GIM_Reject,
16167 // Label 1186: @41044
16168 GIM_Reject,
16169 // Label 1168: @41045
16170 GIM_Try, /*On fail goto*//*Label 1189*/ GIMT_Encode4(41071), // Rule ID 12337 //
16171 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
16172 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
16173 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
16174 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
16175 // (zext:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) => (VPMOVZXWQZrr:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src)
16176 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXWQZrr),
16177 GIR_RootConstrainSelectedInstOperands,
16178 // GIR_Coverage, 12337,
16179 GIR_Done,
16180 // Label 1189: @41071
16181 GIM_Try, /*On fail goto*//*Label 1190*/ GIMT_Encode4(41097), // Rule ID 12355 //
16182 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
16183 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
16184 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
16185 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
16186 // (zext:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) => (VPMOVZXDQZrr:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src)
16187 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXDQZrr),
16188 GIR_RootConstrainSelectedInstOperands,
16189 // GIR_Coverage, 12355,
16190 GIR_Done,
16191 // Label 1190: @41097
16192 GIM_Reject,
16193 // Label 1169: @41098
16194 GIM_Try, /*On fail goto*//*Label 1191*/ GIMT_Encode4(41153),
16195 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
16196 GIM_Try, /*On fail goto*//*Label 1192*/ GIMT_Encode4(41129), // Rule ID 12259 //
16197 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
16198 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
16199 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
16200 // (zext:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) => (VPMOVZXBWZ256rr:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src)
16201 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXBWZ256rr),
16202 GIR_RootConstrainSelectedInstOperands,
16203 // GIR_Coverage, 12259,
16204 GIR_Done,
16205 // Label 1192: @41129
16206 GIM_Try, /*On fail goto*//*Label 1193*/ GIMT_Encode4(41152), // Rule ID 16906 //
16207 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
16208 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
16209 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
16210 // (zext:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) => (VPMOVZXBWYrr:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src)
16211 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXBWYrr),
16212 GIR_RootConstrainSelectedInstOperands,
16213 // GIR_Coverage, 16906,
16214 GIR_Done,
16215 // Label 1193: @41152
16216 GIM_Reject,
16217 // Label 1191: @41153
16218 GIM_Reject,
16219 // Label 1170: @41154
16220 GIM_Try, /*On fail goto*//*Label 1194*/ GIMT_Encode4(41180), // Rule ID 12283 //
16221 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
16222 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
16223 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
16224 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
16225 // (zext:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) => (VPMOVZXBDZrr:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src)
16226 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXBDZrr),
16227 GIR_RootConstrainSelectedInstOperands,
16228 // GIR_Coverage, 12283,
16229 GIR_Done,
16230 // Label 1194: @41180
16231 GIM_Try, /*On fail goto*//*Label 1195*/ GIMT_Encode4(41206), // Rule ID 12319 //
16232 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
16233 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
16234 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
16235 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
16236 // (zext:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) => (VPMOVZXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src)
16237 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXWDZrr),
16238 GIR_RootConstrainSelectedInstOperands,
16239 // GIR_Coverage, 12319,
16240 GIR_Done,
16241 // Label 1195: @41206
16242 GIM_Reject,
16243 // Label 1171: @41207
16244 GIM_Try, /*On fail goto*//*Label 1196*/ GIMT_Encode4(41233), // Rule ID 12265 //
16245 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
16246 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
16247 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
16248 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
16249 // (zext:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) => (VPMOVZXBWZrr:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src)
16250 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMOVZXBWZrr),
16251 GIR_RootConstrainSelectedInstOperands,
16252 // GIR_Coverage, 12265,
16253 GIR_Done,
16254 // Label 1196: @41233
16255 GIM_Reject,
16256 // Label 1172: @41234
16257 GIM_Reject,
16258 // Label 18: @41235
16259 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(5), /*)*//*default:*//*Label 1201*/ GIMT_Encode4(42422),
16260 /*GILLT_s8*//*Label 1197*/ GIMT_Encode4(41262),
16261 /*GILLT_s16*//*Label 1198*/ GIMT_Encode4(41477),
16262 /*GILLT_s32*//*Label 1199*/ GIMT_Encode4(41692),
16263 /*GILLT_s64*//*Label 1200*/ GIMT_Encode4(42057),
16264 // Label 1197: @41262
16265 GIM_Try, /*On fail goto*//*Label 1202*/ GIMT_Encode4(41476),
16266 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
16267 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
16268 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16269 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16270 GIM_Try, /*On fail goto*//*Label 1203*/ GIMT_Encode4(41307), // Rule ID 21085 //
16271 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16272 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16273 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src1)
16274 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8rr),
16275 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16276 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16277 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16278 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16279 GIR_RootConstrainSelectedInstOperands,
16280 // GIR_Coverage, 21085,
16281 GIR_EraseRootFromParent_Done,
16282 // Label 1203: @41307
16283 GIM_Try, /*On fail goto*//*Label 1204*/ GIMT_Encode4(41333), // Rule ID 21089 //
16284 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
16285 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16286 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ADD8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src1)
16287 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8rr_ND),
16288 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16289 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16290 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16291 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16292 GIR_RootConstrainSelectedInstOperands,
16293 // GIR_Coverage, 21089,
16294 GIR_EraseRootFromParent_Done,
16295 // Label 1204: @41333
16296 GIM_Try, /*On fail goto*//*Label 1205*/ GIMT_Encode4(41366), // Rule ID 649 //
16297 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16298 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16299 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16300 // MIs[1] Operand 1
16301 // No operand predicates
16302 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16303 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
16304 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL8ri),
16305 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16306 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16307 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16308 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16309 GIR_RootConstrainSelectedInstOperands,
16310 // GIR_Coverage, 649,
16311 GIR_EraseRootFromParent_Done,
16312 // Label 1205: @41366
16313 GIM_Try, /*On fail goto*//*Label 1206*/ GIMT_Encode4(41399), // Rule ID 653 //
16314 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16315 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16316 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16317 // MIs[1] Operand 1
16318 // No operand predicates
16319 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16320 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
16321 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL8ri_ND),
16322 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16323 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16324 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16325 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16326 GIR_RootConstrainSelectedInstOperands,
16327 // GIR_Coverage, 653,
16328 GIR_EraseRootFromParent_Done,
16329 // Label 1206: @41399
16330 GIM_Try, /*On fail goto*//*Label 1207*/ GIMT_Encode4(41437), // Rule ID 665 //
16331 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16332 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16333 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHL8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
16334 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16335 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16336 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16337 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL8rCL),
16338 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16339 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16340 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16341 GIR_RootConstrainSelectedInstOperands,
16342 // GIR_Coverage, 665,
16343 GIR_EraseRootFromParent_Done,
16344 // Label 1207: @41437
16345 GIM_Try, /*On fail goto*//*Label 1208*/ GIMT_Encode4(41475), // Rule ID 669 //
16346 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16347 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16348 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHL8rCL_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
16349 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16350 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16351 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16352 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL8rCL_ND),
16353 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16354 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16355 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16356 GIR_RootConstrainSelectedInstOperands,
16357 // GIR_Coverage, 669,
16358 GIR_EraseRootFromParent_Done,
16359 // Label 1208: @41475
16360 GIM_Reject,
16361 // Label 1202: @41476
16362 GIM_Reject,
16363 // Label 1198: @41477
16364 GIM_Try, /*On fail goto*//*Label 1209*/ GIMT_Encode4(41691),
16365 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
16366 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
16367 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
16368 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
16369 GIM_Try, /*On fail goto*//*Label 1210*/ GIMT_Encode4(41522), // Rule ID 21086 //
16370 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16371 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16372 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src1)
16373 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16rr),
16374 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16375 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16376 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16377 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16378 GIR_RootConstrainSelectedInstOperands,
16379 // GIR_Coverage, 21086,
16380 GIR_EraseRootFromParent_Done,
16381 // Label 1210: @41522
16382 GIM_Try, /*On fail goto*//*Label 1211*/ GIMT_Encode4(41548), // Rule ID 21090 //
16383 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
16384 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16385 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ADD16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src1)
16386 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16rr_ND),
16387 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16388 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16389 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16390 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16391 GIR_RootConstrainSelectedInstOperands,
16392 // GIR_Coverage, 21090,
16393 GIR_EraseRootFromParent_Done,
16394 // Label 1211: @41548
16395 GIM_Try, /*On fail goto*//*Label 1212*/ GIMT_Encode4(41581), // Rule ID 650 //
16396 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16397 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16398 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16399 // MIs[1] Operand 1
16400 // No operand predicates
16401 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16402 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
16403 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL16ri),
16404 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16405 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16406 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16407 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16408 GIR_RootConstrainSelectedInstOperands,
16409 // GIR_Coverage, 650,
16410 GIR_EraseRootFromParent_Done,
16411 // Label 1212: @41581
16412 GIM_Try, /*On fail goto*//*Label 1213*/ GIMT_Encode4(41614), // Rule ID 654 //
16413 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16414 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16415 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16416 // MIs[1] Operand 1
16417 // No operand predicates
16418 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16419 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
16420 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL16ri_ND),
16421 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16422 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16423 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16424 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16425 GIR_RootConstrainSelectedInstOperands,
16426 // GIR_Coverage, 654,
16427 GIR_EraseRootFromParent_Done,
16428 // Label 1213: @41614
16429 GIM_Try, /*On fail goto*//*Label 1214*/ GIMT_Encode4(41652), // Rule ID 666 //
16430 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16431 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16432 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHL16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
16433 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16434 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16435 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16436 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL16rCL),
16437 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16438 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16439 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16440 GIR_RootConstrainSelectedInstOperands,
16441 // GIR_Coverage, 666,
16442 GIR_EraseRootFromParent_Done,
16443 // Label 1214: @41652
16444 GIM_Try, /*On fail goto*//*Label 1215*/ GIMT_Encode4(41690), // Rule ID 670 //
16445 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16446 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16447 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHL16rCL_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
16448 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16449 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16450 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16451 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL16rCL_ND),
16452 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16453 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16454 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16455 GIR_RootConstrainSelectedInstOperands,
16456 // GIR_Coverage, 670,
16457 GIR_EraseRootFromParent_Done,
16458 // Label 1215: @41690
16459 GIM_Reject,
16460 // Label 1209: @41691
16461 GIM_Reject,
16462 // Label 1199: @41692
16463 GIM_Try, /*On fail goto*//*Label 1216*/ GIMT_Encode4(42056),
16464 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
16465 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
16466 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
16467 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
16468 GIM_Try, /*On fail goto*//*Label 1217*/ GIMT_Encode4(41737), // Rule ID 21087 //
16469 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16470 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16471 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src1)
16472 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32rr),
16473 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16474 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16475 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16476 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16477 GIR_RootConstrainSelectedInstOperands,
16478 // GIR_Coverage, 21087,
16479 GIR_EraseRootFromParent_Done,
16480 // Label 1217: @41737
16481 GIM_Try, /*On fail goto*//*Label 1218*/ GIMT_Encode4(41763), // Rule ID 21091 //
16482 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
16483 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16484 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ADD32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src1)
16485 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32rr_ND),
16486 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16487 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16488 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16489 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16490 GIR_RootConstrainSelectedInstOperands,
16491 // GIR_Coverage, 21091,
16492 GIR_EraseRootFromParent_Done,
16493 // Label 1218: @41763
16494 GIM_Try, /*On fail goto*//*Label 1219*/ GIMT_Encode4(41796), // Rule ID 651 //
16495 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16496 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16497 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16498 // MIs[1] Operand 1
16499 // No operand predicates
16500 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16501 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
16502 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL32ri),
16503 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16504 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16505 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16506 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16507 GIR_RootConstrainSelectedInstOperands,
16508 // GIR_Coverage, 651,
16509 GIR_EraseRootFromParent_Done,
16510 // Label 1219: @41796
16511 GIM_Try, /*On fail goto*//*Label 1220*/ GIMT_Encode4(41829), // Rule ID 655 //
16512 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16513 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16514 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16515 // MIs[1] Operand 1
16516 // No operand predicates
16517 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16518 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
16519 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL32ri_ND),
16520 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16521 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16522 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16523 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16524 GIR_RootConstrainSelectedInstOperands,
16525 // GIR_Coverage, 655,
16526 GIR_EraseRootFromParent_Done,
16527 // Label 1220: @41829
16528 GIM_Try, /*On fail goto*//*Label 1221*/ GIMT_Encode4(41904), // Rule ID 16170 //
16529 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
16530 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16531 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
16532 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16533 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
16534 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
16535 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16536 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
16537 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
16538 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16539 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
16540 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
16541 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
16542 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16543 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16544 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
16545 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLX32rr),
16546 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16547 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16548 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16549 GIR_RootConstrainSelectedInstOperands,
16550 // GIR_Coverage, 16170,
16551 GIR_EraseRootFromParent_Done,
16552 // Label 1221: @41904
16553 GIM_Try, /*On fail goto*//*Label 1222*/ GIMT_Encode4(41979), // Rule ID 16202 //
16554 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
16555 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16556 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX32rr_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
16557 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16558 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
16559 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
16560 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16561 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
16562 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
16563 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16564 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
16565 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
16566 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
16567 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16568 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16569 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
16570 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLX32rr_EVEX),
16571 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16572 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16573 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16574 GIR_RootConstrainSelectedInstOperands,
16575 // GIR_Coverage, 16202,
16576 GIR_EraseRootFromParent_Done,
16577 // Label 1222: @41979
16578 GIM_Try, /*On fail goto*//*Label 1223*/ GIMT_Encode4(42017), // Rule ID 667 //
16579 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16580 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16581 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHL32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
16582 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16583 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16584 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16585 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL32rCL),
16586 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16587 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16588 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16589 GIR_RootConstrainSelectedInstOperands,
16590 // GIR_Coverage, 667,
16591 GIR_EraseRootFromParent_Done,
16592 // Label 1223: @42017
16593 GIM_Try, /*On fail goto*//*Label 1224*/ GIMT_Encode4(42055), // Rule ID 671 //
16594 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16595 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16596 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHL32rCL_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
16597 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16598 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16599 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16600 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL32rCL_ND),
16601 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16602 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16603 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16604 GIR_RootConstrainSelectedInstOperands,
16605 // GIR_Coverage, 671,
16606 GIR_EraseRootFromParent_Done,
16607 // Label 1224: @42055
16608 GIM_Reject,
16609 // Label 1216: @42056
16610 GIM_Reject,
16611 // Label 1200: @42057
16612 GIM_Try, /*On fail goto*//*Label 1225*/ GIMT_Encode4(42421),
16613 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
16614 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
16615 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
16616 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
16617 GIM_Try, /*On fail goto*//*Label 1226*/ GIMT_Encode4(42102), // Rule ID 21088 //
16618 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16619 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16620 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src1)
16621 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD64rr),
16622 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16623 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16624 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16625 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16626 GIR_RootConstrainSelectedInstOperands,
16627 // GIR_Coverage, 21088,
16628 GIR_EraseRootFromParent_Done,
16629 // Label 1226: @42102
16630 GIM_Try, /*On fail goto*//*Label 1227*/ GIMT_Encode4(42128), // Rule ID 21092 //
16631 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
16632 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
16633 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ADD64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src1)
16634 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD64rr_ND),
16635 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16636 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16637 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16638 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16639 GIR_RootConstrainSelectedInstOperands,
16640 // GIR_Coverage, 21092,
16641 GIR_EraseRootFromParent_Done,
16642 // Label 1227: @42128
16643 GIM_Try, /*On fail goto*//*Label 1228*/ GIMT_Encode4(42161), // Rule ID 652 //
16644 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16645 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16646 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16647 // MIs[1] Operand 1
16648 // No operand predicates
16649 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16650 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
16651 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL64ri),
16652 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16653 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16654 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16655 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16656 GIR_RootConstrainSelectedInstOperands,
16657 // GIR_Coverage, 652,
16658 GIR_EraseRootFromParent_Done,
16659 // Label 1228: @42161
16660 GIM_Try, /*On fail goto*//*Label 1229*/ GIMT_Encode4(42194), // Rule ID 656 //
16661 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16662 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16663 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16664 // MIs[1] Operand 1
16665 // No operand predicates
16666 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16667 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL64ri_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
16668 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL64ri_ND),
16669 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16670 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16671 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16672 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16673 GIR_RootConstrainSelectedInstOperands,
16674 // GIR_Coverage, 656,
16675 GIR_EraseRootFromParent_Done,
16676 // Label 1229: @42194
16677 GIM_Try, /*On fail goto*//*Label 1230*/ GIMT_Encode4(42269), // Rule ID 16171 //
16678 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
16679 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16680 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
16681 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
16682 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
16683 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
16684 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16685 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
16686 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
16687 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16688 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
16689 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
16690 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
16691 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
16692 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
16693 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
16694 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLX64rr),
16695 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16696 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16697 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16698 GIR_RootConstrainSelectedInstOperands,
16699 // GIR_Coverage, 16171,
16700 GIR_EraseRootFromParent_Done,
16701 // Label 1230: @42269
16702 GIM_Try, /*On fail goto*//*Label 1231*/ GIMT_Encode4(42344), // Rule ID 16203 //
16703 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
16704 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16705 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX64rr_EVEX:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
16706 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
16707 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
16708 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
16709 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16710 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
16711 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
16712 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16713 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
16714 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
16715 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
16716 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
16717 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
16718 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
16719 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLX64rr_EVEX),
16720 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16721 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16722 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16723 GIR_RootConstrainSelectedInstOperands,
16724 // GIR_Coverage, 16203,
16725 GIR_EraseRootFromParent_Done,
16726 // Label 1231: @42344
16727 GIM_Try, /*On fail goto*//*Label 1232*/ GIMT_Encode4(42382), // Rule ID 668 //
16728 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16729 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16730 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHL64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
16731 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16732 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16733 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16734 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL64rCL),
16735 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16736 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16737 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16738 GIR_RootConstrainSelectedInstOperands,
16739 // GIR_Coverage, 668,
16740 GIR_EraseRootFromParent_Done,
16741 // Label 1232: @42382
16742 GIM_Try, /*On fail goto*//*Label 1233*/ GIMT_Encode4(42420), // Rule ID 672 //
16743 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16744 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16745 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHL64rCL_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
16746 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16747 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16748 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16749 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHL64rCL_ND),
16750 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16751 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16752 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16753 GIR_RootConstrainSelectedInstOperands,
16754 // GIR_Coverage, 672,
16755 GIR_EraseRootFromParent_Done,
16756 // Label 1233: @42420
16757 GIM_Reject,
16758 // Label 1225: @42421
16759 GIM_Reject,
16760 // Label 1201: @42422
16761 GIM_Reject,
16762 // Label 19: @42423
16763 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(5), /*)*//*default:*//*Label 1238*/ GIMT_Encode4(43402),
16764 /*GILLT_s8*//*Label 1234*/ GIMT_Encode4(42450),
16765 /*GILLT_s16*//*Label 1235*/ GIMT_Encode4(42613),
16766 /*GILLT_s32*//*Label 1236*/ GIMT_Encode4(42776),
16767 /*GILLT_s64*//*Label 1237*/ GIMT_Encode4(43089),
16768 // Label 1234: @42450
16769 GIM_Try, /*On fail goto*//*Label 1239*/ GIMT_Encode4(42612),
16770 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
16771 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
16772 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16773 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16774 GIM_Try, /*On fail goto*//*Label 1240*/ GIMT_Encode4(42502), // Rule ID 681 //
16775 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16776 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16777 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16778 // MIs[1] Operand 1
16779 // No operand predicates
16780 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16781 // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
16782 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR8ri),
16783 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16784 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16785 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16786 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16787 GIR_RootConstrainSelectedInstOperands,
16788 // GIR_Coverage, 681,
16789 GIR_EraseRootFromParent_Done,
16790 // Label 1240: @42502
16791 GIM_Try, /*On fail goto*//*Label 1241*/ GIMT_Encode4(42535), // Rule ID 685 //
16792 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16793 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16794 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16795 // MIs[1] Operand 1
16796 // No operand predicates
16797 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16798 // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
16799 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR8ri_ND),
16800 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16801 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16802 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16803 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16804 GIR_RootConstrainSelectedInstOperands,
16805 // GIR_Coverage, 685,
16806 GIR_EraseRootFromParent_Done,
16807 // Label 1241: @42535
16808 GIM_Try, /*On fail goto*//*Label 1242*/ GIMT_Encode4(42573), // Rule ID 697 //
16809 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16810 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16811 // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
16812 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16813 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16814 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16815 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR8rCL),
16816 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16817 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16818 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16819 GIR_RootConstrainSelectedInstOperands,
16820 // GIR_Coverage, 697,
16821 GIR_EraseRootFromParent_Done,
16822 // Label 1242: @42573
16823 GIM_Try, /*On fail goto*//*Label 1243*/ GIMT_Encode4(42611), // Rule ID 701 //
16824 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16825 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16826 // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHR8rCL_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
16827 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16828 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16829 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16830 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR8rCL_ND),
16831 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16832 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16833 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16834 GIR_RootConstrainSelectedInstOperands,
16835 // GIR_Coverage, 701,
16836 GIR_EraseRootFromParent_Done,
16837 // Label 1243: @42611
16838 GIM_Reject,
16839 // Label 1239: @42612
16840 GIM_Reject,
16841 // Label 1235: @42613
16842 GIM_Try, /*On fail goto*//*Label 1244*/ GIMT_Encode4(42775),
16843 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
16844 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
16845 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
16846 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
16847 GIM_Try, /*On fail goto*//*Label 1245*/ GIMT_Encode4(42665), // Rule ID 682 //
16848 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16849 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16850 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16851 // MIs[1] Operand 1
16852 // No operand predicates
16853 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16854 // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
16855 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR16ri),
16856 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16857 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16858 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16859 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16860 GIR_RootConstrainSelectedInstOperands,
16861 // GIR_Coverage, 682,
16862 GIR_EraseRootFromParent_Done,
16863 // Label 1245: @42665
16864 GIM_Try, /*On fail goto*//*Label 1246*/ GIMT_Encode4(42698), // Rule ID 686 //
16865 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16866 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16867 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16868 // MIs[1] Operand 1
16869 // No operand predicates
16870 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16871 // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
16872 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR16ri_ND),
16873 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16874 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16875 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16876 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16877 GIR_RootConstrainSelectedInstOperands,
16878 // GIR_Coverage, 686,
16879 GIR_EraseRootFromParent_Done,
16880 // Label 1246: @42698
16881 GIM_Try, /*On fail goto*//*Label 1247*/ GIMT_Encode4(42736), // Rule ID 698 //
16882 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16883 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16884 // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
16885 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16886 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16887 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16888 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR16rCL),
16889 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16890 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16891 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16892 GIR_RootConstrainSelectedInstOperands,
16893 // GIR_Coverage, 698,
16894 GIR_EraseRootFromParent_Done,
16895 // Label 1247: @42736
16896 GIM_Try, /*On fail goto*//*Label 1248*/ GIMT_Encode4(42774), // Rule ID 702 //
16897 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16898 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
16899 // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHR16rCL_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
16900 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
16901 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
16902 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
16903 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR16rCL_ND),
16904 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16905 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16906 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16907 GIR_RootConstrainSelectedInstOperands,
16908 // GIR_Coverage, 702,
16909 GIR_EraseRootFromParent_Done,
16910 // Label 1248: @42774
16911 GIM_Reject,
16912 // Label 1244: @42775
16913 GIM_Reject,
16914 // Label 1236: @42776
16915 GIM_Try, /*On fail goto*//*Label 1249*/ GIMT_Encode4(43088),
16916 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
16917 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
16918 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
16919 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
16920 GIM_Try, /*On fail goto*//*Label 1250*/ GIMT_Encode4(42828), // Rule ID 683 //
16921 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
16922 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16923 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16924 // MIs[1] Operand 1
16925 // No operand predicates
16926 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16927 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
16928 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR32ri),
16929 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16930 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16931 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16932 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16933 GIR_RootConstrainSelectedInstOperands,
16934 // GIR_Coverage, 683,
16935 GIR_EraseRootFromParent_Done,
16936 // Label 1250: @42828
16937 GIM_Try, /*On fail goto*//*Label 1251*/ GIMT_Encode4(42861), // Rule ID 687 //
16938 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
16939 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16940 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16941 // MIs[1] Operand 1
16942 // No operand predicates
16943 GIM_CheckIsSafeToFold, /*NumInsns*/1,
16944 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
16945 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR32ri_ND),
16946 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16947 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16948 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
16949 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
16950 GIR_RootConstrainSelectedInstOperands,
16951 // GIR_Coverage, 687,
16952 GIR_EraseRootFromParent_Done,
16953 // Label 1251: @42861
16954 GIM_Try, /*On fail goto*//*Label 1252*/ GIMT_Encode4(42936), // Rule ID 16162 //
16955 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
16956 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16957 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
16958 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16959 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
16960 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
16961 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16962 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
16963 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
16964 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16965 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
16966 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
16967 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
16968 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16969 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16970 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
16971 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRX32rr),
16972 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16973 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16974 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16975 GIR_RootConstrainSelectedInstOperands,
16976 // GIR_Coverage, 16162,
16977 GIR_EraseRootFromParent_Done,
16978 // Label 1252: @42936
16979 GIM_Try, /*On fail goto*//*Label 1253*/ GIMT_Encode4(43011), // Rule ID 16194 //
16980 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
16981 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
16982 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX32rr_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
16983 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
16984 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
16985 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
16986 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16987 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
16988 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
16989 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
16990 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
16991 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
16992 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
16993 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16994 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
16995 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
16996 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRX32rr_EVEX),
16997 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16998 GIR_RootToRootCopy, /*OpIdx*/1, // src1
16999 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
17000 GIR_RootConstrainSelectedInstOperands,
17001 // GIR_Coverage, 16194,
17002 GIR_EraseRootFromParent_Done,
17003 // Label 1253: @43011
17004 GIM_Try, /*On fail goto*//*Label 1254*/ GIMT_Encode4(43049), // Rule ID 699 //
17005 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17006 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17007 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
17008 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17009 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17010 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17011 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR32rCL),
17012 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17013 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17014 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17015 GIR_RootConstrainSelectedInstOperands,
17016 // GIR_Coverage, 699,
17017 GIR_EraseRootFromParent_Done,
17018 // Label 1254: @43049
17019 GIM_Try, /*On fail goto*//*Label 1255*/ GIMT_Encode4(43087), // Rule ID 703 //
17020 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17021 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17022 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHR32rCL_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
17023 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17024 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17025 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17026 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR32rCL_ND),
17027 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17028 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17029 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17030 GIR_RootConstrainSelectedInstOperands,
17031 // GIR_Coverage, 703,
17032 GIR_EraseRootFromParent_Done,
17033 // Label 1255: @43087
17034 GIM_Reject,
17035 // Label 1249: @43088
17036 GIM_Reject,
17037 // Label 1237: @43089
17038 GIM_Try, /*On fail goto*//*Label 1256*/ GIMT_Encode4(43401),
17039 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
17040 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
17041 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17042 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17043 GIM_Try, /*On fail goto*//*Label 1257*/ GIMT_Encode4(43141), // Rule ID 684 //
17044 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17045 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17046 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17047 // MIs[1] Operand 1
17048 // No operand predicates
17049 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17050 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
17051 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR64ri),
17052 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17053 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17054 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17055 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17056 GIR_RootConstrainSelectedInstOperands,
17057 // GIR_Coverage, 684,
17058 GIR_EraseRootFromParent_Done,
17059 // Label 1257: @43141
17060 GIM_Try, /*On fail goto*//*Label 1258*/ GIMT_Encode4(43174), // Rule ID 688 //
17061 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17062 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17063 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17064 // MIs[1] Operand 1
17065 // No operand predicates
17066 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17067 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR64ri_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
17068 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR64ri_ND),
17069 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17070 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17071 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17072 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17073 GIR_RootConstrainSelectedInstOperands,
17074 // GIR_Coverage, 688,
17075 GIR_EraseRootFromParent_Done,
17076 // Label 1258: @43174
17077 GIM_Try, /*On fail goto*//*Label 1259*/ GIMT_Encode4(43249), // Rule ID 16163 //
17078 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
17079 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17080 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
17081 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
17082 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
17083 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
17084 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17085 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
17086 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
17087 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17088 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
17089 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
17090 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
17091 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17092 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17093 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
17094 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRX64rr),
17095 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17096 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17097 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
17098 GIR_RootConstrainSelectedInstOperands,
17099 // GIR_Coverage, 16163,
17100 GIR_EraseRootFromParent_Done,
17101 // Label 1259: @43249
17102 GIM_Try, /*On fail goto*//*Label 1260*/ GIMT_Encode4(43324), // Rule ID 16195 //
17103 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
17104 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17105 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX64rr_EVEX:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
17106 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
17107 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
17108 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
17109 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17110 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
17111 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
17112 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17113 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
17114 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
17115 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
17116 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17117 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17118 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
17119 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRX64rr_EVEX),
17120 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17121 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17122 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
17123 GIR_RootConstrainSelectedInstOperands,
17124 // GIR_Coverage, 16195,
17125 GIR_EraseRootFromParent_Done,
17126 // Label 1260: @43324
17127 GIM_Try, /*On fail goto*//*Label 1261*/ GIMT_Encode4(43362), // Rule ID 700 //
17128 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17129 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17130 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
17131 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17132 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17133 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17134 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR64rCL),
17135 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17136 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17137 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17138 GIR_RootConstrainSelectedInstOperands,
17139 // GIR_Coverage, 700,
17140 GIR_EraseRootFromParent_Done,
17141 // Label 1261: @43362
17142 GIM_Try, /*On fail goto*//*Label 1262*/ GIMT_Encode4(43400), // Rule ID 704 //
17143 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17144 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17145 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHR64rCL_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
17146 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17147 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17148 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17149 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHR64rCL_ND),
17150 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17151 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17152 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17153 GIR_RootConstrainSelectedInstOperands,
17154 // GIR_Coverage, 704,
17155 GIR_EraseRootFromParent_Done,
17156 // Label 1262: @43400
17157 GIM_Reject,
17158 // Label 1256: @43401
17159 GIM_Reject,
17160 // Label 1238: @43402
17161 GIM_Reject,
17162 // Label 20: @43403
17163 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(5), /*)*//*default:*//*Label 1267*/ GIMT_Encode4(44382),
17164 /*GILLT_s8*//*Label 1263*/ GIMT_Encode4(43430),
17165 /*GILLT_s16*//*Label 1264*/ GIMT_Encode4(43593),
17166 /*GILLT_s32*//*Label 1265*/ GIMT_Encode4(43756),
17167 /*GILLT_s64*//*Label 1266*/ GIMT_Encode4(44069),
17168 // Label 1263: @43430
17169 GIM_Try, /*On fail goto*//*Label 1268*/ GIMT_Encode4(43592),
17170 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
17171 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
17172 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17173 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17174 GIM_Try, /*On fail goto*//*Label 1269*/ GIMT_Encode4(43482), // Rule ID 713 //
17175 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17176 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17177 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17178 // MIs[1] Operand 1
17179 // No operand predicates
17180 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17181 // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
17182 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR8ri),
17183 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17184 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17185 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17186 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17187 GIR_RootConstrainSelectedInstOperands,
17188 // GIR_Coverage, 713,
17189 GIR_EraseRootFromParent_Done,
17190 // Label 1269: @43482
17191 GIM_Try, /*On fail goto*//*Label 1270*/ GIMT_Encode4(43515), // Rule ID 717 //
17192 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17193 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17194 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17195 // MIs[1] Operand 1
17196 // No operand predicates
17197 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17198 // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
17199 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR8ri_ND),
17200 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17201 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17202 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17203 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17204 GIR_RootConstrainSelectedInstOperands,
17205 // GIR_Coverage, 717,
17206 GIR_EraseRootFromParent_Done,
17207 // Label 1270: @43515
17208 GIM_Try, /*On fail goto*//*Label 1271*/ GIMT_Encode4(43553), // Rule ID 729 //
17209 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17210 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17211 // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SAR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
17212 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17213 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17214 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17215 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR8rCL),
17216 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17217 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17218 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17219 GIR_RootConstrainSelectedInstOperands,
17220 // GIR_Coverage, 729,
17221 GIR_EraseRootFromParent_Done,
17222 // Label 1271: @43553
17223 GIM_Try, /*On fail goto*//*Label 1272*/ GIMT_Encode4(43591), // Rule ID 733 //
17224 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17225 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17226 // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SAR8rCL_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
17227 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17228 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17229 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17230 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR8rCL_ND),
17231 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17232 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17233 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17234 GIR_RootConstrainSelectedInstOperands,
17235 // GIR_Coverage, 733,
17236 GIR_EraseRootFromParent_Done,
17237 // Label 1272: @43591
17238 GIM_Reject,
17239 // Label 1268: @43592
17240 GIM_Reject,
17241 // Label 1264: @43593
17242 GIM_Try, /*On fail goto*//*Label 1273*/ GIMT_Encode4(43755),
17243 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
17244 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
17245 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
17246 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
17247 GIM_Try, /*On fail goto*//*Label 1274*/ GIMT_Encode4(43645), // Rule ID 714 //
17248 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17249 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17250 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17251 // MIs[1] Operand 1
17252 // No operand predicates
17253 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17254 // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
17255 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR16ri),
17256 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17257 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17258 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17259 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17260 GIR_RootConstrainSelectedInstOperands,
17261 // GIR_Coverage, 714,
17262 GIR_EraseRootFromParent_Done,
17263 // Label 1274: @43645
17264 GIM_Try, /*On fail goto*//*Label 1275*/ GIMT_Encode4(43678), // Rule ID 718 //
17265 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17266 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17267 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17268 // MIs[1] Operand 1
17269 // No operand predicates
17270 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17271 // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
17272 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR16ri_ND),
17273 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17274 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17275 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17276 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17277 GIR_RootConstrainSelectedInstOperands,
17278 // GIR_Coverage, 718,
17279 GIR_EraseRootFromParent_Done,
17280 // Label 1275: @43678
17281 GIM_Try, /*On fail goto*//*Label 1276*/ GIMT_Encode4(43716), // Rule ID 730 //
17282 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17283 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17284 // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SAR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
17285 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17286 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17287 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17288 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR16rCL),
17289 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17290 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17291 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17292 GIR_RootConstrainSelectedInstOperands,
17293 // GIR_Coverage, 730,
17294 GIR_EraseRootFromParent_Done,
17295 // Label 1276: @43716
17296 GIM_Try, /*On fail goto*//*Label 1277*/ GIMT_Encode4(43754), // Rule ID 734 //
17297 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17298 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17299 // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SAR16rCL_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
17300 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17301 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17302 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17303 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR16rCL_ND),
17304 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17305 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17306 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17307 GIR_RootConstrainSelectedInstOperands,
17308 // GIR_Coverage, 734,
17309 GIR_EraseRootFromParent_Done,
17310 // Label 1277: @43754
17311 GIM_Reject,
17312 // Label 1273: @43755
17313 GIM_Reject,
17314 // Label 1265: @43756
17315 GIM_Try, /*On fail goto*//*Label 1278*/ GIMT_Encode4(44068),
17316 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
17317 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
17318 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17319 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17320 GIM_Try, /*On fail goto*//*Label 1279*/ GIMT_Encode4(43808), // Rule ID 715 //
17321 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17322 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17323 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17324 // MIs[1] Operand 1
17325 // No operand predicates
17326 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17327 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
17328 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR32ri),
17329 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17330 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17331 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17332 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17333 GIR_RootConstrainSelectedInstOperands,
17334 // GIR_Coverage, 715,
17335 GIR_EraseRootFromParent_Done,
17336 // Label 1279: @43808
17337 GIM_Try, /*On fail goto*//*Label 1280*/ GIMT_Encode4(43841), // Rule ID 719 //
17338 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17339 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17340 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17341 // MIs[1] Operand 1
17342 // No operand predicates
17343 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17344 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
17345 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR32ri_ND),
17346 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17347 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17348 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17349 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17350 GIR_RootConstrainSelectedInstOperands,
17351 // GIR_Coverage, 719,
17352 GIR_EraseRootFromParent_Done,
17353 // Label 1280: @43841
17354 GIM_Try, /*On fail goto*//*Label 1281*/ GIMT_Encode4(43916), // Rule ID 16154 //
17355 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
17356 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17357 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
17358 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
17359 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
17360 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
17361 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17362 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
17363 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
17364 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17365 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
17366 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
17367 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
17368 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
17369 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
17370 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
17371 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SARX32rr),
17372 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17373 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17374 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
17375 GIR_RootConstrainSelectedInstOperands,
17376 // GIR_Coverage, 16154,
17377 GIR_EraseRootFromParent_Done,
17378 // Label 1281: @43916
17379 GIM_Try, /*On fail goto*//*Label 1282*/ GIMT_Encode4(43991), // Rule ID 16186 //
17380 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
17381 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17382 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX32rr_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
17383 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
17384 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32,
17385 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
17386 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17387 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
17388 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
17389 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17390 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
17391 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
17392 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
17393 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
17394 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID),
17395 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
17396 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SARX32rr_EVEX),
17397 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17398 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17399 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
17400 GIR_RootConstrainSelectedInstOperands,
17401 // GIR_Coverage, 16186,
17402 GIR_EraseRootFromParent_Done,
17403 // Label 1282: @43991
17404 GIM_Try, /*On fail goto*//*Label 1283*/ GIMT_Encode4(44029), // Rule ID 731 //
17405 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17406 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17407 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SAR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
17408 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17409 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17410 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17411 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR32rCL),
17412 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17413 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17414 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17415 GIR_RootConstrainSelectedInstOperands,
17416 // GIR_Coverage, 731,
17417 GIR_EraseRootFromParent_Done,
17418 // Label 1283: @44029
17419 GIM_Try, /*On fail goto*//*Label 1284*/ GIMT_Encode4(44067), // Rule ID 735 //
17420 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17421 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17422 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SAR32rCL_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
17423 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17424 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17425 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17426 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR32rCL_ND),
17427 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17428 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17429 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17430 GIR_RootConstrainSelectedInstOperands,
17431 // GIR_Coverage, 735,
17432 GIR_EraseRootFromParent_Done,
17433 // Label 1284: @44067
17434 GIM_Reject,
17435 // Label 1278: @44068
17436 GIM_Reject,
17437 // Label 1266: @44069
17438 GIM_Try, /*On fail goto*//*Label 1285*/ GIMT_Encode4(44381),
17439 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
17440 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
17441 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17442 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17443 GIM_Try, /*On fail goto*//*Label 1286*/ GIMT_Encode4(44121), // Rule ID 716 //
17444 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17445 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17446 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17447 // MIs[1] Operand 1
17448 // No operand predicates
17449 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17450 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
17451 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR64ri),
17452 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17453 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17454 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17455 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17456 GIR_RootConstrainSelectedInstOperands,
17457 // GIR_Coverage, 716,
17458 GIR_EraseRootFromParent_Done,
17459 // Label 1286: @44121
17460 GIM_Try, /*On fail goto*//*Label 1287*/ GIMT_Encode4(44154), // Rule ID 720 //
17461 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17462 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17463 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17464 // MIs[1] Operand 1
17465 // No operand predicates
17466 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17467 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR64ri_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
17468 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR64ri_ND),
17469 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17470 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17471 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17472 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17473 GIR_RootConstrainSelectedInstOperands,
17474 // GIR_Coverage, 720,
17475 GIR_EraseRootFromParent_Done,
17476 // Label 1287: @44154
17477 GIM_Try, /*On fail goto*//*Label 1288*/ GIMT_Encode4(44229), // Rule ID 16155 //
17478 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
17479 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17480 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
17481 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
17482 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
17483 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
17484 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17485 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
17486 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
17487 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17488 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
17489 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
17490 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
17491 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17492 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17493 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
17494 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SARX64rr),
17495 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17496 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17497 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
17498 GIR_RootConstrainSelectedInstOperands,
17499 // GIR_Coverage, 16155,
17500 GIR_EraseRootFromParent_Done,
17501 // Label 1288: @44229
17502 GIM_Try, /*On fail goto*//*Label 1289*/ GIMT_Encode4(44304), // Rule ID 16187 //
17503 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
17504 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17505 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX64rr_EVEX:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] }))
17506 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
17507 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64,
17508 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
17509 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17510 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
17511 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
17512 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
17513 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
17514 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2
17515 GIR_AddImm8, /*InsnID*/1, /*Imm*/1,
17516 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17517 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID),
17518 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID),
17519 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SARX64rr_EVEX),
17520 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17521 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17522 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
17523 GIR_RootConstrainSelectedInstOperands,
17524 // GIR_Coverage, 16187,
17525 GIR_EraseRootFromParent_Done,
17526 // Label 1289: @44304
17527 GIM_Try, /*On fail goto*//*Label 1290*/ GIMT_Encode4(44342), // Rule ID 732 //
17528 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17529 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17530 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SAR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
17531 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17532 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17533 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17534 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR64rCL),
17535 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17536 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17537 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17538 GIR_RootConstrainSelectedInstOperands,
17539 // GIR_Coverage, 732,
17540 GIR_EraseRootFromParent_Done,
17541 // Label 1290: @44342
17542 GIM_Try, /*On fail goto*//*Label 1291*/ GIMT_Encode4(44380), // Rule ID 736 //
17543 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17544 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17545 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SAR64rCL_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
17546 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17547 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17548 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17549 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SAR64rCL_ND),
17550 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17551 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17552 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17553 GIR_RootConstrainSelectedInstOperands,
17554 // GIR_Coverage, 736,
17555 GIR_EraseRootFromParent_Done,
17556 // Label 1291: @44380
17557 GIM_Reject,
17558 // Label 1285: @44381
17559 GIM_Reject,
17560 // Label 1267: @44382
17561 GIM_Reject,
17562 // Label 21: @44383
17563 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(5), /*)*//*default:*//*Label 1294*/ GIMT_Encode4(44758),
17564 /*GILLT_s32*//*Label 1292*/ GIMT_Encode4(44402),
17565 /*GILLT_s64*//*Label 1293*/ GIMT_Encode4(44580),
17566 // Label 1292: @44402
17567 GIM_Try, /*On fail goto*//*Label 1295*/ GIMT_Encode4(44579),
17568 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
17569 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
17570 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8,
17571 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17572 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17573 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17574 GIM_Try, /*On fail goto*//*Label 1296*/ GIMT_Encode4(44463), // Rule ID 810 //
17575 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17576 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17577 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17578 // MIs[1] Operand 1
17579 // No operand predicates
17580 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17581 // (fshl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3) => (SHLD32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3)
17582 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD32rri8),
17583 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17584 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17585 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17586 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17587 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17588 GIR_RootConstrainSelectedInstOperands,
17589 // GIR_Coverage, 810,
17590 GIR_EraseRootFromParent_Done,
17591 // Label 1296: @44463
17592 GIM_Try, /*On fail goto*//*Label 1297*/ GIMT_Encode4(44498), // Rule ID 816 //
17593 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17594 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17595 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17596 // MIs[1] Operand 1
17597 // No operand predicates
17598 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17599 // (fshl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3) => (SHLD32rri8_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3)
17600 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD32rri8_ND),
17601 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17602 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17603 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17604 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17605 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17606 GIR_RootConstrainSelectedInstOperands,
17607 // GIR_Coverage, 816,
17608 GIR_EraseRootFromParent_Done,
17609 // Label 1297: @44498
17610 GIM_Try, /*On fail goto*//*Label 1298*/ GIMT_Encode4(44538), // Rule ID 813 //
17611 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17612 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17613 // (fshl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, CL:{ *:[i8] }) => (SHLD32rrCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
17614 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17615 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17616 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17617 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD32rrCL),
17618 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17619 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17620 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17621 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17622 GIR_RootConstrainSelectedInstOperands,
17623 // GIR_Coverage, 813,
17624 GIR_EraseRootFromParent_Done,
17625 // Label 1298: @44538
17626 GIM_Try, /*On fail goto*//*Label 1299*/ GIMT_Encode4(44578), // Rule ID 819 //
17627 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17628 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17629 // (fshl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, CL:{ *:[i8] }) => (SHLD32rrCL_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
17630 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17631 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17632 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17633 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD32rrCL_ND),
17634 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17635 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17636 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17637 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17638 GIR_RootConstrainSelectedInstOperands,
17639 // GIR_Coverage, 819,
17640 GIR_EraseRootFromParent_Done,
17641 // Label 1299: @44578
17642 GIM_Reject,
17643 // Label 1295: @44579
17644 GIM_Reject,
17645 // Label 1293: @44580
17646 GIM_Try, /*On fail goto*//*Label 1300*/ GIMT_Encode4(44757),
17647 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
17648 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
17649 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8,
17650 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17651 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17652 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17653 GIM_Try, /*On fail goto*//*Label 1301*/ GIMT_Encode4(44641), // Rule ID 811 //
17654 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17655 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17656 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17657 // MIs[1] Operand 1
17658 // No operand predicates
17659 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17660 // (fshl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3) => (SHLD64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3)
17661 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD64rri8),
17662 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17663 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17664 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17665 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17666 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17667 GIR_RootConstrainSelectedInstOperands,
17668 // GIR_Coverage, 811,
17669 GIR_EraseRootFromParent_Done,
17670 // Label 1301: @44641
17671 GIM_Try, /*On fail goto*//*Label 1302*/ GIMT_Encode4(44676), // Rule ID 817 //
17672 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17673 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17674 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17675 // MIs[1] Operand 1
17676 // No operand predicates
17677 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17678 // (fshl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3) => (SHLD64rri8_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3)
17679 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD64rri8_ND),
17680 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17681 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17682 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17683 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17684 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17685 GIR_RootConstrainSelectedInstOperands,
17686 // GIR_Coverage, 817,
17687 GIR_EraseRootFromParent_Done,
17688 // Label 1302: @44676
17689 GIM_Try, /*On fail goto*//*Label 1303*/ GIMT_Encode4(44716), // Rule ID 814 //
17690 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17691 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17692 // (fshl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, CL:{ *:[i8] }) => (SHLD64rrCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
17693 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17694 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17695 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17696 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD64rrCL),
17697 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17698 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17699 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17700 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17701 GIR_RootConstrainSelectedInstOperands,
17702 // GIR_Coverage, 814,
17703 GIR_EraseRootFromParent_Done,
17704 // Label 1303: @44716
17705 GIM_Try, /*On fail goto*//*Label 1304*/ GIMT_Encode4(44756), // Rule ID 820 //
17706 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17707 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17708 // (fshl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, CL:{ *:[i8] }) => (SHLD64rrCL_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
17709 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17710 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17711 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17712 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLD64rrCL_ND),
17713 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17714 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17715 GIR_RootToRootCopy, /*OpIdx*/2, // src2
17716 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17717 GIR_RootConstrainSelectedInstOperands,
17718 // GIR_Coverage, 820,
17719 GIR_EraseRootFromParent_Done,
17720 // Label 1304: @44756
17721 GIM_Reject,
17722 // Label 1300: @44757
17723 GIM_Reject,
17724 // Label 1294: @44758
17725 GIM_Reject,
17726 // Label 22: @44759
17727 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(5), /*)*//*default:*//*Label 1307*/ GIMT_Encode4(45134),
17728 /*GILLT_s32*//*Label 1305*/ GIMT_Encode4(44778),
17729 /*GILLT_s64*//*Label 1306*/ GIMT_Encode4(44956),
17730 // Label 1305: @44778
17731 GIM_Try, /*On fail goto*//*Label 1308*/ GIMT_Encode4(44955),
17732 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
17733 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
17734 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8,
17735 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17736 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17737 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
17738 GIM_Try, /*On fail goto*//*Label 1309*/ GIMT_Encode4(44839), // Rule ID 834 //
17739 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17740 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17741 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17742 // MIs[1] Operand 1
17743 // No operand predicates
17744 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17745 // (fshr:{ *:[i32] } GR32:{ *:[i32] }:$src2, GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src3) => (SHRD32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3)
17746 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD32rri8),
17747 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17748 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17749 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17750 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17751 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17752 GIR_RootConstrainSelectedInstOperands,
17753 // GIR_Coverage, 834,
17754 GIR_EraseRootFromParent_Done,
17755 // Label 1309: @44839
17756 GIM_Try, /*On fail goto*//*Label 1310*/ GIMT_Encode4(44874), // Rule ID 840 //
17757 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17758 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17759 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17760 // MIs[1] Operand 1
17761 // No operand predicates
17762 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17763 // (fshr:{ *:[i32] } GR32:{ *:[i32] }:$src2, GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src3) => (SHRD32rri8_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3)
17764 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD32rri8_ND),
17765 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17766 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17767 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17768 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17769 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17770 GIR_RootConstrainSelectedInstOperands,
17771 // GIR_Coverage, 840,
17772 GIR_EraseRootFromParent_Done,
17773 // Label 1310: @44874
17774 GIM_Try, /*On fail goto*//*Label 1311*/ GIMT_Encode4(44914), // Rule ID 837 //
17775 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17776 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17777 // (fshr:{ *:[i32] } GR32:{ *:[i32] }:$src2, GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHRD32rrCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
17778 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17779 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17780 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17781 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD32rrCL),
17782 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17783 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17784 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17785 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17786 GIR_RootConstrainSelectedInstOperands,
17787 // GIR_Coverage, 837,
17788 GIR_EraseRootFromParent_Done,
17789 // Label 1311: @44914
17790 GIM_Try, /*On fail goto*//*Label 1312*/ GIMT_Encode4(44954), // Rule ID 843 //
17791 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17792 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17793 // (fshr:{ *:[i32] } GR32:{ *:[i32] }:$src2, GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHRD32rrCL_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
17794 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17795 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17796 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17797 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD32rrCL_ND),
17798 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17799 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17800 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17801 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17802 GIR_RootConstrainSelectedInstOperands,
17803 // GIR_Coverage, 843,
17804 GIR_EraseRootFromParent_Done,
17805 // Label 1312: @44954
17806 GIM_Reject,
17807 // Label 1308: @44955
17808 GIM_Reject,
17809 // Label 1306: @44956
17810 GIM_Try, /*On fail goto*//*Label 1313*/ GIMT_Encode4(45133),
17811 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
17812 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
17813 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8,
17814 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17815 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17816 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
17817 GIM_Try, /*On fail goto*//*Label 1314*/ GIMT_Encode4(45017), // Rule ID 835 //
17818 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17819 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17820 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17821 // MIs[1] Operand 1
17822 // No operand predicates
17823 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17824 // (fshr:{ *:[i64] } GR64:{ *:[i64] }:$src2, GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src3) => (SHRD64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3)
17825 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD64rri8),
17826 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17827 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17828 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17829 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17830 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17831 GIR_RootConstrainSelectedInstOperands,
17832 // GIR_Coverage, 835,
17833 GIR_EraseRootFromParent_Done,
17834 // Label 1314: @45017
17835 GIM_Try, /*On fail goto*//*Label 1315*/ GIMT_Encode4(45052), // Rule ID 841 //
17836 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17837 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17838 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17839 // MIs[1] Operand 1
17840 // No operand predicates
17841 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17842 // (fshr:{ *:[i64] } GR64:{ *:[i64] }:$src2, GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src3) => (SHRD64rri8_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3)
17843 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD64rri8_ND),
17844 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17845 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17846 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17847 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
17848 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17849 GIR_RootConstrainSelectedInstOperands,
17850 // GIR_Coverage, 841,
17851 GIR_EraseRootFromParent_Done,
17852 // Label 1315: @45052
17853 GIM_Try, /*On fail goto*//*Label 1316*/ GIMT_Encode4(45092), // Rule ID 838 //
17854 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17855 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17856 // (fshr:{ *:[i64] } GR64:{ *:[i64] }:$src2, GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHRD64rrCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
17857 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17858 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17859 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17860 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD64rrCL),
17861 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17862 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17863 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17864 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17865 GIR_RootConstrainSelectedInstOperands,
17866 // GIR_Coverage, 838,
17867 GIR_EraseRootFromParent_Done,
17868 // Label 1316: @45092
17869 GIM_Try, /*On fail goto*//*Label 1317*/ GIMT_Encode4(45132), // Rule ID 844 //
17870 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17871 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17872 // (fshr:{ *:[i64] } GR64:{ *:[i64] }:$src2, GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHRD64rrCL_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
17873 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17874 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17875 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL
17876 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRD64rrCL_ND),
17877 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17878 GIR_RootToRootCopy, /*OpIdx*/2, // src1
17879 GIR_RootToRootCopy, /*OpIdx*/1, // src2
17880 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17881 GIR_RootConstrainSelectedInstOperands,
17882 // GIR_Coverage, 844,
17883 GIR_EraseRootFromParent_Done,
17884 // Label 1317: @45132
17885 GIM_Reject,
17886 // Label 1313: @45133
17887 GIM_Reject,
17888 // Label 1307: @45134
17889 GIM_Reject,
17890 // Label 23: @45135
17891 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(20), /*)*//*default:*//*Label 1328*/ GIMT_Encode4(47140),
17892 /*GILLT_s8*//*Label 1318*/ GIMT_Encode4(45222),
17893 /*GILLT_s16*//*Label 1319*/ GIMT_Encode4(45433),
17894 /*GILLT_s32*//*Label 1320*/ GIMT_Encode4(45644),
17895 /*GILLT_s64*//*Label 1321*/ GIMT_Encode4(45948), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17896 /*GILLT_v2s64*//*Label 1322*/ GIMT_Encode4(46252), GIMT_Encode4(0),
17897 /*GILLT_v4s32*//*Label 1323*/ GIMT_Encode4(46457),
17898 /*GILLT_v4s64*//*Label 1324*/ GIMT_Encode4(46662), GIMT_Encode4(0), GIMT_Encode4(0),
17899 /*GILLT_v8s32*//*Label 1325*/ GIMT_Encode4(46867),
17900 /*GILLT_v8s64*//*Label 1326*/ GIMT_Encode4(47072), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17901 /*GILLT_v16s32*//*Label 1327*/ GIMT_Encode4(47106),
17902 // Label 1318: @45222
17903 GIM_Try, /*On fail goto*//*Label 1329*/ GIMT_Encode4(45432),
17904 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
17905 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
17906 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17907 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
17908 GIM_Try, /*On fail goto*//*Label 1330*/ GIMT_Encode4(45265), // Rule ID 16102 //
17909 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17910 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 7,
17911 // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, 7:{ *:[i8] }) => (ROL8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
17912 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL8r1),
17913 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17914 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17915 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17916 GIR_RootConstrainSelectedInstOperands,
17917 // GIR_Coverage, 16102,
17918 GIR_EraseRootFromParent_Done,
17919 // Label 1330: @45265
17920 GIM_Try, /*On fail goto*//*Label 1331*/ GIMT_Encode4(45289), // Rule ID 16110 //
17921 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
17922 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 7,
17923 // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, 7:{ *:[i8] }) => (ROL8r1_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
17924 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL8r1_ND),
17925 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17926 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17927 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17928 GIR_RootConstrainSelectedInstOperands,
17929 // GIR_Coverage, 16110,
17930 GIR_EraseRootFromParent_Done,
17931 // Label 1331: @45289
17932 GIM_Try, /*On fail goto*//*Label 1332*/ GIMT_Encode4(45322), // Rule ID 777 //
17933 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17934 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17935 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17936 // MIs[1] Operand 1
17937 // No operand predicates
17938 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17939 // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
17940 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR8ri),
17941 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17942 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17943 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17944 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17945 GIR_RootConstrainSelectedInstOperands,
17946 // GIR_Coverage, 777,
17947 GIR_EraseRootFromParent_Done,
17948 // Label 1332: @45322
17949 GIM_Try, /*On fail goto*//*Label 1333*/ GIMT_Encode4(45355), // Rule ID 781 //
17950 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17951 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17952 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17953 // MIs[1] Operand 1
17954 // No operand predicates
17955 GIM_CheckIsSafeToFold, /*NumInsns*/1,
17956 // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
17957 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR8ri_ND),
17958 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17959 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17960 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
17961 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17962 GIR_RootConstrainSelectedInstOperands,
17963 // GIR_Coverage, 781,
17964 GIR_EraseRootFromParent_Done,
17965 // Label 1333: @45355
17966 GIM_Try, /*On fail goto*//*Label 1334*/ GIMT_Encode4(45393), // Rule ID 793 //
17967 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
17968 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17969 // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (ROR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
17970 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17971 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17972 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17973 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR8rCL),
17974 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17975 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17976 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17977 GIR_RootConstrainSelectedInstOperands,
17978 // GIR_Coverage, 793,
17979 GIR_EraseRootFromParent_Done,
17980 // Label 1334: @45393
17981 GIM_Try, /*On fail goto*//*Label 1335*/ GIMT_Encode4(45431), // Rule ID 797 //
17982 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
17983 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
17984 // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (ROR8rCL_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
17985 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
17986 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
17987 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
17988 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR8rCL_ND),
17989 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17990 GIR_RootToRootCopy, /*OpIdx*/1, // src1
17991 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
17992 GIR_RootConstrainSelectedInstOperands,
17993 // GIR_Coverage, 797,
17994 GIR_EraseRootFromParent_Done,
17995 // Label 1335: @45431
17996 GIM_Reject,
17997 // Label 1329: @45432
17998 GIM_Reject,
17999 // Label 1319: @45433
18000 GIM_Try, /*On fail goto*//*Label 1336*/ GIMT_Encode4(45643),
18001 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
18002 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
18003 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
18004 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
18005 GIM_Try, /*On fail goto*//*Label 1337*/ GIMT_Encode4(45476), // Rule ID 16103 //
18006 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18007 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 15,
18008 // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, 15:{ *:[i8] }) => (ROL16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18009 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL16r1),
18010 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18011 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18012 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18013 GIR_RootConstrainSelectedInstOperands,
18014 // GIR_Coverage, 16103,
18015 GIR_EraseRootFromParent_Done,
18016 // Label 1337: @45476
18017 GIM_Try, /*On fail goto*//*Label 1338*/ GIMT_Encode4(45500), // Rule ID 16111 //
18018 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
18019 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 15,
18020 // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, 15:{ *:[i8] }) => (ROL16r1_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18021 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL16r1_ND),
18022 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18023 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18024 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18025 GIR_RootConstrainSelectedInstOperands,
18026 // GIR_Coverage, 16111,
18027 GIR_EraseRootFromParent_Done,
18028 // Label 1338: @45500
18029 GIM_Try, /*On fail goto*//*Label 1339*/ GIMT_Encode4(45533), // Rule ID 778 //
18030 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18031 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18032 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18033 // MIs[1] Operand 1
18034 // No operand predicates
18035 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18036 // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
18037 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR16ri),
18038 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18039 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18040 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18041 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18042 GIR_RootConstrainSelectedInstOperands,
18043 // GIR_Coverage, 778,
18044 GIR_EraseRootFromParent_Done,
18045 // Label 1339: @45533
18046 GIM_Try, /*On fail goto*//*Label 1340*/ GIMT_Encode4(45566), // Rule ID 782 //
18047 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18048 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18049 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18050 // MIs[1] Operand 1
18051 // No operand predicates
18052 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18053 // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
18054 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR16ri_ND),
18055 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18056 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18057 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18058 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18059 GIR_RootConstrainSelectedInstOperands,
18060 // GIR_Coverage, 782,
18061 GIR_EraseRootFromParent_Done,
18062 // Label 1340: @45566
18063 GIM_Try, /*On fail goto*//*Label 1341*/ GIMT_Encode4(45604), // Rule ID 794 //
18064 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18065 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18066 // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (ROR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18067 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18068 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18069 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18070 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR16rCL),
18071 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18072 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18073 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18074 GIR_RootConstrainSelectedInstOperands,
18075 // GIR_Coverage, 794,
18076 GIR_EraseRootFromParent_Done,
18077 // Label 1341: @45604
18078 GIM_Try, /*On fail goto*//*Label 1342*/ GIMT_Encode4(45642), // Rule ID 798 //
18079 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18080 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18081 // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (ROR16rCL_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18082 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18083 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18084 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18085 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR16rCL_ND),
18086 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18087 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18088 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18089 GIR_RootConstrainSelectedInstOperands,
18090 // GIR_Coverage, 798,
18091 GIR_EraseRootFromParent_Done,
18092 // Label 1342: @45642
18093 GIM_Reject,
18094 // Label 1336: @45643
18095 GIM_Reject,
18096 // Label 1320: @45644
18097 GIM_Try, /*On fail goto*//*Label 1343*/ GIMT_Encode4(45947),
18098 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
18099 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
18100 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
18101 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
18102 GIM_Try, /*On fail goto*//*Label 1344*/ GIMT_Encode4(45693), // Rule ID 16146 //
18103 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
18104 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18105 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18106 // MIs[1] Operand 1
18107 // No operand predicates
18108 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18109 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src, (imm:{ *:[i8] }):$shamt) => (RORX32ri:{ *:[i32] } GR32:{ *:[i32] }:$src, (imm:{ *:[i8] }):$shamt)
18110 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RORX32ri),
18111 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18112 GIR_RootToRootCopy, /*OpIdx*/1, // src
18113 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
18114 GIR_RootConstrainSelectedInstOperands,
18115 // GIR_Coverage, 16146,
18116 GIR_EraseRootFromParent_Done,
18117 // Label 1344: @45693
18118 GIM_Try, /*On fail goto*//*Label 1345*/ GIMT_Encode4(45723), // Rule ID 16178 //
18119 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
18120 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18121 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18122 // MIs[1] Operand 1
18123 // No operand predicates
18124 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18125 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src, (imm:{ *:[i8] }):$shamt) => (RORX32ri_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src, (imm:{ *:[i8] }):$shamt)
18126 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RORX32ri_EVEX),
18127 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18128 GIR_RootToRootCopy, /*OpIdx*/1, // src
18129 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
18130 GIR_RootConstrainSelectedInstOperands,
18131 // GIR_Coverage, 16178,
18132 GIR_EraseRootFromParent_Done,
18133 // Label 1345: @45723
18134 GIM_Try, /*On fail goto*//*Label 1346*/ GIMT_Encode4(45756), // Rule ID 859 //
18135 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFastSHLDRotate),
18136 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18137 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18138 // MIs[1] Operand 1
18139 // No operand predicates
18140 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18141 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHRDROT32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt)
18142 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRDROT32ri),
18143 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18144 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18145 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
18146 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18147 GIR_RootConstrainSelectedInstOperands,
18148 // GIR_Coverage, 859,
18149 GIR_EraseRootFromParent_Done,
18150 // Label 1346: @45756
18151 GIM_Try, /*On fail goto*//*Label 1347*/ GIMT_Encode4(45780), // Rule ID 16104 //
18152 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18153 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 31,
18154 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, 31:{ *:[i8] }) => (ROL32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18155 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL32r1),
18156 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18157 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18158 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18159 GIR_RootConstrainSelectedInstOperands,
18160 // GIR_Coverage, 16104,
18161 GIR_EraseRootFromParent_Done,
18162 // Label 1347: @45780
18163 GIM_Try, /*On fail goto*//*Label 1348*/ GIMT_Encode4(45804), // Rule ID 16112 //
18164 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
18165 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 31,
18166 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, 31:{ *:[i8] }) => (ROL32r1_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18167 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL32r1_ND),
18168 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18169 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18170 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18171 GIR_RootConstrainSelectedInstOperands,
18172 // GIR_Coverage, 16112,
18173 GIR_EraseRootFromParent_Done,
18174 // Label 1348: @45804
18175 GIM_Try, /*On fail goto*//*Label 1349*/ GIMT_Encode4(45837), // Rule ID 779 //
18176 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18177 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18178 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18179 // MIs[1] Operand 1
18180 // No operand predicates
18181 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18182 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
18183 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR32ri),
18184 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18185 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18186 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18187 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18188 GIR_RootConstrainSelectedInstOperands,
18189 // GIR_Coverage, 779,
18190 GIR_EraseRootFromParent_Done,
18191 // Label 1349: @45837
18192 GIM_Try, /*On fail goto*//*Label 1350*/ GIMT_Encode4(45870), // Rule ID 783 //
18193 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18194 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18195 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18196 // MIs[1] Operand 1
18197 // No operand predicates
18198 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18199 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
18200 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR32ri_ND),
18201 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18202 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18203 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18204 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18205 GIR_RootConstrainSelectedInstOperands,
18206 // GIR_Coverage, 783,
18207 GIR_EraseRootFromParent_Done,
18208 // Label 1350: @45870
18209 GIM_Try, /*On fail goto*//*Label 1351*/ GIMT_Encode4(45908), // Rule ID 795 //
18210 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18211 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18212 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (ROR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18213 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18214 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18215 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18216 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR32rCL),
18217 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18218 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18219 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18220 GIR_RootConstrainSelectedInstOperands,
18221 // GIR_Coverage, 795,
18222 GIR_EraseRootFromParent_Done,
18223 // Label 1351: @45908
18224 GIM_Try, /*On fail goto*//*Label 1352*/ GIMT_Encode4(45946), // Rule ID 799 //
18225 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18226 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18227 // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (ROR32rCL_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18228 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18229 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18230 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18231 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR32rCL_ND),
18232 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18233 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18234 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18235 GIR_RootConstrainSelectedInstOperands,
18236 // GIR_Coverage, 799,
18237 GIR_EraseRootFromParent_Done,
18238 // Label 1352: @45946
18239 GIM_Reject,
18240 // Label 1343: @45947
18241 GIM_Reject,
18242 // Label 1321: @45948
18243 GIM_Try, /*On fail goto*//*Label 1353*/ GIMT_Encode4(46251),
18244 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
18245 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
18246 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
18247 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
18248 GIM_Try, /*On fail goto*//*Label 1354*/ GIMT_Encode4(45997), // Rule ID 16147 //
18249 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_NoEGPR),
18250 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18251 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18252 // MIs[1] Operand 1
18253 // No operand predicates
18254 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18255 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src, (imm:{ *:[i8] }):$shamt) => (RORX64ri:{ *:[i64] } GR64:{ *:[i64] }:$src, (imm:{ *:[i8] }):$shamt)
18256 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RORX64ri),
18257 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18258 GIR_RootToRootCopy, /*OpIdx*/1, // src
18259 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
18260 GIR_RootConstrainSelectedInstOperands,
18261 // GIR_Coverage, 16147,
18262 GIR_EraseRootFromParent_Done,
18263 // Label 1354: @45997
18264 GIM_Try, /*On fail goto*//*Label 1355*/ GIMT_Encode4(46027), // Rule ID 16179 //
18265 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI2_HasEGPR),
18266 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18267 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18268 // MIs[1] Operand 1
18269 // No operand predicates
18270 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18271 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src, (imm:{ *:[i8] }):$shamt) => (RORX64ri_EVEX:{ *:[i64] } GR64:{ *:[i64] }:$src, (imm:{ *:[i8] }):$shamt)
18272 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RORX64ri_EVEX),
18273 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18274 GIR_RootToRootCopy, /*OpIdx*/1, // src
18275 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
18276 GIR_RootConstrainSelectedInstOperands,
18277 // GIR_Coverage, 16179,
18278 GIR_EraseRootFromParent_Done,
18279 // Label 1355: @46027
18280 GIM_Try, /*On fail goto*//*Label 1356*/ GIMT_Encode4(46060), // Rule ID 860 //
18281 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFastSHLDRotate),
18282 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18283 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18284 // MIs[1] Operand 1
18285 // No operand predicates
18286 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18287 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHRDROT64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt)
18288 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHRDROT64ri),
18289 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18290 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18291 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
18292 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18293 GIR_RootConstrainSelectedInstOperands,
18294 // GIR_Coverage, 860,
18295 GIR_EraseRootFromParent_Done,
18296 // Label 1356: @46060
18297 GIM_Try, /*On fail goto*//*Label 1357*/ GIMT_Encode4(46084), // Rule ID 16105 //
18298 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18299 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 63,
18300 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, 63:{ *:[i8] }) => (ROL64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
18301 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL64r1),
18302 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18303 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18304 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18305 GIR_RootConstrainSelectedInstOperands,
18306 // GIR_Coverage, 16105,
18307 GIR_EraseRootFromParent_Done,
18308 // Label 1357: @46084
18309 GIM_Try, /*On fail goto*//*Label 1358*/ GIMT_Encode4(46108), // Rule ID 16113 //
18310 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
18311 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 63,
18312 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, 63:{ *:[i8] }) => (ROL64r1_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
18313 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL64r1_ND),
18314 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18315 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18316 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18317 GIR_RootConstrainSelectedInstOperands,
18318 // GIR_Coverage, 16113,
18319 GIR_EraseRootFromParent_Done,
18320 // Label 1358: @46108
18321 GIM_Try, /*On fail goto*//*Label 1359*/ GIMT_Encode4(46141), // Rule ID 780 //
18322 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18323 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18324 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18325 // MIs[1] Operand 1
18326 // No operand predicates
18327 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18328 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
18329 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR64ri),
18330 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18331 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18332 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18333 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18334 GIR_RootConstrainSelectedInstOperands,
18335 // GIR_Coverage, 780,
18336 GIR_EraseRootFromParent_Done,
18337 // Label 1359: @46141
18338 GIM_Try, /*On fail goto*//*Label 1360*/ GIMT_Encode4(46174), // Rule ID 784 //
18339 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18340 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18341 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18342 // MIs[1] Operand 1
18343 // No operand predicates
18344 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18345 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR64ri_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
18346 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR64ri_ND),
18347 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18348 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18349 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18350 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18351 GIR_RootConstrainSelectedInstOperands,
18352 // GIR_Coverage, 784,
18353 GIR_EraseRootFromParent_Done,
18354 // Label 1360: @46174
18355 GIM_Try, /*On fail goto*//*Label 1361*/ GIMT_Encode4(46212), // Rule ID 796 //
18356 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18357 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18358 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (ROR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
18359 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18360 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18361 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18362 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR64rCL),
18363 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18364 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18365 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18366 GIR_RootConstrainSelectedInstOperands,
18367 // GIR_Coverage, 796,
18368 GIR_EraseRootFromParent_Done,
18369 // Label 1361: @46212
18370 GIM_Try, /*On fail goto*//*Label 1362*/ GIMT_Encode4(46250), // Rule ID 800 //
18371 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18372 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18373 // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (ROR64rCL_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
18374 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18375 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18376 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18377 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR64rCL_ND),
18378 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18379 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18380 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18381 GIR_RootConstrainSelectedInstOperands,
18382 // GIR_Coverage, 800,
18383 GIR_EraseRootFromParent_Done,
18384 // Label 1362: @46250
18385 GIM_Reject,
18386 // Label 1353: @46251
18387 GIM_Reject,
18388 // Label 1322: @46252
18389 GIM_Try, /*On fail goto*//*Label 1363*/ GIMT_Encode4(46456),
18390 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
18391 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
18392 GIM_Try, /*On fail goto*//*Label 1364*/ GIMT_Encode4(46290), // Rule ID 7888 //
18393 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
18394 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18395 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18396 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18397 // (rotr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPRORVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
18398 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPRORVQZ128rr),
18399 GIR_RootConstrainSelectedInstOperands,
18400 // GIR_Coverage, 7888,
18401 GIR_Done,
18402 // Label 1364: @46290
18403 GIM_Try, /*On fail goto*//*Label 1365*/ GIMT_Encode4(46455), // Rule ID 19384 //
18404 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
18405 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18406 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18407 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18408 // (rotr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPRORVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
18409 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
18410 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
18411 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
18412 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
18413 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
18414 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18415 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18416 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
18417 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18418 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18419 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
18420 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
18421 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
18422 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18423 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18424 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
18425 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18426 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18427 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
18428 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18429 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18430 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
18431 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
18432 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
18433 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18434 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18435 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
18436 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPRORVQZrr),
18437 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18438 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
18439 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
18440 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
18441 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18442 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18443 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
18444 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
18445 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18446 // GIR_Coverage, 19384,
18447 GIR_EraseRootFromParent_Done,
18448 // Label 1365: @46455
18449 GIM_Reject,
18450 // Label 1363: @46456
18451 GIM_Reject,
18452 // Label 1323: @46457
18453 GIM_Try, /*On fail goto*//*Label 1366*/ GIMT_Encode4(46661),
18454 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
18455 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
18456 GIM_Try, /*On fail goto*//*Label 1367*/ GIMT_Encode4(46495), // Rule ID 7861 //
18457 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
18458 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18459 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18460 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18461 // (rotr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPRORVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
18462 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPRORVDZ128rr),
18463 GIR_RootConstrainSelectedInstOperands,
18464 // GIR_Coverage, 7861,
18465 GIR_Done,
18466 // Label 1367: @46495
18467 GIM_Try, /*On fail goto*//*Label 1368*/ GIMT_Encode4(46660), // Rule ID 19386 //
18468 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
18469 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18470 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18471 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
18472 // (rotr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPRORVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
18473 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
18474 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
18475 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
18476 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
18477 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
18478 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18479 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18480 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
18481 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18482 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18483 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
18484 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
18485 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
18486 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18487 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18488 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
18489 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18490 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18491 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
18492 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18493 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18494 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
18495 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
18496 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
18497 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18498 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18499 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
18500 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPRORVDZrr),
18501 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18502 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
18503 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
18504 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
18505 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18506 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18507 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
18508 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
18509 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18510 // GIR_Coverage, 19386,
18511 GIR_EraseRootFromParent_Done,
18512 // Label 1368: @46660
18513 GIM_Reject,
18514 // Label 1366: @46661
18515 GIM_Reject,
18516 // Label 1324: @46662
18517 GIM_Try, /*On fail goto*//*Label 1369*/ GIMT_Encode4(46866),
18518 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
18519 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
18520 GIM_Try, /*On fail goto*//*Label 1370*/ GIMT_Encode4(46700), // Rule ID 7879 //
18521 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
18522 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18523 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18524 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18525 // (rotr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPRORVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
18526 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPRORVQZ256rr),
18527 GIR_RootConstrainSelectedInstOperands,
18528 // GIR_Coverage, 7879,
18529 GIR_Done,
18530 // Label 1370: @46700
18531 GIM_Try, /*On fail goto*//*Label 1371*/ GIMT_Encode4(46865), // Rule ID 19385 //
18532 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
18533 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18534 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18535 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18536 // (rotr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPRORVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
18537 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
18538 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
18539 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
18540 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
18541 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
18542 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18543 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18544 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
18545 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18546 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18547 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
18548 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
18549 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
18550 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18551 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18552 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
18553 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18554 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18555 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
18556 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18557 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18558 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
18559 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
18560 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
18561 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18562 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18563 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
18564 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPRORVQZrr),
18565 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18566 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
18567 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
18568 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
18569 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18570 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18571 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
18572 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
18573 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18574 // GIR_Coverage, 19385,
18575 GIR_EraseRootFromParent_Done,
18576 // Label 1371: @46865
18577 GIM_Reject,
18578 // Label 1369: @46866
18579 GIM_Reject,
18580 // Label 1325: @46867
18581 GIM_Try, /*On fail goto*//*Label 1372*/ GIMT_Encode4(47071),
18582 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
18583 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
18584 GIM_Try, /*On fail goto*//*Label 1373*/ GIMT_Encode4(46905), // Rule ID 7852 //
18585 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
18586 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18587 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18588 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18589 // (rotr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPRORVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
18590 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPRORVDZ256rr),
18591 GIR_RootConstrainSelectedInstOperands,
18592 // GIR_Coverage, 7852,
18593 GIR_Done,
18594 // Label 1373: @46905
18595 GIM_Try, /*On fail goto*//*Label 1374*/ GIMT_Encode4(47070), // Rule ID 19387 //
18596 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
18597 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18598 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18599 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
18600 // (rotr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPRORVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
18601 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
18602 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
18603 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
18604 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
18605 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
18606 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18607 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18608 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
18609 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18610 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18611 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
18612 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
18613 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
18614 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18615 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18616 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
18617 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
18618 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18619 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
18620 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
18621 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18622 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
18623 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
18624 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
18625 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
18626 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18627 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
18628 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPRORVDZrr),
18629 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
18630 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
18631 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
18632 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
18633 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18634 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18635 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
18636 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
18637 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
18638 // GIR_Coverage, 19387,
18639 GIR_EraseRootFromParent_Done,
18640 // Label 1374: @47070
18641 GIM_Reject,
18642 // Label 1372: @47071
18643 GIM_Reject,
18644 // Label 1326: @47072
18645 GIM_Try, /*On fail goto*//*Label 1375*/ GIMT_Encode4(47105), // Rule ID 7870 //
18646 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
18647 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
18648 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
18649 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18650 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18651 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18652 // (rotr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPRORVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
18653 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPRORVQZrr),
18654 GIR_RootConstrainSelectedInstOperands,
18655 // GIR_Coverage, 7870,
18656 GIR_Done,
18657 // Label 1375: @47105
18658 GIM_Reject,
18659 // Label 1327: @47106
18660 GIM_Try, /*On fail goto*//*Label 1376*/ GIMT_Encode4(47139), // Rule ID 7843 //
18661 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
18662 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
18663 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
18664 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18665 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18666 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
18667 // (rotr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPRORVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
18668 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPRORVDZrr),
18669 GIR_RootConstrainSelectedInstOperands,
18670 // GIR_Coverage, 7843,
18671 GIR_Done,
18672 // Label 1376: @47139
18673 GIM_Reject,
18674 // Label 1328: @47140
18675 GIM_Reject,
18676 // Label 24: @47141
18677 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(20), /*)*//*default:*//*Label 1389*/ GIMT_Encode4(49148),
18678 /*GILLT_s8*//*Label 1377*/ GIMT_Encode4(47228),
18679 /*GILLT_s16*//*Label 1378*/ GIMT_Encode4(47439),
18680 /*GILLT_s32*//*Label 1379*/ GIMT_Encode4(47650),
18681 /*GILLT_s64*//*Label 1380*/ GIMT_Encode4(47894), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
18682 /*GILLT_v2s64*//*Label 1381*/ GIMT_Encode4(48138), GIMT_Encode4(0),
18683 /*GILLT_v4s32*//*Label 1382*/ GIMT_Encode4(48370),
18684 /*GILLT_v4s64*//*Label 1383*/ GIMT_Encode4(48602), GIMT_Encode4(0),
18685 /*GILLT_v8s16*//*Label 1384*/ GIMT_Encode4(48807),
18686 /*GILLT_v8s32*//*Label 1385*/ GIMT_Encode4(48841),
18687 /*GILLT_v8s64*//*Label 1386*/ GIMT_Encode4(49046), GIMT_Encode4(0),
18688 /*GILLT_v16s8*//*Label 1387*/ GIMT_Encode4(49080), GIMT_Encode4(0),
18689 /*GILLT_v16s32*//*Label 1388*/ GIMT_Encode4(49114),
18690 // Label 1377: @47228
18691 GIM_Try, /*On fail goto*//*Label 1390*/ GIMT_Encode4(47438),
18692 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8,
18693 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
18694 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
18695 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID),
18696 GIM_Try, /*On fail goto*//*Label 1391*/ GIMT_Encode4(47271), // Rule ID 16098 //
18697 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18698 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 7,
18699 // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 7:{ *:[i8] }) => (ROR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
18700 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR8r1),
18701 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18702 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18703 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18704 GIR_RootConstrainSelectedInstOperands,
18705 // GIR_Coverage, 16098,
18706 GIR_EraseRootFromParent_Done,
18707 // Label 1391: @47271
18708 GIM_Try, /*On fail goto*//*Label 1392*/ GIMT_Encode4(47295), // Rule ID 16106 //
18709 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
18710 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 7,
18711 // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 7:{ *:[i8] }) => (ROR8r1_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
18712 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR8r1_ND),
18713 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18714 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18715 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18716 GIR_RootConstrainSelectedInstOperands,
18717 // GIR_Coverage, 16106,
18718 GIR_EraseRootFromParent_Done,
18719 // Label 1392: @47295
18720 GIM_Try, /*On fail goto*//*Label 1393*/ GIMT_Encode4(47328), // Rule ID 745 //
18721 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18722 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18723 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18724 // MIs[1] Operand 1
18725 // No operand predicates
18726 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18727 // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
18728 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL8ri),
18729 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18730 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18731 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18732 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18733 GIR_RootConstrainSelectedInstOperands,
18734 // GIR_Coverage, 745,
18735 GIR_EraseRootFromParent_Done,
18736 // Label 1393: @47328
18737 GIM_Try, /*On fail goto*//*Label 1394*/ GIMT_Encode4(47361), // Rule ID 749 //
18738 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18739 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18740 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18741 // MIs[1] Operand 1
18742 // No operand predicates
18743 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18744 // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
18745 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL8ri_ND),
18746 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18747 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18748 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18749 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18750 GIR_RootConstrainSelectedInstOperands,
18751 // GIR_Coverage, 749,
18752 GIR_EraseRootFromParent_Done,
18753 // Label 1394: @47361
18754 GIM_Try, /*On fail goto*//*Label 1395*/ GIMT_Encode4(47399), // Rule ID 761 //
18755 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18756 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18757 // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (ROL8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
18758 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18759 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18760 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18761 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL8rCL),
18762 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18763 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18764 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18765 GIR_RootConstrainSelectedInstOperands,
18766 // GIR_Coverage, 761,
18767 GIR_EraseRootFromParent_Done,
18768 // Label 1395: @47399
18769 GIM_Try, /*On fail goto*//*Label 1396*/ GIMT_Encode4(47437), // Rule ID 765 //
18770 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18771 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18772 // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (ROL8rCL_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
18773 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18774 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18775 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18776 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL8rCL_ND),
18777 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18778 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18779 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18780 GIR_RootConstrainSelectedInstOperands,
18781 // GIR_Coverage, 765,
18782 GIR_EraseRootFromParent_Done,
18783 // Label 1396: @47437
18784 GIM_Reject,
18785 // Label 1390: @47438
18786 GIM_Reject,
18787 // Label 1378: @47439
18788 GIM_Try, /*On fail goto*//*Label 1397*/ GIMT_Encode4(47649),
18789 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
18790 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
18791 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
18792 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
18793 GIM_Try, /*On fail goto*//*Label 1398*/ GIMT_Encode4(47482), // Rule ID 16099 //
18794 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18795 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 15,
18796 // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 15:{ *:[i8] }) => (ROR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18797 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR16r1),
18798 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18799 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18800 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18801 GIR_RootConstrainSelectedInstOperands,
18802 // GIR_Coverage, 16099,
18803 GIR_EraseRootFromParent_Done,
18804 // Label 1398: @47482
18805 GIM_Try, /*On fail goto*//*Label 1399*/ GIMT_Encode4(47506), // Rule ID 16107 //
18806 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
18807 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 15,
18808 // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 15:{ *:[i8] }) => (ROR16r1_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18809 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR16r1_ND),
18810 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18811 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18812 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18813 GIR_RootConstrainSelectedInstOperands,
18814 // GIR_Coverage, 16107,
18815 GIR_EraseRootFromParent_Done,
18816 // Label 1399: @47506
18817 GIM_Try, /*On fail goto*//*Label 1400*/ GIMT_Encode4(47539), // Rule ID 746 //
18818 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18819 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18820 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18821 // MIs[1] Operand 1
18822 // No operand predicates
18823 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18824 // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
18825 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL16ri),
18826 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18827 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18828 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18829 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18830 GIR_RootConstrainSelectedInstOperands,
18831 // GIR_Coverage, 746,
18832 GIR_EraseRootFromParent_Done,
18833 // Label 1400: @47539
18834 GIM_Try, /*On fail goto*//*Label 1401*/ GIMT_Encode4(47572), // Rule ID 750 //
18835 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18836 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18837 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18838 // MIs[1] Operand 1
18839 // No operand predicates
18840 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18841 // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
18842 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL16ri_ND),
18843 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18844 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18845 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18846 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18847 GIR_RootConstrainSelectedInstOperands,
18848 // GIR_Coverage, 750,
18849 GIR_EraseRootFromParent_Done,
18850 // Label 1401: @47572
18851 GIM_Try, /*On fail goto*//*Label 1402*/ GIMT_Encode4(47610), // Rule ID 762 //
18852 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18853 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18854 // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (ROL16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18855 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18856 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18857 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18858 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL16rCL),
18859 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18860 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18861 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18862 GIR_RootConstrainSelectedInstOperands,
18863 // GIR_Coverage, 762,
18864 GIR_EraseRootFromParent_Done,
18865 // Label 1402: @47610
18866 GIM_Try, /*On fail goto*//*Label 1403*/ GIMT_Encode4(47648), // Rule ID 766 //
18867 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18868 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18869 // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (ROL16rCL_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
18870 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18871 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18872 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18873 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL16rCL_ND),
18874 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18875 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18876 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18877 GIR_RootConstrainSelectedInstOperands,
18878 // GIR_Coverage, 766,
18879 GIR_EraseRootFromParent_Done,
18880 // Label 1403: @47648
18881 GIM_Reject,
18882 // Label 1397: @47649
18883 GIM_Reject,
18884 // Label 1379: @47650
18885 GIM_Try, /*On fail goto*//*Label 1404*/ GIMT_Encode4(47893),
18886 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
18887 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
18888 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
18889 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
18890 GIM_Try, /*On fail goto*//*Label 1405*/ GIMT_Encode4(47702), // Rule ID 857 //
18891 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFastSHLDRotate),
18892 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18893 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18894 // MIs[1] Operand 1
18895 // No operand predicates
18896 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18897 // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHLDROT32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt)
18898 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLDROT32ri),
18899 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18900 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18901 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
18902 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18903 GIR_RootConstrainSelectedInstOperands,
18904 // GIR_Coverage, 857,
18905 GIR_EraseRootFromParent_Done,
18906 // Label 1405: @47702
18907 GIM_Try, /*On fail goto*//*Label 1406*/ GIMT_Encode4(47726), // Rule ID 16100 //
18908 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18909 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 31,
18910 // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 31:{ *:[i8] }) => (ROR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18911 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR32r1),
18912 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18913 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18914 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18915 GIR_RootConstrainSelectedInstOperands,
18916 // GIR_Coverage, 16100,
18917 GIR_EraseRootFromParent_Done,
18918 // Label 1406: @47726
18919 GIM_Try, /*On fail goto*//*Label 1407*/ GIMT_Encode4(47750), // Rule ID 16108 //
18920 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
18921 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 31,
18922 // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 31:{ *:[i8] }) => (ROR32r1_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18923 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR32r1_ND),
18924 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18925 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18926 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18927 GIR_RootConstrainSelectedInstOperands,
18928 // GIR_Coverage, 16108,
18929 GIR_EraseRootFromParent_Done,
18930 // Label 1407: @47750
18931 GIM_Try, /*On fail goto*//*Label 1408*/ GIMT_Encode4(47783), // Rule ID 747 //
18932 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18933 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18934 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18935 // MIs[1] Operand 1
18936 // No operand predicates
18937 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18938 // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
18939 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL32ri),
18940 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18941 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18942 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18943 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18944 GIR_RootConstrainSelectedInstOperands,
18945 // GIR_Coverage, 747,
18946 GIR_EraseRootFromParent_Done,
18947 // Label 1408: @47783
18948 GIM_Try, /*On fail goto*//*Label 1409*/ GIMT_Encode4(47816), // Rule ID 751 //
18949 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18950 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
18951 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
18952 // MIs[1] Operand 1
18953 // No operand predicates
18954 GIM_CheckIsSafeToFold, /*NumInsns*/1,
18955 // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
18956 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL32ri_ND),
18957 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18958 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18959 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
18960 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18961 GIR_RootConstrainSelectedInstOperands,
18962 // GIR_Coverage, 751,
18963 GIR_EraseRootFromParent_Done,
18964 // Label 1409: @47816
18965 GIM_Try, /*On fail goto*//*Label 1410*/ GIMT_Encode4(47854), // Rule ID 763 //
18966 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
18967 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18968 // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (ROL32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18969 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18970 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18971 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18972 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL32rCL),
18973 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18974 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18975 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18976 GIR_RootConstrainSelectedInstOperands,
18977 // GIR_Coverage, 763,
18978 GIR_EraseRootFromParent_Done,
18979 // Label 1410: @47854
18980 GIM_Try, /*On fail goto*//*Label 1411*/ GIMT_Encode4(47892), // Rule ID 767 //
18981 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
18982 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
18983 // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (ROL32rCL_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
18984 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
18985 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
18986 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
18987 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL32rCL_ND),
18988 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
18989 GIR_RootToRootCopy, /*OpIdx*/1, // src1
18990 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
18991 GIR_RootConstrainSelectedInstOperands,
18992 // GIR_Coverage, 767,
18993 GIR_EraseRootFromParent_Done,
18994 // Label 1411: @47892
18995 GIM_Reject,
18996 // Label 1404: @47893
18997 GIM_Reject,
18998 // Label 1380: @47894
18999 GIM_Try, /*On fail goto*//*Label 1412*/ GIMT_Encode4(48137),
19000 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
19001 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8,
19002 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
19003 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
19004 GIM_Try, /*On fail goto*//*Label 1413*/ GIMT_Encode4(47946), // Rule ID 858 //
19005 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFastSHLDRotate),
19006 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19007 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
19008 // MIs[1] Operand 1
19009 // No operand predicates
19010 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19011 // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHLDROT64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt)
19012 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHLDROT64ri),
19013 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19014 GIR_RootToRootCopy, /*OpIdx*/1, // src1
19015 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt
19016 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
19017 GIR_RootConstrainSelectedInstOperands,
19018 // GIR_Coverage, 858,
19019 GIR_EraseRootFromParent_Done,
19020 // Label 1413: @47946
19021 GIM_Try, /*On fail goto*//*Label 1414*/ GIMT_Encode4(47970), // Rule ID 16101 //
19022 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
19023 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 63,
19024 // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 63:{ *:[i8] }) => (ROR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
19025 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR64r1),
19026 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19027 GIR_RootToRootCopy, /*OpIdx*/1, // src1
19028 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
19029 GIR_RootConstrainSelectedInstOperands,
19030 // GIR_Coverage, 16101,
19031 GIR_EraseRootFromParent_Done,
19032 // Label 1414: @47970
19033 GIM_Try, /*On fail goto*//*Label 1415*/ GIMT_Encode4(47994), // Rule ID 16109 //
19034 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD),
19035 GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 63,
19036 // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 63:{ *:[i8] }) => (ROR64r1_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
19037 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROR64r1_ND),
19038 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19039 GIR_RootToRootCopy, /*OpIdx*/1, // src1
19040 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
19041 GIR_RootConstrainSelectedInstOperands,
19042 // GIR_Coverage, 16109,
19043 GIR_EraseRootFromParent_Done,
19044 // Label 1415: @47994
19045 GIM_Try, /*On fail goto*//*Label 1416*/ GIMT_Encode4(48027), // Rule ID 748 //
19046 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
19047 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19048 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
19049 // MIs[1] Operand 1
19050 // No operand predicates
19051 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19052 // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
19053 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL64ri),
19054 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19055 GIR_RootToRootCopy, /*OpIdx*/1, // src1
19056 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
19057 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
19058 GIR_RootConstrainSelectedInstOperands,
19059 // GIR_Coverage, 748,
19060 GIR_EraseRootFromParent_Done,
19061 // Label 1416: @48027
19062 GIM_Try, /*On fail goto*//*Label 1417*/ GIMT_Encode4(48060), // Rule ID 752 //
19063 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
19064 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19065 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
19066 // MIs[1] Operand 1
19067 // No operand predicates
19068 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19069 // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL64ri_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
19070 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL64ri_ND),
19071 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19072 GIR_RootToRootCopy, /*OpIdx*/1, // src1
19073 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
19074 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
19075 GIR_RootConstrainSelectedInstOperands,
19076 // GIR_Coverage, 752,
19077 GIR_EraseRootFromParent_Done,
19078 // Label 1417: @48060
19079 GIM_Try, /*On fail goto*//*Label 1418*/ GIMT_Encode4(48098), // Rule ID 764 //
19080 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD),
19081 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
19082 // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (ROL64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
19083 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19084 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
19085 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
19086 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL64rCL),
19087 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19088 GIR_RootToRootCopy, /*OpIdx*/1, // src1
19089 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
19090 GIR_RootConstrainSelectedInstOperands,
19091 // GIR_Coverage, 764,
19092 GIR_EraseRootFromParent_Done,
19093 // Label 1418: @48098
19094 GIM_Try, /*On fail goto*//*Label 1419*/ GIMT_Encode4(48136), // Rule ID 768 //
19095 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode),
19096 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8_ABCD_LRegClassID),
19097 // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (ROL64rCL_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
19098 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19099 GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::CL), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define),
19100 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL
19101 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL64rCL_ND),
19102 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19103 GIR_RootToRootCopy, /*OpIdx*/1, // src1
19104 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
19105 GIR_RootConstrainSelectedInstOperands,
19106 // GIR_Coverage, 768,
19107 GIR_EraseRootFromParent_Done,
19108 // Label 1419: @48136
19109 GIM_Reject,
19110 // Label 1412: @48137
19111 GIM_Reject,
19112 // Label 1381: @48138
19113 GIM_Try, /*On fail goto*//*Label 1420*/ GIMT_Encode4(48369),
19114 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
19115 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
19116 GIM_Try, /*On fail goto*//*Label 1421*/ GIMT_Encode4(48176), // Rule ID 1569 //
19117 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
19118 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19119 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19120 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19121 // (rotl:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPROTQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
19122 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROTQrr),
19123 GIR_RootConstrainSelectedInstOperands,
19124 // GIR_Coverage, 1569,
19125 GIR_Done,
19126 // Label 1421: @48176
19127 GIM_Try, /*On fail goto*//*Label 1422*/ GIMT_Encode4(48203), // Rule ID 7942 //
19128 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
19129 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19130 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19131 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19132 // (rotl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPROLVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
19133 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROLVQZ128rr),
19134 GIR_RootConstrainSelectedInstOperands,
19135 // GIR_Coverage, 7942,
19136 GIR_Done,
19137 // Label 1422: @48203
19138 GIM_Try, /*On fail goto*//*Label 1423*/ GIMT_Encode4(48368), // Rule ID 19376 //
19139 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
19140 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19141 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19142 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19143 // (rotl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPROLVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
19144 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
19145 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
19146 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
19147 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
19148 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
19149 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19150 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19151 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
19152 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19153 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19154 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
19155 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
19156 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
19157 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19158 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19159 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19160 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19161 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19162 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19163 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19164 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19165 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19166 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
19167 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
19168 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19169 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19170 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19171 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPROLVQZrr),
19172 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19173 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19174 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
19175 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19176 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19177 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19178 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
19179 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
19180 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19181 // GIR_Coverage, 19376,
19182 GIR_EraseRootFromParent_Done,
19183 // Label 1423: @48368
19184 GIM_Reject,
19185 // Label 1420: @48369
19186 GIM_Reject,
19187 // Label 1382: @48370
19188 GIM_Try, /*On fail goto*//*Label 1424*/ GIMT_Encode4(48601),
19189 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
19190 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
19191 GIM_Try, /*On fail goto*//*Label 1425*/ GIMT_Encode4(48408), // Rule ID 1566 //
19192 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
19193 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19194 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19195 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19196 // (rotl:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPROTDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
19197 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROTDrr),
19198 GIR_RootConstrainSelectedInstOperands,
19199 // GIR_Coverage, 1566,
19200 GIR_Done,
19201 // Label 1425: @48408
19202 GIM_Try, /*On fail goto*//*Label 1426*/ GIMT_Encode4(48435), // Rule ID 7915 //
19203 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
19204 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19205 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19206 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19207 // (rotl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPROLVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
19208 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROLVDZ128rr),
19209 GIR_RootConstrainSelectedInstOperands,
19210 // GIR_Coverage, 7915,
19211 GIR_Done,
19212 // Label 1426: @48435
19213 GIM_Try, /*On fail goto*//*Label 1427*/ GIMT_Encode4(48600), // Rule ID 19378 //
19214 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
19215 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19216 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19217 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19218 // (rotl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPROLVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
19219 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
19220 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
19221 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
19222 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
19223 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
19224 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19225 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19226 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
19227 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19228 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19229 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
19230 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
19231 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
19232 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19233 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19234 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19235 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19236 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19237 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19238 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19239 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19240 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19241 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
19242 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
19243 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19244 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19245 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19246 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPROLVDZrr),
19247 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19248 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19249 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
19250 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19251 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19252 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19253 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
19254 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
19255 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19256 // GIR_Coverage, 19378,
19257 GIR_EraseRootFromParent_Done,
19258 // Label 1427: @48600
19259 GIM_Reject,
19260 // Label 1424: @48601
19261 GIM_Reject,
19262 // Label 1383: @48602
19263 GIM_Try, /*On fail goto*//*Label 1428*/ GIMT_Encode4(48806),
19264 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
19265 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
19266 GIM_Try, /*On fail goto*//*Label 1429*/ GIMT_Encode4(48640), // Rule ID 7933 //
19267 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
19268 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19269 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19270 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19271 // (rotl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPROLVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
19272 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROLVQZ256rr),
19273 GIR_RootConstrainSelectedInstOperands,
19274 // GIR_Coverage, 7933,
19275 GIR_Done,
19276 // Label 1429: @48640
19277 GIM_Try, /*On fail goto*//*Label 1430*/ GIMT_Encode4(48805), // Rule ID 19377 //
19278 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
19279 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19280 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19281 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19282 // (rotl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPROLVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
19283 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
19284 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
19285 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
19286 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
19287 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
19288 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19289 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19290 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
19291 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19292 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19293 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
19294 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
19295 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
19296 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19297 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19298 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19299 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19300 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19301 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19302 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19303 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19304 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19305 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
19306 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
19307 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19308 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19309 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19310 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPROLVQZrr),
19311 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19312 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19313 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
19314 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19315 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19316 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19317 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
19318 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
19319 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19320 // GIR_Coverage, 19377,
19321 GIR_EraseRootFromParent_Done,
19322 // Label 1430: @48805
19323 GIM_Reject,
19324 // Label 1428: @48806
19325 GIM_Reject,
19326 // Label 1384: @48807
19327 GIM_Try, /*On fail goto*//*Label 1431*/ GIMT_Encode4(48840), // Rule ID 1572 //
19328 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
19329 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
19330 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
19331 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19332 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19333 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19334 // (rotl:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPROTWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
19335 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROTWrr),
19336 GIR_RootConstrainSelectedInstOperands,
19337 // GIR_Coverage, 1572,
19338 GIR_Done,
19339 // Label 1431: @48840
19340 GIM_Reject,
19341 // Label 1385: @48841
19342 GIM_Try, /*On fail goto*//*Label 1432*/ GIMT_Encode4(49045),
19343 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
19344 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
19345 GIM_Try, /*On fail goto*//*Label 1433*/ GIMT_Encode4(48879), // Rule ID 7906 //
19346 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
19347 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19348 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19349 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19350 // (rotl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPROLVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
19351 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROLVDZ256rr),
19352 GIR_RootConstrainSelectedInstOperands,
19353 // GIR_Coverage, 7906,
19354 GIR_Done,
19355 // Label 1433: @48879
19356 GIM_Try, /*On fail goto*//*Label 1434*/ GIMT_Encode4(49044), // Rule ID 19379 //
19357 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
19358 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19359 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19360 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19361 // (rotl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPROLVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
19362 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
19363 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
19364 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
19365 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
19366 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
19367 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19368 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19369 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
19370 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19371 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19372 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
19373 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
19374 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
19375 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19376 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19377 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19378 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19379 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19380 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19381 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19382 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19383 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19384 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
19385 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
19386 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19387 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19388 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19389 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPROLVDZrr),
19390 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19391 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19392 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
19393 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19394 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19395 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19396 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
19397 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
19398 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19399 // GIR_Coverage, 19379,
19400 GIR_EraseRootFromParent_Done,
19401 // Label 1434: @49044
19402 GIM_Reject,
19403 // Label 1432: @49045
19404 GIM_Reject,
19405 // Label 1386: @49046
19406 GIM_Try, /*On fail goto*//*Label 1435*/ GIMT_Encode4(49079), // Rule ID 7924 //
19407 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
19408 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
19409 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
19410 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19411 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19412 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19413 // (rotl:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPROLVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
19414 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROLVQZrr),
19415 GIR_RootConstrainSelectedInstOperands,
19416 // GIR_Coverage, 7924,
19417 GIR_Done,
19418 // Label 1435: @49079
19419 GIM_Reject,
19420 // Label 1387: @49080
19421 GIM_Try, /*On fail goto*//*Label 1436*/ GIMT_Encode4(49113), // Rule ID 1563 //
19422 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP),
19423 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
19424 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
19425 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19426 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19427 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
19428 // (rotl:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPROTBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
19429 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROTBrr),
19430 GIR_RootConstrainSelectedInstOperands,
19431 // GIR_Coverage, 1563,
19432 GIR_Done,
19433 // Label 1436: @49113
19434 GIM_Reject,
19435 // Label 1388: @49114
19436 GIM_Try, /*On fail goto*//*Label 1437*/ GIMT_Encode4(49147), // Rule ID 7897 //
19437 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
19438 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
19439 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
19440 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19441 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19442 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19443 // (rotl:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPROLVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
19444 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPROLVDZrr),
19445 GIR_RootConstrainSelectedInstOperands,
19446 // GIR_Coverage, 7897,
19447 GIR_Done,
19448 // Label 1437: @49147
19449 GIM_Reject,
19450 // Label 1389: @49148
19451 GIM_Reject,
19452 // Label 25: @49149
19453 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(7), GIMT_Encode2(24), /*)*//*default:*//*Label 1444*/ GIMT_Encode4(50805),
19454 /*GILLT_v2s1*//*Label 1438*/ GIMT_Encode4(49228), GIMT_Encode4(0),
19455 /*GILLT_v4s1*//*Label 1439*/ GIMT_Encode4(49389), GIMT_Encode4(0), GIMT_Encode4(0),
19456 /*GILLT_v8s1*//*Label 1440*/ GIMT_Encode4(49736), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
19457 /*GILLT_v16s1*//*Label 1441*/ GIMT_Encode4(50133), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
19458 /*GILLT_v32s1*//*Label 1442*/ GIMT_Encode4(50530), GIMT_Encode4(0), GIMT_Encode4(0),
19459 /*GILLT_v64s1*//*Label 1443*/ GIMT_Encode4(50754),
19460 // Label 1438: @49228
19461 GIM_Try, /*On fail goto*//*Label 1445*/ GIMT_Encode4(49388),
19462 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
19463 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
19464 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID),
19465 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19466 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19467 GIM_Try, /*On fail goto*//*Label 1446*/ GIMT_Encode4(49283), // Rule ID 12492 //
19468 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
19469 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19470 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19471 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19472 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19473 // (setcc:{ *:[v2i1] } immAllZerosV:{ *:[v2i64] }, VR128X:{ *:[v2i64] }:$src, SETGT:{ *:[Other] }) => (VPMOVQ2MZ128rr:{ *:[v2i1] } VR128X:{ *:[v2i64] }:$src)
19474 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVQ2MZ128rr),
19475 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19476 GIR_RootToRootCopy, /*OpIdx*/3, // src
19477 GIR_RootConstrainSelectedInstOperands,
19478 // GIR_Coverage, 12492,
19479 GIR_EraseRootFromParent_Done,
19480 // Label 1446: @49283
19481 GIM_Try, /*On fail goto*//*Label 1447*/ GIMT_Encode4(49387), // Rule ID 20238 //
19482 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX),
19483 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19484 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19485 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19486 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19487 // (setcc:{ *:[v2i1] } immAllZerosV:{ *:[v2i64] }, VR128X:{ *:[v2i64] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (VPMOVQ2MZrr:{ *:[v8i1] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] })), VK2:{ *:[i32] })
19488 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s1,
19489 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
19490 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
19491 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19492 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19493 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19494 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19495 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19496 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19497 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19498 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
19499 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19500 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19501 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19502 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVQ2MZrr),
19503 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19504 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19505 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19506 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19507 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19508 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19509 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID),
19510 // GIR_Coverage, 20238,
19511 GIR_EraseRootFromParent_Done,
19512 // Label 1447: @49387
19513 GIM_Reject,
19514 // Label 1445: @49388
19515 GIM_Reject,
19516 // Label 1439: @49389
19517 GIM_Try, /*On fail goto*//*Label 1448*/ GIMT_Encode4(49439), // Rule ID 12489 //
19518 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
19519 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
19520 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
19521 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
19522 // MIs[0] Operand 1
19523 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19524 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19525 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19526 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19527 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19528 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19529 // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i32] }, VR128X:{ *:[v4i32] }:$src, SETGT:{ *:[Other] }) => (VPMOVD2MZ128rr:{ *:[v4i1] } VR128X:{ *:[v4i32] }:$src)
19530 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVD2MZ128rr),
19531 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19532 GIR_RootToRootCopy, /*OpIdx*/3, // src
19533 GIR_RootConstrainSelectedInstOperands,
19534 // GIR_Coverage, 12489,
19535 GIR_EraseRootFromParent_Done,
19536 // Label 1448: @49439
19537 GIM_Try, /*On fail goto*//*Label 1449*/ GIMT_Encode4(49489), // Rule ID 12491 //
19538 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
19539 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
19540 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
19541 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
19542 // MIs[0] Operand 1
19543 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19544 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19545 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19546 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19547 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19548 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19549 // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i64] }, VR256X:{ *:[v4i64] }:$src, SETGT:{ *:[Other] }) => (VPMOVQ2MZ256rr:{ *:[v4i1] } VR256X:{ *:[v4i64] }:$src)
19550 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVQ2MZ256rr),
19551 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19552 GIR_RootToRootCopy, /*OpIdx*/3, // src
19553 GIR_RootConstrainSelectedInstOperands,
19554 // GIR_Coverage, 12491,
19555 GIR_EraseRootFromParent_Done,
19556 // Label 1449: @49489
19557 GIM_Try, /*On fail goto*//*Label 1450*/ GIMT_Encode4(49612), // Rule ID 20236 //
19558 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX),
19559 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
19560 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
19561 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
19562 // MIs[0] Operand 1
19563 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19564 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19565 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19566 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19567 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19568 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19569 // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i32] }, VR128X:{ *:[v4i32] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (VPMOVD2MZrr:{ *:[v16i1] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] })), VK4:{ *:[i32] })
19570 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
19571 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
19572 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
19573 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19574 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19575 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19576 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19577 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19578 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19579 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19580 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
19581 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19582 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19583 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19584 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVD2MZrr),
19585 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19586 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19587 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19588 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19589 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19590 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19591 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
19592 // GIR_Coverage, 20236,
19593 GIR_EraseRootFromParent_Done,
19594 // Label 1450: @49612
19595 GIM_Try, /*On fail goto*//*Label 1451*/ GIMT_Encode4(49735), // Rule ID 20237 //
19596 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX),
19597 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
19598 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
19599 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID),
19600 // MIs[0] Operand 1
19601 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19602 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19603 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19604 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19605 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19606 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19607 // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i64] }, VR256X:{ *:[v4i64] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (VPMOVQ2MZrr:{ *:[v8i1] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] })), VK4:{ *:[i32] })
19608 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s1,
19609 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
19610 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
19611 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19612 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19613 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19614 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19615 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19616 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19617 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19618 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
19619 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19620 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19621 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19622 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVQ2MZrr),
19623 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19624 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19625 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19626 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19627 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19628 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19629 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID),
19630 // GIR_Coverage, 20237,
19631 GIR_EraseRootFromParent_Done,
19632 // Label 1451: @49735
19633 GIM_Reject,
19634 // Label 1440: @49736
19635 GIM_Try, /*On fail goto*//*Label 1452*/ GIMT_Encode4(49786), // Rule ID 12486 //
19636 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
19637 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
19638 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
19639 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
19640 // MIs[0] Operand 1
19641 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19642 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19643 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19644 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19645 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19646 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19647 // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i16] }, VR128X:{ *:[v8i16] }:$src, SETGT:{ *:[Other] }) => (VPMOVW2MZ128rr:{ *:[v8i1] } VR128X:{ *:[v8i16] }:$src)
19648 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVW2MZ128rr),
19649 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19650 GIR_RootToRootCopy, /*OpIdx*/3, // src
19651 GIR_RootConstrainSelectedInstOperands,
19652 // GIR_Coverage, 12486,
19653 GIR_EraseRootFromParent_Done,
19654 // Label 1452: @49786
19655 GIM_Try, /*On fail goto*//*Label 1453*/ GIMT_Encode4(49836), // Rule ID 12488 //
19656 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
19657 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
19658 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
19659 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
19660 // MIs[0] Operand 1
19661 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19662 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19663 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19664 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19665 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19666 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19667 // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i32] }, VR256X:{ *:[v8i32] }:$src, SETGT:{ *:[Other] }) => (VPMOVD2MZ256rr:{ *:[v8i1] } VR256X:{ *:[v8i32] }:$src)
19668 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVD2MZ256rr),
19669 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19670 GIR_RootToRootCopy, /*OpIdx*/3, // src
19671 GIR_RootConstrainSelectedInstOperands,
19672 // GIR_Coverage, 12488,
19673 GIR_EraseRootFromParent_Done,
19674 // Label 1453: @49836
19675 GIM_Try, /*On fail goto*//*Label 1454*/ GIMT_Encode4(49886), // Rule ID 12490 //
19676 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
19677 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
19678 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
19679 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
19680 // MIs[0] Operand 1
19681 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19682 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19683 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19684 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19685 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19686 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19687 // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i64] }, VR512:{ *:[v8i64] }:$src, SETGT:{ *:[Other] }) => (VPMOVQ2MZrr:{ *:[v8i1] } VR512:{ *:[v8i64] }:$src)
19688 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVQ2MZrr),
19689 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19690 GIR_RootToRootCopy, /*OpIdx*/3, // src
19691 GIR_RootConstrainSelectedInstOperands,
19692 // GIR_Coverage, 12490,
19693 GIR_EraseRootFromParent_Done,
19694 // Label 1454: @49886
19695 GIM_Try, /*On fail goto*//*Label 1455*/ GIMT_Encode4(50009), // Rule ID 20234 //
19696 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
19697 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
19698 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
19699 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
19700 // MIs[0] Operand 1
19701 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19702 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19703 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19704 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19705 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19706 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19707 // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i16] }, VR128X:{ *:[v8i16] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (VPMOVW2MZrr:{ *:[v32i1] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] })), VK8:{ *:[i32] })
19708 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s1,
19709 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
19710 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
19711 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19712 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19713 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19714 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19715 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19716 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19717 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19718 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
19719 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19720 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19721 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19722 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVW2MZrr),
19723 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19724 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19725 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19726 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19727 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19728 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19729 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
19730 // GIR_Coverage, 20234,
19731 GIR_EraseRootFromParent_Done,
19732 // Label 1455: @50009
19733 GIM_Try, /*On fail goto*//*Label 1456*/ GIMT_Encode4(50132), // Rule ID 20235 //
19734 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX),
19735 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
19736 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
19737 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
19738 // MIs[0] Operand 1
19739 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19740 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19741 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19742 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19743 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19744 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19745 // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i32] }, VR256X:{ *:[v8i32] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (VPMOVD2MZrr:{ *:[v16i1] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] })), VK8:{ *:[i32] })
19746 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
19747 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
19748 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
19749 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19750 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19751 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19752 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19753 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19754 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19755 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19756 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
19757 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19758 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19759 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19760 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVD2MZrr),
19761 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19762 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19763 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19764 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19765 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19766 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19767 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID),
19768 // GIR_Coverage, 20235,
19769 GIR_EraseRootFromParent_Done,
19770 // Label 1456: @50132
19771 GIM_Reject,
19772 // Label 1441: @50133
19773 GIM_Try, /*On fail goto*//*Label 1457*/ GIMT_Encode4(50183), // Rule ID 12483 //
19774 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
19775 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
19776 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
19777 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
19778 // MIs[0] Operand 1
19779 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19780 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19781 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19782 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19783 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19784 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19785 // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i8] }, VR128X:{ *:[v16i8] }:$src, SETGT:{ *:[Other] }) => (VPMOVB2MZ128rr:{ *:[v16i1] } VR128X:{ *:[v16i8] }:$src)
19786 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVB2MZ128rr),
19787 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19788 GIR_RootToRootCopy, /*OpIdx*/3, // src
19789 GIR_RootConstrainSelectedInstOperands,
19790 // GIR_Coverage, 12483,
19791 GIR_EraseRootFromParent_Done,
19792 // Label 1457: @50183
19793 GIM_Try, /*On fail goto*//*Label 1458*/ GIMT_Encode4(50233), // Rule ID 12485 //
19794 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
19795 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
19796 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
19797 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
19798 // MIs[0] Operand 1
19799 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19800 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19801 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19802 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19803 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19804 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19805 // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i16] }, VR256X:{ *:[v16i16] }:$src, SETGT:{ *:[Other] }) => (VPMOVW2MZ256rr:{ *:[v16i1] } VR256X:{ *:[v16i16] }:$src)
19806 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVW2MZ256rr),
19807 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19808 GIR_RootToRootCopy, /*OpIdx*/3, // src
19809 GIR_RootConstrainSelectedInstOperands,
19810 // GIR_Coverage, 12485,
19811 GIR_EraseRootFromParent_Done,
19812 // Label 1458: @50233
19813 GIM_Try, /*On fail goto*//*Label 1459*/ GIMT_Encode4(50283), // Rule ID 12487 //
19814 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
19815 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
19816 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s32,
19817 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
19818 // MIs[0] Operand 1
19819 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19820 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19821 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19822 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19823 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19824 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19825 // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i32] }, VR512:{ *:[v16i32] }:$src, SETGT:{ *:[Other] }) => (VPMOVD2MZrr:{ *:[v16i1] } VR512:{ *:[v16i32] }:$src)
19826 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVD2MZrr),
19827 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19828 GIR_RootToRootCopy, /*OpIdx*/3, // src
19829 GIR_RootConstrainSelectedInstOperands,
19830 // GIR_Coverage, 12487,
19831 GIR_EraseRootFromParent_Done,
19832 // Label 1459: @50283
19833 GIM_Try, /*On fail goto*//*Label 1460*/ GIMT_Encode4(50406), // Rule ID 20232 //
19834 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
19835 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
19836 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
19837 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
19838 // MIs[0] Operand 1
19839 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19840 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19841 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19842 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19843 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
19844 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19845 // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i8] }, VR128X:{ *:[v16i8] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v16i1] } (VPMOVB2MZrr:{ *:[v64i1] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] })), VK16:{ *:[i32] })
19846 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s1,
19847 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8,
19848 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
19849 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19850 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19851 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19852 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19853 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19854 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19855 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19856 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
19857 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19858 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19859 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
19860 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVB2MZrr),
19861 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19862 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19863 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19864 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19865 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19866 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19867 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK16RegClassID),
19868 // GIR_Coverage, 20232,
19869 GIR_EraseRootFromParent_Done,
19870 // Label 1460: @50406
19871 GIM_Try, /*On fail goto*//*Label 1461*/ GIMT_Encode4(50529), // Rule ID 20233 //
19872 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
19873 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
19874 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
19875 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
19876 // MIs[0] Operand 1
19877 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19878 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19879 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19880 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19881 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19882 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19883 // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i16] }, VR256X:{ *:[v16i16] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v16i1] } (VPMOVW2MZrr:{ *:[v32i1] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] })), VK16:{ *:[i32] })
19884 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s1,
19885 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
19886 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
19887 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19888 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19889 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19890 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19891 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19892 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19893 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19894 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
19895 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19896 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19897 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19898 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVW2MZrr),
19899 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19900 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19901 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19902 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19903 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19904 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19905 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK16RegClassID),
19906 // GIR_Coverage, 20233,
19907 GIR_EraseRootFromParent_Done,
19908 // Label 1461: @50529
19909 GIM_Reject,
19910 // Label 1442: @50530
19911 GIM_Try, /*On fail goto*//*Label 1462*/ GIMT_Encode4(50580), // Rule ID 12482 //
19912 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
19913 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
19914 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s8,
19915 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
19916 // MIs[0] Operand 1
19917 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19918 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19919 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19920 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19921 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19922 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19923 // (setcc:{ *:[v32i1] } immAllZerosV:{ *:[v32i8] }, VR256X:{ *:[v32i8] }:$src, SETGT:{ *:[Other] }) => (VPMOVB2MZ256rr:{ *:[v32i1] } VR256X:{ *:[v32i8] }:$src)
19924 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVB2MZ256rr),
19925 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19926 GIR_RootToRootCopy, /*OpIdx*/3, // src
19927 GIR_RootConstrainSelectedInstOperands,
19928 // GIR_Coverage, 12482,
19929 GIR_EraseRootFromParent_Done,
19930 // Label 1462: @50580
19931 GIM_Try, /*On fail goto*//*Label 1463*/ GIMT_Encode4(50630), // Rule ID 12484 //
19932 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
19933 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
19934 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s16,
19935 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
19936 // MIs[0] Operand 1
19937 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19938 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19939 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19940 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19941 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
19942 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19943 // (setcc:{ *:[v32i1] } immAllZerosV:{ *:[v32i16] }, VR512:{ *:[v32i16] }:$src, SETGT:{ *:[Other] }) => (VPMOVW2MZrr:{ *:[v32i1] } VR512:{ *:[v32i16] }:$src)
19944 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVW2MZrr),
19945 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19946 GIR_RootToRootCopy, /*OpIdx*/3, // src
19947 GIR_RootConstrainSelectedInstOperands,
19948 // GIR_Coverage, 12484,
19949 GIR_EraseRootFromParent_Done,
19950 // Label 1463: @50630
19951 GIM_Try, /*On fail goto*//*Label 1464*/ GIMT_Encode4(50753), // Rule ID 20231 //
19952 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
19953 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
19954 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s8,
19955 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID),
19956 // MIs[0] Operand 1
19957 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19958 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19959 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
19960 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
19961 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
19962 GIM_CheckIsSafeToFold, /*NumInsns*/1,
19963 // (setcc:{ *:[v32i1] } immAllZerosV:{ *:[v32i8] }, VR256X:{ *:[v32i8] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v32i1] } (VPMOVB2MZrr:{ *:[v64i1] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] })), VK32:{ *:[i32] })
19964 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s1,
19965 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8,
19966 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
19967 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
19968 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19969 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
19970 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
19971 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19972 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
19973 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src
19974 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
19975 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
19976 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
19977 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
19978 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMOVB2MZrr),
19979 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
19980 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
19981 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
19982 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
19983 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
19984 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
19985 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK32RegClassID),
19986 // GIR_Coverage, 20231,
19987 GIR_EraseRootFromParent_Done,
19988 // Label 1464: @50753
19989 GIM_Reject,
19990 // Label 1443: @50754
19991 GIM_Try, /*On fail goto*//*Label 1465*/ GIMT_Encode4(50804), // Rule ID 12481 //
19992 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
19993 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
19994 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v64s8,
19995 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID),
19996 // MIs[0] Operand 1
19997 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
19998 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
19999 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20000 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20001 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20002 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20003 // (setcc:{ *:[v64i1] } immAllZerosV:{ *:[v64i8] }, VR512:{ *:[v64i8] }:$src, SETGT:{ *:[Other] }) => (VPMOVB2MZrr:{ *:[v64i1] } VR512:{ *:[v64i8] }:$src)
20004 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMOVB2MZrr),
20005 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20006 GIR_RootToRootCopy, /*OpIdx*/3, // src
20007 GIR_RootConstrainSelectedInstOperands,
20008 // GIR_Coverage, 12481,
20009 GIR_EraseRootFromParent_Done,
20010 // Label 1465: @50804
20011 GIM_Reject,
20012 // Label 1444: @50805
20013 GIM_Reject,
20014 // Label 26: @50806
20015 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(25), /*)*//*default:*//*Label 1478*/ GIMT_Encode4(58705),
20016 /*GILLT_v2s64*//*Label 1466*/ GIMT_Encode4(50885), GIMT_Encode4(0),
20017 /*GILLT_v4s32*//*Label 1467*/ GIMT_Encode4(51737),
20018 /*GILLT_v4s64*//*Label 1468*/ GIMT_Encode4(52589), GIMT_Encode4(0),
20019 /*GILLT_v8s16*//*Label 1469*/ GIMT_Encode4(53441),
20020 /*GILLT_v8s32*//*Label 1470*/ GIMT_Encode4(54711),
20021 /*GILLT_v8s64*//*Label 1471*/ GIMT_Encode4(55563), GIMT_Encode4(0),
20022 /*GILLT_v16s8*//*Label 1472*/ GIMT_Encode4(55938),
20023 /*GILLT_v16s16*//*Label 1473*/ GIMT_Encode4(56372),
20024 /*GILLT_v16s32*//*Label 1474*/ GIMT_Encode4(57642), GIMT_Encode4(0),
20025 /*GILLT_v32s8*//*Label 1475*/ GIMT_Encode4(57983),
20026 /*GILLT_v32s16*//*Label 1476*/ GIMT_Encode4(58417), GIMT_Encode4(0),
20027 /*GILLT_v64s8*//*Label 1477*/ GIMT_Encode4(58619),
20028 // Label 1466: @50885
20029 GIM_Try, /*On fail goto*//*Label 1479*/ GIMT_Encode4(51736),
20030 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1,
20031 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
20032 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
20033 GIM_Try, /*On fail goto*//*Label 1480*/ GIMT_Encode4(50944), // Rule ID 4441 //
20034 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20035 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20036 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20037 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20038 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20039 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20040 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20041 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20042 // (vselect:{ *:[v2f64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2f64] }:$src, immAllZerosV:{ *:[v2f64] }) => (VMOVAPDZ128rrkz:{ *:[v2f64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2f64] }:$src)
20043 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZ128rrkz),
20044 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20045 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20046 GIR_RootToRootCopy, /*OpIdx*/2, // src
20047 GIR_RootConstrainSelectedInstOperands,
20048 // GIR_Coverage, 4441,
20049 GIR_EraseRootFromParent_Done,
20050 // Label 1480: @50944
20051 GIM_Try, /*On fail goto*//*Label 1481*/ GIMT_Encode4(50989), // Rule ID 4495 //
20052 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20053 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20054 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20055 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20056 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20057 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20058 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20059 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20060 // (vselect:{ *:[v2i64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2i64] }:$src, immAllZerosV:{ *:[v2i64] }) => (VMOVDQA64Z128rrkz:{ *:[v2i64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2i64] }:$src)
20061 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Z128rrkz),
20062 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20063 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20064 GIR_RootToRootCopy, /*OpIdx*/2, // src
20065 GIR_RootConstrainSelectedInstOperands,
20066 // GIR_Coverage, 4495,
20067 GIR_EraseRootFromParent_Done,
20068 // Label 1481: @50989
20069 GIM_Try, /*On fail goto*//*Label 1482*/ GIMT_Encode4(51135), // Rule ID 18311 //
20070 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20071 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20072 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20073 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20074 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20075 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20076 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20077 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20078 // (vselect:{ *:[v2f64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2f64] }:$src1, immAllZerosV:{ *:[v2f64] }) => (EXTRACT_SUBREG:{ *:[v2f64] } (VMOVAPDZrrkz:{ *:[v8f64] } (COPY_TO_REGCLASS:{ *:[v8i1] } VK2WM:{ *:[v2i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8f64] } (IMPLICIT_DEF:{ *:[v8f64] }), VR128X:{ *:[v2f64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20079 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20080 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s1,
20081 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20082 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
20083 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20084 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20085 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20086 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20087 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20088 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20089 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20090 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
20091 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20092 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20093 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20094 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20095 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20096 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20097 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20098 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZrrkz),
20099 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20100 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20101 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20102 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20103 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20104 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20105 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20106 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20107 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20108 // GIR_Coverage, 18311,
20109 GIR_EraseRootFromParent_Done,
20110 // Label 1482: @51135
20111 GIM_Try, /*On fail goto*//*Label 1483*/ GIMT_Encode4(51281), // Rule ID 18313 //
20112 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20113 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20114 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20115 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20116 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20117 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20118 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20119 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20120 // (vselect:{ *:[v2i64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2i64] }:$src1, immAllZerosV:{ *:[v2i64] }) => (EXTRACT_SUBREG:{ *:[v2i64] } (VMOVDQA64Zrrkz:{ *:[v8i64] } (COPY_TO_REGCLASS:{ *:[v8i1] } VK2WM:{ *:[v2i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20121 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20122 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s1,
20123 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20124 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
20125 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20126 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20127 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20128 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20129 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20130 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20131 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20132 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
20133 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20134 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20135 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20136 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20137 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20138 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20139 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20140 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrkz),
20141 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20142 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20143 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20144 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20145 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20146 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20147 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20148 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20149 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20150 // GIR_Coverage, 18313,
20151 GIR_EraseRootFromParent_Done,
20152 // Label 1483: @51281
20153 GIM_Try, /*On fail goto*//*Label 1484*/ GIMT_Encode4(51318), // Rule ID 4443 //
20154 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20155 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20156 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20157 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20158 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20159 // (vselect:{ *:[v2f64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src0) => (VMOVAPDZ128rrk:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src0, VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2f64] }:$src1)
20160 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZ128rrk),
20161 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20162 GIR_RootToRootCopy, /*OpIdx*/3, // src0
20163 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20164 GIR_RootToRootCopy, /*OpIdx*/2, // src1
20165 GIR_RootConstrainSelectedInstOperands,
20166 // GIR_Coverage, 4443,
20167 GIR_EraseRootFromParent_Done,
20168 // Label 1484: @51318
20169 GIM_Try, /*On fail goto*//*Label 1485*/ GIMT_Encode4(51355), // Rule ID 4497 //
20170 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20171 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20172 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20173 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20174 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20175 // (vselect:{ *:[v2i64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src0) => (VMOVDQA64Z128rrk:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src0, VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2i64] }:$src1)
20176 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Z128rrk),
20177 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20178 GIR_RootToRootCopy, /*OpIdx*/3, // src0
20179 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20180 GIR_RootToRootCopy, /*OpIdx*/2, // src1
20181 GIR_RootConstrainSelectedInstOperands,
20182 // GIR_Coverage, 4497,
20183 GIR_EraseRootFromParent_Done,
20184 // Label 1485: @51355
20185 GIM_Try, /*On fail goto*//*Label 1486*/ GIMT_Encode4(51545), // Rule ID 18310 //
20186 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20187 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20188 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20189 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20190 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20191 // (vselect:{ *:[v2f64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src0) => (EXTRACT_SUBREG:{ *:[v2f64] } (VMOVAPDZrrk:{ *:[v8f64] } (INSERT_SUBREG:{ *:[v8f64] } (IMPLICIT_DEF:{ *:[v8f64] }), VR128X:{ *:[v2f64] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v8i1] } VK2WM:{ *:[v2i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8f64] } (IMPLICIT_DEF:{ *:[v8f64] }), VR128X:{ *:[v2f64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20192 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20193 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
20194 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20195 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s1,
20196 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
20197 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
20198 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20199 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20200 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
20201 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20202 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20203 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
20204 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
20205 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
20206 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20207 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20208 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20209 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20210 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20211 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
20212 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20213 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20214 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20215 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
20216 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20217 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20218 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
20219 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
20220 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
20221 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20222 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20223 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20224 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZrrk),
20225 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20226 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20227 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
20228 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
20229 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20230 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20231 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20232 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20233 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20234 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20235 // GIR_Coverage, 18310,
20236 GIR_EraseRootFromParent_Done,
20237 // Label 1486: @51545
20238 GIM_Try, /*On fail goto*//*Label 1487*/ GIMT_Encode4(51735), // Rule ID 18312 //
20239 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20240 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20241 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2WMRegClassID),
20242 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20243 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20244 // (vselect:{ *:[v2i64] } VK2WM:{ *:[v2i1] }:$mask, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src0) => (EXTRACT_SUBREG:{ *:[v2i64] } (VMOVDQA64Zrrk:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v8i1] } VK2WM:{ *:[v2i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20245 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20246 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
20247 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20248 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s1,
20249 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
20250 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
20251 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20252 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20253 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
20254 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20255 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20256 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
20257 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
20258 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
20259 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20260 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20261 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20262 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20263 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20264 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
20265 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20266 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20267 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20268 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
20269 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20270 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20271 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
20272 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
20273 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
20274 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20275 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20276 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20277 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrk),
20278 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20279 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20280 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
20281 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
20282 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20283 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20284 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20285 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20286 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20287 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20288 // GIR_Coverage, 18312,
20289 GIR_EraseRootFromParent_Done,
20290 // Label 1487: @51735
20291 GIM_Reject,
20292 // Label 1479: @51736
20293 GIM_Reject,
20294 // Label 1467: @51737
20295 GIM_Try, /*On fail goto*//*Label 1488*/ GIMT_Encode4(52588),
20296 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1,
20297 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
20298 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
20299 GIM_Try, /*On fail goto*//*Label 1489*/ GIMT_Encode4(51796), // Rule ID 4423 //
20300 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20301 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20302 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20303 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20304 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20305 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20306 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20307 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20308 // (vselect:{ *:[v4f32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4f32] }:$src, immAllZerosV:{ *:[v4f32] }) => (VMOVAPSZ128rrkz:{ *:[v4f32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4f32] }:$src)
20309 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZ128rrkz),
20310 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20311 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20312 GIR_RootToRootCopy, /*OpIdx*/2, // src
20313 GIR_RootConstrainSelectedInstOperands,
20314 // GIR_Coverage, 4423,
20315 GIR_EraseRootFromParent_Done,
20316 // Label 1489: @51796
20317 GIM_Try, /*On fail goto*//*Label 1490*/ GIMT_Encode4(51841), // Rule ID 4481 //
20318 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20319 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20320 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20321 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20322 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20323 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20324 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20325 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20326 // (vselect:{ *:[v4i32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4i32] }:$src, immAllZerosV:{ *:[v4i32] }) => (VMOVDQA32Z128rrkz:{ *:[v4i32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4i32] }:$src)
20327 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Z128rrkz),
20328 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20329 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20330 GIR_RootToRootCopy, /*OpIdx*/2, // src
20331 GIR_RootConstrainSelectedInstOperands,
20332 // GIR_Coverage, 4481,
20333 GIR_EraseRootFromParent_Done,
20334 // Label 1490: @51841
20335 GIM_Try, /*On fail goto*//*Label 1491*/ GIMT_Encode4(51987), // Rule ID 18303 //
20336 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20337 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20338 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20339 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20340 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20341 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20342 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20343 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20344 // (vselect:{ *:[v4f32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4f32] }:$src1, immAllZerosV:{ *:[v4f32] }) => (EXTRACT_SUBREG:{ *:[v4f32] } (VMOVAPSZrrkz:{ *:[v16f32] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4WM:{ *:[v4i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16f32] } (IMPLICIT_DEF:{ *:[v16f32] }), VR128X:{ *:[v4f32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20345 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
20346 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
20347 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
20348 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
20349 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20350 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20351 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20352 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20353 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20354 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20355 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20356 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
20357 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20358 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20359 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20360 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20361 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20362 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20363 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20364 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZrrkz),
20365 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20366 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20367 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20368 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20369 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20370 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20371 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20372 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20373 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20374 // GIR_Coverage, 18303,
20375 GIR_EraseRootFromParent_Done,
20376 // Label 1491: @51987
20377 GIM_Try, /*On fail goto*//*Label 1492*/ GIMT_Encode4(52133), // Rule ID 18305 //
20378 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20379 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20380 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20381 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20382 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20383 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20384 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20385 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20386 // (vselect:{ *:[v4i32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4i32] }:$src1, immAllZerosV:{ *:[v4i32] }) => (EXTRACT_SUBREG:{ *:[v4i32] } (VMOVDQA32Zrrkz:{ *:[v16i32] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4WM:{ *:[v4i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20387 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
20388 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
20389 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
20390 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
20391 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20392 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20393 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20394 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20395 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20396 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20397 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20398 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
20399 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20400 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20401 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20402 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20403 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20404 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20405 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20406 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrkz),
20407 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20408 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20409 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20410 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20411 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20412 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20413 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20414 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20415 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20416 // GIR_Coverage, 18305,
20417 GIR_EraseRootFromParent_Done,
20418 // Label 1492: @52133
20419 GIM_Try, /*On fail goto*//*Label 1493*/ GIMT_Encode4(52170), // Rule ID 4425 //
20420 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20421 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20422 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20423 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20424 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20425 // (vselect:{ *:[v4f32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src0) => (VMOVAPSZ128rrk:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src0, VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4f32] }:$src1)
20426 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZ128rrk),
20427 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20428 GIR_RootToRootCopy, /*OpIdx*/3, // src0
20429 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20430 GIR_RootToRootCopy, /*OpIdx*/2, // src1
20431 GIR_RootConstrainSelectedInstOperands,
20432 // GIR_Coverage, 4425,
20433 GIR_EraseRootFromParent_Done,
20434 // Label 1493: @52170
20435 GIM_Try, /*On fail goto*//*Label 1494*/ GIMT_Encode4(52207), // Rule ID 4482 //
20436 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20437 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20438 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20439 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20440 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20441 // (vselect:{ *:[v4i32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src0) => (VMOVDQA32Z128rrk:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src0, VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4i32] }:$src1)
20442 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Z128rrk),
20443 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20444 GIR_RootToRootCopy, /*OpIdx*/3, // src0
20445 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20446 GIR_RootToRootCopy, /*OpIdx*/2, // src1
20447 GIR_RootConstrainSelectedInstOperands,
20448 // GIR_Coverage, 4482,
20449 GIR_EraseRootFromParent_Done,
20450 // Label 1494: @52207
20451 GIM_Try, /*On fail goto*//*Label 1495*/ GIMT_Encode4(52397), // Rule ID 18302 //
20452 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20453 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20454 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20455 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20456 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20457 // (vselect:{ *:[v4f32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src0) => (EXTRACT_SUBREG:{ *:[v4f32] } (VMOVAPSZrrk:{ *:[v16f32] } (INSERT_SUBREG:{ *:[v16f32] } (IMPLICIT_DEF:{ *:[v16f32] }), VR128X:{ *:[v4f32] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4WM:{ *:[v4i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16f32] } (IMPLICIT_DEF:{ *:[v16f32] }), VR128X:{ *:[v4f32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20458 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
20459 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
20460 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
20461 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s1,
20462 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
20463 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v16s32,
20464 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20465 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20466 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
20467 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20468 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20469 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
20470 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
20471 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
20472 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20473 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20474 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20475 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20476 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20477 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
20478 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20479 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20480 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20481 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
20482 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20483 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20484 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
20485 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
20486 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
20487 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20488 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20489 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20490 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZrrk),
20491 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20492 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20493 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
20494 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
20495 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20496 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20497 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20498 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20499 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20500 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20501 // GIR_Coverage, 18302,
20502 GIR_EraseRootFromParent_Done,
20503 // Label 1495: @52397
20504 GIM_Try, /*On fail goto*//*Label 1496*/ GIMT_Encode4(52587), // Rule ID 18304 //
20505 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20506 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20507 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20508 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20509 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20510 // (vselect:{ *:[v4i32] } VK4WM:{ *:[v4i1] }:$mask, VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src0) => (EXTRACT_SUBREG:{ *:[v4i32] } (VMOVDQA32Zrrk:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4WM:{ *:[v4i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20511 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
20512 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
20513 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
20514 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s1,
20515 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
20516 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v16s32,
20517 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20518 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20519 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
20520 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20521 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20522 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
20523 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
20524 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
20525 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20526 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20527 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20528 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20529 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20530 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
20531 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20532 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20533 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20534 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
20535 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20536 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20537 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
20538 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
20539 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
20540 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20541 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20542 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20543 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrk),
20544 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20545 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20546 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
20547 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
20548 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20549 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20550 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20551 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20552 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20553 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20554 // GIR_Coverage, 18304,
20555 GIR_EraseRootFromParent_Done,
20556 // Label 1496: @52587
20557 GIM_Reject,
20558 // Label 1488: @52588
20559 GIM_Reject,
20560 // Label 1468: @52589
20561 GIM_Try, /*On fail goto*//*Label 1497*/ GIMT_Encode4(53440),
20562 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1,
20563 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
20564 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
20565 GIM_Try, /*On fail goto*//*Label 1498*/ GIMT_Encode4(52648), // Rule ID 4436 //
20566 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20567 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20568 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20569 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20570 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20571 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20572 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20573 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20574 // (vselect:{ *:[v4f64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4f64] }:$src, immAllZerosV:{ *:[v4f64] }) => (VMOVAPDZ256rrkz:{ *:[v4f64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4f64] }:$src)
20575 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZ256rrkz),
20576 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20577 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20578 GIR_RootToRootCopy, /*OpIdx*/2, // src
20579 GIR_RootConstrainSelectedInstOperands,
20580 // GIR_Coverage, 4436,
20581 GIR_EraseRootFromParent_Done,
20582 // Label 1498: @52648
20583 GIM_Try, /*On fail goto*//*Label 1499*/ GIMT_Encode4(52693), // Rule ID 4490 //
20584 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20585 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20586 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20587 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20588 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20589 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20590 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20591 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20592 // (vselect:{ *:[v4i64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4i64] }:$src, immAllZerosV:{ *:[v4i64] }) => (VMOVDQA64Z256rrkz:{ *:[v4i64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4i64] }:$src)
20593 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Z256rrkz),
20594 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20595 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20596 GIR_RootToRootCopy, /*OpIdx*/2, // src
20597 GIR_RootConstrainSelectedInstOperands,
20598 // GIR_Coverage, 4490,
20599 GIR_EraseRootFromParent_Done,
20600 // Label 1499: @52693
20601 GIM_Try, /*On fail goto*//*Label 1500*/ GIMT_Encode4(52839), // Rule ID 18315 //
20602 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20603 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20604 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20605 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20606 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20607 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20608 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20609 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20610 // (vselect:{ *:[v4f64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4f64] }:$src1, immAllZerosV:{ *:[v4f64] }) => (EXTRACT_SUBREG:{ *:[v4f64] } (VMOVAPDZrrkz:{ *:[v8f64] } (COPY_TO_REGCLASS:{ *:[v8i1] } VK4WM:{ *:[v4i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8f64] } (IMPLICIT_DEF:{ *:[v8f64] }), VR256X:{ *:[v4f64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
20611 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20612 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s1,
20613 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20614 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
20615 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20616 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20617 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20618 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20619 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20620 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20621 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20622 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
20623 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20624 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20625 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
20626 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20627 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20628 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20629 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20630 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZrrkz),
20631 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20632 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20633 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20634 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20635 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20636 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20637 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
20638 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
20639 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20640 // GIR_Coverage, 18315,
20641 GIR_EraseRootFromParent_Done,
20642 // Label 1500: @52839
20643 GIM_Try, /*On fail goto*//*Label 1501*/ GIMT_Encode4(52985), // Rule ID 18317 //
20644 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20645 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20646 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20647 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20648 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20649 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20650 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20651 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20652 // (vselect:{ *:[v4i64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4i64] }:$src1, immAllZerosV:{ *:[v4i64] }) => (EXTRACT_SUBREG:{ *:[v4i64] } (VMOVDQA64Zrrkz:{ *:[v8i64] } (COPY_TO_REGCLASS:{ *:[v8i1] } VK4WM:{ *:[v4i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
20653 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20654 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s1,
20655 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20656 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
20657 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20658 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20659 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20660 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20661 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20662 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20663 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20664 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
20665 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20666 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20667 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
20668 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20669 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20670 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20671 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20672 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrkz),
20673 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20674 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20675 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20676 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20677 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20678 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20679 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
20680 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
20681 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20682 // GIR_Coverage, 18317,
20683 GIR_EraseRootFromParent_Done,
20684 // Label 1501: @52985
20685 GIM_Try, /*On fail goto*//*Label 1502*/ GIMT_Encode4(53022), // Rule ID 4438 //
20686 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20687 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20688 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20689 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20690 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20691 // (vselect:{ *:[v4f64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src0) => (VMOVAPDZ256rrk:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src0, VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4f64] }:$src1)
20692 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZ256rrk),
20693 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20694 GIR_RootToRootCopy, /*OpIdx*/3, // src0
20695 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20696 GIR_RootToRootCopy, /*OpIdx*/2, // src1
20697 GIR_RootConstrainSelectedInstOperands,
20698 // GIR_Coverage, 4438,
20699 GIR_EraseRootFromParent_Done,
20700 // Label 1502: @53022
20701 GIM_Try, /*On fail goto*//*Label 1503*/ GIMT_Encode4(53059), // Rule ID 4492 //
20702 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
20703 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20704 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20705 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20706 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20707 // (vselect:{ *:[v4i64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src0) => (VMOVDQA64Z256rrk:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src0, VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4i64] }:$src1)
20708 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Z256rrk),
20709 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20710 GIR_RootToRootCopy, /*OpIdx*/3, // src0
20711 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20712 GIR_RootToRootCopy, /*OpIdx*/2, // src1
20713 GIR_RootConstrainSelectedInstOperands,
20714 // GIR_Coverage, 4492,
20715 GIR_EraseRootFromParent_Done,
20716 // Label 1503: @53059
20717 GIM_Try, /*On fail goto*//*Label 1504*/ GIMT_Encode4(53249), // Rule ID 18314 //
20718 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20719 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20720 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20721 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20722 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20723 // (vselect:{ *:[v4f64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src0) => (EXTRACT_SUBREG:{ *:[v4f64] } (VMOVAPDZrrk:{ *:[v8f64] } (INSERT_SUBREG:{ *:[v8f64] } (IMPLICIT_DEF:{ *:[v8f64] }), VR256X:{ *:[v4f64] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v8i1] } VK4WM:{ *:[v4i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8f64] } (IMPLICIT_DEF:{ *:[v8f64] }), VR256X:{ *:[v4f64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
20724 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20725 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
20726 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20727 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s1,
20728 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
20729 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
20730 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20731 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20732 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
20733 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20734 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20735 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
20736 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
20737 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
20738 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20739 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20740 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
20741 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20742 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20743 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
20744 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20745 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20746 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20747 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
20748 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20749 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20750 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
20751 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
20752 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
20753 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20754 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20755 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
20756 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZrrk),
20757 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20758 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20759 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
20760 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
20761 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20762 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20763 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20764 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
20765 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
20766 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20767 // GIR_Coverage, 18314,
20768 GIR_EraseRootFromParent_Done,
20769 // Label 1504: @53249
20770 GIM_Try, /*On fail goto*//*Label 1505*/ GIMT_Encode4(53439), // Rule ID 18316 //
20771 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
20772 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20773 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4WMRegClassID),
20774 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20775 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
20776 // (vselect:{ *:[v4i64] } VK4WM:{ *:[v4i1] }:$mask, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src0) => (EXTRACT_SUBREG:{ *:[v4i64] } (VMOVDQA64Zrrk:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v8i1] } VK4WM:{ *:[v4i1] }:$mask, VK8WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
20777 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64,
20778 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
20779 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
20780 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s1,
20781 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
20782 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64,
20783 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20784 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20785 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
20786 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20787 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20788 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
20789 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
20790 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
20791 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20792 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20793 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
20794 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20795 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20796 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
20797 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20798 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20799 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20800 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
20801 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20802 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20803 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
20804 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
20805 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
20806 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20807 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20808 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
20809 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrk),
20810 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20811 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20812 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
20813 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
20814 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20815 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20816 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20817 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
20818 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
20819 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20820 // GIR_Coverage, 18316,
20821 GIR_EraseRootFromParent_Done,
20822 // Label 1505: @53439
20823 GIM_Reject,
20824 // Label 1497: @53440
20825 GIM_Reject,
20826 // Label 1469: @53441
20827 GIM_Try, /*On fail goto*//*Label 1506*/ GIMT_Encode4(54710),
20828 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
20829 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
20830 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
20831 GIM_Try, /*On fail goto*//*Label 1507*/ GIMT_Encode4(53500), // Rule ID 4523 //
20832 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
20833 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20834 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
20835 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20836 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20837 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20838 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20839 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20840 // (vselect:{ *:[v8i16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8i16] }:$src, immAllZerosV:{ *:[v8i16] }) => (VMOVDQU16Z128rrkz:{ *:[v8i16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8i16] }:$src)
20841 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z128rrkz),
20842 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20843 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20844 GIR_RootToRootCopy, /*OpIdx*/2, // src
20845 GIR_RootConstrainSelectedInstOperands,
20846 // GIR_Coverage, 4523,
20847 GIR_EraseRootFromParent_Done,
20848 // Label 1507: @53500
20849 GIM_Try, /*On fail goto*//*Label 1508*/ GIMT_Encode4(53646), // Rule ID 18323 //
20850 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
20851 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20852 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
20853 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20854 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20855 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20856 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20857 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20858 // (vselect:{ *:[v8i16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8i16] }:$src1, immAllZerosV:{ *:[v8i16] }) => (EXTRACT_SUBREG:{ *:[v8i16] } (VMOVDQU16Zrrkz:{ *:[v32i16] } (COPY_TO_REGCLASS:{ *:[v32i1] } VK8WM:{ *:[v8i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR128X:{ *:[v8i16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20859 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
20860 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s1,
20861 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
20862 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s16,
20863 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20864 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20865 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20866 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20867 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20868 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20869 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20870 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
20871 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20872 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20873 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20874 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20875 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20876 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20877 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20878 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
20879 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20880 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20881 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20882 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20883 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20884 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20885 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20886 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20887 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20888 // GIR_Coverage, 18323,
20889 GIR_EraseRootFromParent_Done,
20890 // Label 1508: @53646
20891 GIM_Try, /*On fail goto*//*Label 1509*/ GIMT_Encode4(53792), // Rule ID 18327 //
20892 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
20893 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20894 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
20895 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20896 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20897 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20898 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20899 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20900 // (vselect:{ *:[v8f16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8f16] }:$src1, immAllZerosV:{ *:[v8f16] }) => (EXTRACT_SUBREG:{ *:[v8f16] } (VMOVDQU16Zrrkz:{ *:[v32f16] } (COPY_TO_REGCLASS:{ *:[v32i1] } VK8WM:{ *:[v8i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32f16] } (IMPLICIT_DEF:{ *:[v32f16] }), VR128X:{ *:[v8f16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20901 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
20902 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s1,
20903 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
20904 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s16,
20905 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20906 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20907 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20908 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20909 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20910 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20911 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20912 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
20913 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20914 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20915 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20916 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20917 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20918 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20919 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20920 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
20921 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20922 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20923 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20924 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20925 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20926 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20927 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20928 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20929 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20930 // GIR_Coverage, 18327,
20931 GIR_EraseRootFromParent_Done,
20932 // Label 1509: @53792
20933 GIM_Try, /*On fail goto*//*Label 1510*/ GIMT_Encode4(53938), // Rule ID 18331 //
20934 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
20935 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
20936 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
20937 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20938 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20939 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20940 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20941 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20942 // (vselect:{ *:[v8bf16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8bf16] }:$src1, immAllZerosV:{ *:[v8bf16] }) => (EXTRACT_SUBREG:{ *:[v8bf16] } (VMOVDQU16Zrrkz:{ *:[v32bf16] } (COPY_TO_REGCLASS:{ *:[v32i1] } VK8WM:{ *:[v8i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32bf16] } (IMPLICIT_DEF:{ *:[v32bf16] }), VR128X:{ *:[v8bf16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
20943 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
20944 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s1,
20945 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
20946 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s16,
20947 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
20948 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20949 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
20950 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
20951 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20952 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
20953 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
20954 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
20955 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
20956 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20957 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
20958 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20959 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20960 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
20961 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
20962 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
20963 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
20964 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
20965 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
20966 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
20967 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
20968 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20969 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
20970 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
20971 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
20972 // GIR_Coverage, 18331,
20973 GIR_EraseRootFromParent_Done,
20974 // Label 1510: @53938
20975 GIM_Try, /*On fail goto*//*Label 1511*/ GIMT_Encode4(53983), // Rule ID 18415 //
20976 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
20977 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20978 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
20979 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20980 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20981 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
20982 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
20983 GIM_CheckIsSafeToFold, /*NumInsns*/1,
20984 // (vselect:{ *:[v8f16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8f16] }:$src1, immAllZerosV:{ *:[v8f16] }) => (VMOVDQU16Z128rrkz:{ *:[v8f16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8f16] }:$src1)
20985 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z128rrkz),
20986 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
20987 GIR_RootToRootCopy, /*OpIdx*/1, // mask
20988 GIR_RootToRootCopy, /*OpIdx*/2, // src1
20989 GIR_RootConstrainSelectedInstOperands,
20990 // GIR_Coverage, 18415,
20991 GIR_EraseRootFromParent_Done,
20992 // Label 1511: @53983
20993 GIM_Try, /*On fail goto*//*Label 1512*/ GIMT_Encode4(54028), // Rule ID 18445 //
20994 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
20995 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20996 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
20997 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
20998 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
20999 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21000 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21001 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21002 // (vselect:{ *:[v8bf16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8bf16] }:$src1, immAllZerosV:{ *:[v8bf16] }) => (VMOVDQU16Z128rrkz:{ *:[v8bf16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8bf16] }:$src1)
21003 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z128rrkz),
21004 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21005 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21006 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21007 GIR_RootConstrainSelectedInstOperands,
21008 // GIR_Coverage, 18445,
21009 GIR_EraseRootFromParent_Done,
21010 // Label 1512: @54028
21011 GIM_Try, /*On fail goto*//*Label 1513*/ GIMT_Encode4(54065), // Rule ID 4524 //
21012 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21013 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21014 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21015 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21016 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21017 // (vselect:{ *:[v8i16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src0) => (VMOVDQU16Z128rrk:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src0, VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8i16] }:$src1)
21018 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z128rrk),
21019 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21020 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21021 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21022 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21023 GIR_RootConstrainSelectedInstOperands,
21024 // GIR_Coverage, 4524,
21025 GIR_EraseRootFromParent_Done,
21026 // Label 1513: @54065
21027 GIM_Try, /*On fail goto*//*Label 1514*/ GIMT_Encode4(54255), // Rule ID 18322 //
21028 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21029 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21030 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21031 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21032 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21033 // (vselect:{ *:[v8i16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src0) => (EXTRACT_SUBREG:{ *:[v8i16] } (VMOVDQU16Zrrk:{ *:[v32i16] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR128X:{ *:[v8i16] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v32i1] } VK8WM:{ *:[v8i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR128X:{ *:[v8i16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
21034 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
21035 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
21036 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
21037 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s1,
21038 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v32s16,
21039 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v32s16,
21040 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21041 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21042 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
21043 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21044 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21045 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
21046 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
21047 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
21048 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21049 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21050 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21051 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21052 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21053 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
21054 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21055 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21056 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21057 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
21058 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21059 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21060 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
21061 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
21062 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
21063 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21064 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21065 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21066 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
21067 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21068 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21069 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
21070 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
21071 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21072 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21073 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21074 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
21075 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
21076 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21077 // GIR_Coverage, 18322,
21078 GIR_EraseRootFromParent_Done,
21079 // Label 1514: @54255
21080 GIM_Try, /*On fail goto*//*Label 1515*/ GIMT_Encode4(54445), // Rule ID 18326 //
21081 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21082 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21083 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21084 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21085 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21086 // (vselect:{ *:[v8f16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src0) => (EXTRACT_SUBREG:{ *:[v8f16] } (VMOVDQU16Zrrk:{ *:[v32f16] } (INSERT_SUBREG:{ *:[v32f16] } (IMPLICIT_DEF:{ *:[v32f16] }), VR128X:{ *:[v8f16] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v32i1] } VK8WM:{ *:[v8i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32f16] } (IMPLICIT_DEF:{ *:[v32f16] }), VR128X:{ *:[v8f16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
21087 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
21088 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
21089 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
21090 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s1,
21091 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v32s16,
21092 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v32s16,
21093 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21094 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21095 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
21096 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21097 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21098 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
21099 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
21100 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
21101 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21102 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21103 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21104 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21105 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21106 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
21107 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21108 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21109 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21110 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
21111 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21112 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21113 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
21114 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
21115 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
21116 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21117 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21118 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21119 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
21120 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21121 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21122 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
21123 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
21124 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21125 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21126 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21127 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
21128 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
21129 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21130 // GIR_Coverage, 18326,
21131 GIR_EraseRootFromParent_Done,
21132 // Label 1515: @54445
21133 GIM_Try, /*On fail goto*//*Label 1516*/ GIMT_Encode4(54635), // Rule ID 18330 //
21134 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21135 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21136 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21137 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21138 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21139 // (vselect:{ *:[v8bf16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8bf16] }:$src1, VR128X:{ *:[v8bf16] }:$src0) => (EXTRACT_SUBREG:{ *:[v8bf16] } (VMOVDQU16Zrrk:{ *:[v32bf16] } (INSERT_SUBREG:{ *:[v32bf16] } (IMPLICIT_DEF:{ *:[v32bf16] }), VR128X:{ *:[v8bf16] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v32i1] } VK8WM:{ *:[v8i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32bf16] } (IMPLICIT_DEF:{ *:[v32bf16] }), VR128X:{ *:[v8bf16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
21140 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
21141 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
21142 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
21143 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s1,
21144 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v32s16,
21145 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v32s16,
21146 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21147 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21148 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
21149 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21150 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21151 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
21152 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
21153 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
21154 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21155 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21156 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21157 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21158 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21159 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
21160 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21161 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21162 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21163 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
21164 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21165 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21166 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
21167 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
21168 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
21169 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21170 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21171 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21172 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
21173 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21174 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21175 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
21176 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
21177 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21178 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21179 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21180 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
21181 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
21182 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21183 // GIR_Coverage, 18330,
21184 GIR_EraseRootFromParent_Done,
21185 // Label 1516: @54635
21186 GIM_Try, /*On fail goto*//*Label 1517*/ GIMT_Encode4(54672), // Rule ID 18414 //
21187 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21188 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21189 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21190 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21191 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21192 // (vselect:{ *:[v8f16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src0) => (VMOVDQU16Z128rrk:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src0, VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8f16] }:$src1)
21193 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z128rrk),
21194 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21195 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21196 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21197 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21198 GIR_RootConstrainSelectedInstOperands,
21199 // GIR_Coverage, 18414,
21200 GIR_EraseRootFromParent_Done,
21201 // Label 1517: @54672
21202 GIM_Try, /*On fail goto*//*Label 1518*/ GIMT_Encode4(54709), // Rule ID 18444 //
21203 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21204 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21205 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21206 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21207 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21208 // (vselect:{ *:[v8bf16] } VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8bf16] }:$src1, VR128X:{ *:[v8bf16] }:$src0) => (VMOVDQU16Z128rrk:{ *:[v8bf16] } VR128X:{ *:[v8bf16] }:$src0, VK8WM:{ *:[v8i1] }:$mask, VR128X:{ *:[v8bf16] }:$src1)
21209 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z128rrk),
21210 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21211 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21212 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21213 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21214 GIR_RootConstrainSelectedInstOperands,
21215 // GIR_Coverage, 18444,
21216 GIR_EraseRootFromParent_Done,
21217 // Label 1518: @54709
21218 GIM_Reject,
21219 // Label 1506: @54710
21220 GIM_Reject,
21221 // Label 1470: @54711
21222 GIM_Try, /*On fail goto*//*Label 1519*/ GIMT_Encode4(55562),
21223 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
21224 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
21225 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
21226 GIM_Try, /*On fail goto*//*Label 1520*/ GIMT_Encode4(54770), // Rule ID 4418 //
21227 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
21228 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21229 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21230 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21231 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21232 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21233 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21234 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21235 // (vselect:{ *:[v8f32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8f32] }:$src, immAllZerosV:{ *:[v8f32] }) => (VMOVAPSZ256rrkz:{ *:[v8f32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8f32] }:$src)
21236 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZ256rrkz),
21237 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21238 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21239 GIR_RootToRootCopy, /*OpIdx*/2, // src
21240 GIR_RootConstrainSelectedInstOperands,
21241 // GIR_Coverage, 4418,
21242 GIR_EraseRootFromParent_Done,
21243 // Label 1520: @54770
21244 GIM_Try, /*On fail goto*//*Label 1521*/ GIMT_Encode4(54815), // Rule ID 4477 //
21245 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
21246 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21247 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21248 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21249 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21250 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21251 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21252 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21253 // (vselect:{ *:[v8i32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8i32] }:$src, immAllZerosV:{ *:[v8i32] }) => (VMOVDQA32Z256rrkz:{ *:[v8i32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8i32] }:$src)
21254 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Z256rrkz),
21255 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21256 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21257 GIR_RootToRootCopy, /*OpIdx*/2, // src
21258 GIR_RootConstrainSelectedInstOperands,
21259 // GIR_Coverage, 4477,
21260 GIR_EraseRootFromParent_Done,
21261 // Label 1521: @54815
21262 GIM_Try, /*On fail goto*//*Label 1522*/ GIMT_Encode4(54961), // Rule ID 18307 //
21263 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
21264 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21265 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21266 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21267 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21268 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21269 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21270 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21271 // (vselect:{ *:[v8f32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8f32] }:$src1, immAllZerosV:{ *:[v8f32] }) => (EXTRACT_SUBREG:{ *:[v8f32] } (VMOVAPSZrrkz:{ *:[v16f32] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8WM:{ *:[v8i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16f32] } (IMPLICIT_DEF:{ *:[v16f32] }), VR256X:{ *:[v8f32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21272 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
21273 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
21274 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
21275 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
21276 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21277 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21278 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21279 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21280 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21281 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
21282 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
21283 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
21284 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21285 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21286 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21287 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21288 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21289 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
21290 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
21291 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZrrkz),
21292 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21293 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21294 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
21295 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21296 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21297 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21298 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
21299 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
21300 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21301 // GIR_Coverage, 18307,
21302 GIR_EraseRootFromParent_Done,
21303 // Label 1522: @54961
21304 GIM_Try, /*On fail goto*//*Label 1523*/ GIMT_Encode4(55107), // Rule ID 18309 //
21305 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
21306 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21307 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21308 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21309 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21310 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21311 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21312 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21313 // (vselect:{ *:[v8i32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8i32] }:$src1, immAllZerosV:{ *:[v8i32] }) => (EXTRACT_SUBREG:{ *:[v8i32] } (VMOVDQA32Zrrkz:{ *:[v16i32] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8WM:{ *:[v8i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21314 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
21315 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
21316 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
21317 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32,
21318 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21319 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21320 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21321 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21322 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21323 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
21324 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
21325 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
21326 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21327 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21328 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21329 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21330 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21331 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
21332 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
21333 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrkz),
21334 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21335 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21336 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
21337 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21338 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21339 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21340 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
21341 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
21342 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21343 // GIR_Coverage, 18309,
21344 GIR_EraseRootFromParent_Done,
21345 // Label 1523: @55107
21346 GIM_Try, /*On fail goto*//*Label 1524*/ GIMT_Encode4(55144), // Rule ID 4420 //
21347 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
21348 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21349 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21350 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21351 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21352 // (vselect:{ *:[v8f32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src0) => (VMOVAPSZ256rrk:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src0, VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8f32] }:$src1)
21353 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZ256rrk),
21354 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21355 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21356 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21357 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21358 GIR_RootConstrainSelectedInstOperands,
21359 // GIR_Coverage, 4420,
21360 GIR_EraseRootFromParent_Done,
21361 // Label 1524: @55144
21362 GIM_Try, /*On fail goto*//*Label 1525*/ GIMT_Encode4(55181), // Rule ID 4478 //
21363 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
21364 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21365 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21366 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21367 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21368 // (vselect:{ *:[v8i32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src0) => (VMOVDQA32Z256rrk:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src0, VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8i32] }:$src1)
21369 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Z256rrk),
21370 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21371 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21372 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21373 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21374 GIR_RootConstrainSelectedInstOperands,
21375 // GIR_Coverage, 4478,
21376 GIR_EraseRootFromParent_Done,
21377 // Label 1525: @55181
21378 GIM_Try, /*On fail goto*//*Label 1526*/ GIMT_Encode4(55371), // Rule ID 18306 //
21379 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
21380 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21381 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21382 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21383 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21384 // (vselect:{ *:[v8f32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src0) => (EXTRACT_SUBREG:{ *:[v8f32] } (VMOVAPSZrrk:{ *:[v16f32] } (INSERT_SUBREG:{ *:[v16f32] } (IMPLICIT_DEF:{ *:[v16f32] }), VR256X:{ *:[v8f32] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8WM:{ *:[v8i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16f32] } (IMPLICIT_DEF:{ *:[v16f32] }), VR256X:{ *:[v8f32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21385 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
21386 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
21387 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
21388 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s1,
21389 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
21390 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v16s32,
21391 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21392 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21393 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
21394 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21395 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21396 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
21397 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
21398 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
21399 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21400 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21401 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21402 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21403 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21404 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
21405 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21406 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21407 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21408 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
21409 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21410 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21411 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
21412 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
21413 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
21414 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21415 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21416 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21417 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZrrk),
21418 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21419 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21420 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
21421 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
21422 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21423 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21424 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21425 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
21426 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
21427 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21428 // GIR_Coverage, 18306,
21429 GIR_EraseRootFromParent_Done,
21430 // Label 1526: @55371
21431 GIM_Try, /*On fail goto*//*Label 1527*/ GIMT_Encode4(55561), // Rule ID 18308 //
21432 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
21433 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21434 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21435 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21436 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21437 // (vselect:{ *:[v8i32] } VK8WM:{ *:[v8i1] }:$mask, VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src0) => (EXTRACT_SUBREG:{ *:[v8i32] } (VMOVDQA32Zrrk:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8WM:{ *:[v8i1] }:$mask, VK16WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21438 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
21439 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
21440 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
21441 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s1,
21442 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32,
21443 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v16s32,
21444 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21445 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21446 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
21447 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21448 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21449 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
21450 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
21451 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
21452 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21453 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21454 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21455 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21456 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21457 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
21458 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21459 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21460 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21461 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
21462 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21463 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21464 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
21465 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
21466 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
21467 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21468 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21469 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21470 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrk),
21471 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21472 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21473 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
21474 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
21475 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21476 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21477 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21478 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
21479 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
21480 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21481 // GIR_Coverage, 18308,
21482 GIR_EraseRootFromParent_Done,
21483 // Label 1527: @55561
21484 GIM_Reject,
21485 // Label 1519: @55562
21486 GIM_Reject,
21487 // Label 1471: @55563
21488 GIM_Try, /*On fail goto*//*Label 1528*/ GIMT_Encode4(55937),
21489 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1,
21490 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
21491 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
21492 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21493 GIM_Try, /*On fail goto*//*Label 1529*/ GIMT_Encode4(55650), // Rule ID 18300 //
21494 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
21495 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
21496 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
21497 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1,
21498 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID),
21499 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
21500 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21501 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
21502 GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/2, // MIs[3]
21503 GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21504 GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
21505 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21506 GIM_CheckIsSafeToFold, /*NumInsns*/3,
21507 // (vselect:{ *:[v8i64] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$mask, immAllOnesV:{ *:[v8i1] }), immAllZerosV:{ *:[v8i64] }, VR512:{ *:[v8i64] }:$src) => (VMOVDQA64Zrrkz:{ *:[v8i64] } VK8:{ *:[v8i1] }:$mask, VR512:{ *:[v8i64] }:$src)
21508 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrkz),
21509 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21510 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // mask
21511 GIR_RootToRootCopy, /*OpIdx*/3, // src
21512 GIR_RootConstrainSelectedInstOperands,
21513 // GIR_Coverage, 18300,
21514 GIR_EraseRootFromParent_Done,
21515 // Label 1529: @55650
21516 GIM_Try, /*On fail goto*//*Label 1530*/ GIMT_Encode4(55697), // Rule ID 3551 //
21517 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
21518 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21519 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
21520 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21521 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
21522 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
21523 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21524 GIM_CheckIsBuildVectorAllZeros, /*MI*/2,
21525 GIM_CheckIsSafeToFold, /*NumInsns*/2,
21526 // (vselect:{ *:[v8i64] } VK8WM:{ *:[v8i1] }:$mask, immAllOnesV:{ *:[v8i64] }, immAllZerosV:{ *:[v8i64] }) => (AVX512_512_SEXT_MASK_64:{ *:[v8i64] } VK8WM:{ *:[v8i1] }:$mask)
21527 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AVX512_512_SEXT_MASK_64),
21528 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21529 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21530 GIR_RootConstrainSelectedInstOperands,
21531 // GIR_Coverage, 3551,
21532 GIR_EraseRootFromParent_Done,
21533 // Label 1530: @55697
21534 GIM_Try, /*On fail goto*//*Label 1531*/ GIMT_Encode4(55788), // Rule ID 18298 //
21535 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21536 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
21537 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21538 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21539 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21540 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21541 // (vselect:{ *:[v8i64] } VK8WM:{ *:[v8i1] }:$mask, immAllZerosV:{ *:[v8i64] }, VR512:{ *:[v8i64] }:$src) => (VMOVDQA64Zrrkz:{ *:[v8i64] } (COPY_TO_REGCLASS:{ *:[v8i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$mask, VK16:{ *:[i32] })), VK8:{ *:[i32] }), VR512:{ *:[v8i64] }:$src)
21542 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s1,
21543 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
21544 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
21545 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21546 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21547 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // mask
21548 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
21549 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(X86::KNOTWrr),
21550 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21551 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
21552 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
21553 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21554 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21555 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21556 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21557 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrkz),
21558 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21559 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
21560 GIR_RootToRootCopy, /*OpIdx*/3, // src
21561 GIR_RootConstrainSelectedInstOperands,
21562 // GIR_Coverage, 18298,
21563 GIR_EraseRootFromParent_Done,
21564 // Label 1531: @55788
21565 GIM_Try, /*On fail goto*//*Label 1532*/ GIMT_Encode4(55829), // Rule ID 4431 //
21566 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
21567 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21568 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21569 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21570 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21571 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21572 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21573 // (vselect:{ *:[v8f64] } VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8f64] }:$src, immAllZerosV:{ *:[v8f64] }) => (VMOVAPDZrrkz:{ *:[v8f64] } VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8f64] }:$src)
21574 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZrrkz),
21575 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21576 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21577 GIR_RootToRootCopy, /*OpIdx*/2, // src
21578 GIR_RootConstrainSelectedInstOperands,
21579 // GIR_Coverage, 4431,
21580 GIR_EraseRootFromParent_Done,
21581 // Label 1532: @55829
21582 GIM_Try, /*On fail goto*//*Label 1533*/ GIMT_Encode4(55870), // Rule ID 4485 //
21583 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
21584 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21585 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21586 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21587 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21588 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21589 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21590 // (vselect:{ *:[v8i64] } VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8i64] }:$src, immAllZerosV:{ *:[v8i64] }) => (VMOVDQA64Zrrkz:{ *:[v8i64] } VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8i64] }:$src)
21591 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrkz),
21592 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21593 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21594 GIR_RootToRootCopy, /*OpIdx*/2, // src
21595 GIR_RootConstrainSelectedInstOperands,
21596 // GIR_Coverage, 4485,
21597 GIR_EraseRootFromParent_Done,
21598 // Label 1533: @55870
21599 GIM_Try, /*On fail goto*//*Label 1534*/ GIMT_Encode4(55903), // Rule ID 4433 //
21600 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
21601 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21602 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21603 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21604 // (vselect:{ *:[v8f64] } VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src0) => (VMOVAPDZrrk:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src0, VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8f64] }:$src1)
21605 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPDZrrk),
21606 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21607 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21608 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21609 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21610 GIR_RootConstrainSelectedInstOperands,
21611 // GIR_Coverage, 4433,
21612 GIR_EraseRootFromParent_Done,
21613 // Label 1534: @55903
21614 GIM_Try, /*On fail goto*//*Label 1535*/ GIMT_Encode4(55936), // Rule ID 4487 //
21615 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
21616 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8WMRegClassID),
21617 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21618 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21619 // (vselect:{ *:[v8i64] } VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src0) => (VMOVDQA64Zrrk:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src0, VK8WM:{ *:[v8i1] }:$mask, VR512:{ *:[v8i64] }:$src1)
21620 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA64Zrrk),
21621 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21622 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21623 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21624 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21625 GIR_RootConstrainSelectedInstOperands,
21626 // GIR_Coverage, 4487,
21627 GIR_EraseRootFromParent_Done,
21628 // Label 1535: @55936
21629 GIM_Reject,
21630 // Label 1528: @55937
21631 GIM_Reject,
21632 // Label 1472: @55938
21633 GIM_Try, /*On fail goto*//*Label 1536*/ GIMT_Encode4(56371),
21634 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
21635 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
21636 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
21637 GIM_Try, /*On fail goto*//*Label 1537*/ GIMT_Encode4(55997), // Rule ID 4511 //
21638 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21639 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21640 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21641 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21642 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21643 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21644 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21645 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21646 // (vselect:{ *:[v16i8] } VK16WM:{ *:[v16i1] }:$mask, VR128X:{ *:[v16i8] }:$src, immAllZerosV:{ *:[v16i8] }) => (VMOVDQU8Z128rrkz:{ *:[v16i8] } VK16WM:{ *:[v16i1] }:$mask, VR128X:{ *:[v16i8] }:$src)
21647 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Z128rrkz),
21648 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21649 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21650 GIR_RootToRootCopy, /*OpIdx*/2, // src
21651 GIR_RootConstrainSelectedInstOperands,
21652 // GIR_Coverage, 4511,
21653 GIR_EraseRootFromParent_Done,
21654 // Label 1537: @55997
21655 GIM_Try, /*On fail goto*//*Label 1538*/ GIMT_Encode4(56143), // Rule ID 18319 //
21656 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21657 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21658 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21659 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21660 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21661 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21662 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21663 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21664 // (vselect:{ *:[v16i8] } VK16WM:{ *:[v16i1] }:$mask, VR128X:{ *:[v16i8] }:$src1, immAllZerosV:{ *:[v16i8] }) => (EXTRACT_SUBREG:{ *:[v16i8] } (VMOVDQU8Zrrkz:{ *:[v64i8] } (COPY_TO_REGCLASS:{ *:[v64i1] } VK16WM:{ *:[v16i1] }:$mask, VK64WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR128X:{ *:[v16i8] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
21665 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
21666 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s1,
21667 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
21668 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v64s8,
21669 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21670 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21671 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21672 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21673 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21674 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
21675 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
21676 GIR_AddImm8, /*InsnID*/3, /*Imm*/9,
21677 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21678 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21679 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21680 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21681 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21682 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
21683 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
21684 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Zrrkz),
21685 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21686 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21687 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
21688 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21689 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21690 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21691 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
21692 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
21693 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21694 // GIR_Coverage, 18319,
21695 GIR_EraseRootFromParent_Done,
21696 // Label 1538: @56143
21697 GIM_Try, /*On fail goto*//*Label 1539*/ GIMT_Encode4(56180), // Rule ID 4512 //
21698 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21699 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21700 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21701 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21702 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21703 // (vselect:{ *:[v16i8] } VK16WM:{ *:[v16i1] }:$mask, VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src0) => (VMOVDQU8Z128rrk:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src0, VK16WM:{ *:[v16i1] }:$mask, VR128X:{ *:[v16i8] }:$src1)
21704 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Z128rrk),
21705 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21706 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21707 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21708 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21709 GIR_RootConstrainSelectedInstOperands,
21710 // GIR_Coverage, 4512,
21711 GIR_EraseRootFromParent_Done,
21712 // Label 1539: @56180
21713 GIM_Try, /*On fail goto*//*Label 1540*/ GIMT_Encode4(56370), // Rule ID 18318 //
21714 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21715 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21716 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21717 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21718 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
21719 // (vselect:{ *:[v16i8] } VK16WM:{ *:[v16i1] }:$mask, VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src0) => (EXTRACT_SUBREG:{ *:[v16i8] } (VMOVDQU8Zrrk:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR128X:{ *:[v16i8] }:$src0, sub_xmm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v64i1] } VK16WM:{ *:[v16i1] }:$mask, VK64WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR128X:{ *:[v16i8] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
21720 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
21721 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8,
21722 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
21723 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v64s1,
21724 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v64s8,
21725 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v64s8,
21726 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21727 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21728 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
21729 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21730 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21731 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
21732 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
21733 GIR_AddImm8, /*InsnID*/5, /*Imm*/9,
21734 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21735 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21736 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21737 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21738 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21739 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
21740 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21741 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21742 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21743 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
21744 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21745 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21746 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
21747 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
21748 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
21749 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21750 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21751 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
21752 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Zrrk),
21753 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21754 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21755 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
21756 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
21757 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21758 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21759 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21760 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
21761 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
21762 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21763 // GIR_Coverage, 18318,
21764 GIR_EraseRootFromParent_Done,
21765 // Label 1540: @56370
21766 GIM_Reject,
21767 // Label 1536: @56371
21768 GIM_Reject,
21769 // Label 1473: @56372
21770 GIM_Try, /*On fail goto*//*Label 1541*/ GIMT_Encode4(57641),
21771 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
21772 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
21773 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
21774 GIM_Try, /*On fail goto*//*Label 1542*/ GIMT_Encode4(56431), // Rule ID 4519 //
21775 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21776 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21777 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21778 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21779 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21780 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21781 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21782 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21783 // (vselect:{ *:[v16i16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16i16] }:$src, immAllZerosV:{ *:[v16i16] }) => (VMOVDQU16Z256rrkz:{ *:[v16i16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16i16] }:$src)
21784 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z256rrkz),
21785 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21786 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21787 GIR_RootToRootCopy, /*OpIdx*/2, // src
21788 GIR_RootConstrainSelectedInstOperands,
21789 // GIR_Coverage, 4519,
21790 GIR_EraseRootFromParent_Done,
21791 // Label 1542: @56431
21792 GIM_Try, /*On fail goto*//*Label 1543*/ GIMT_Encode4(56577), // Rule ID 18325 //
21793 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21794 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21795 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21796 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21797 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21798 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21799 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21800 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21801 // (vselect:{ *:[v16i16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16i16] }:$src1, immAllZerosV:{ *:[v16i16] }) => (EXTRACT_SUBREG:{ *:[v16i16] } (VMOVDQU16Zrrkz:{ *:[v32i16] } (COPY_TO_REGCLASS:{ *:[v32i1] } VK16WM:{ *:[v16i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21802 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
21803 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s1,
21804 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
21805 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s16,
21806 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21807 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21808 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21809 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21810 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21811 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
21812 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
21813 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
21814 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21815 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21816 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21817 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21818 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21819 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
21820 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
21821 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
21822 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21823 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21824 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
21825 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21826 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21827 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21828 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
21829 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
21830 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21831 // GIR_Coverage, 18325,
21832 GIR_EraseRootFromParent_Done,
21833 // Label 1543: @56577
21834 GIM_Try, /*On fail goto*//*Label 1544*/ GIMT_Encode4(56723), // Rule ID 18329 //
21835 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21836 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21837 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21838 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21839 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21840 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21841 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21842 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21843 // (vselect:{ *:[v16f16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16f16] }:$src1, immAllZerosV:{ *:[v16f16] }) => (EXTRACT_SUBREG:{ *:[v16f16] } (VMOVDQU16Zrrkz:{ *:[v32f16] } (COPY_TO_REGCLASS:{ *:[v32i1] } VK16WM:{ *:[v16i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32f16] } (IMPLICIT_DEF:{ *:[v32f16] }), VR256X:{ *:[v16f16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21844 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
21845 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s1,
21846 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
21847 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s16,
21848 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21849 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21850 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21851 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21852 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21853 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
21854 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
21855 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
21856 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21857 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21858 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21859 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21860 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21861 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
21862 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
21863 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
21864 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21865 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21866 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
21867 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21868 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21869 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21870 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
21871 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
21872 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21873 // GIR_Coverage, 18329,
21874 GIR_EraseRootFromParent_Done,
21875 // Label 1544: @56723
21876 GIM_Try, /*On fail goto*//*Label 1545*/ GIMT_Encode4(56869), // Rule ID 18333 //
21877 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21878 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21879 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21880 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21881 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21882 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21883 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21884 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21885 // (vselect:{ *:[v16bf16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16bf16] }:$src1, immAllZerosV:{ *:[v16bf16] }) => (EXTRACT_SUBREG:{ *:[v16bf16] } (VMOVDQU16Zrrkz:{ *:[v32bf16] } (COPY_TO_REGCLASS:{ *:[v32i1] } VK16WM:{ *:[v16i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32bf16] } (IMPLICIT_DEF:{ *:[v32bf16] }), VR256X:{ *:[v16bf16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21886 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
21887 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s1,
21888 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
21889 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s16,
21890 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21891 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21892 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21893 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21894 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21895 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
21896 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
21897 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
21898 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21899 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21900 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21901 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21902 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21903 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
21904 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
21905 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
21906 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21907 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
21908 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
21909 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
21910 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21911 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21912 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
21913 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
21914 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21915 // GIR_Coverage, 18333,
21916 GIR_EraseRootFromParent_Done,
21917 // Label 1545: @56869
21918 GIM_Try, /*On fail goto*//*Label 1546*/ GIMT_Encode4(56914), // Rule ID 18405 //
21919 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21920 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21921 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21922 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21923 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21924 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21925 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21926 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21927 // (vselect:{ *:[v16f16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16f16] }:$src1, immAllZerosV:{ *:[v16f16] }) => (VMOVDQU16Z256rrkz:{ *:[v16f16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16f16] }:$src1)
21928 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z256rrkz),
21929 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21930 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21931 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21932 GIR_RootConstrainSelectedInstOperands,
21933 // GIR_Coverage, 18405,
21934 GIR_EraseRootFromParent_Done,
21935 // Label 1546: @56914
21936 GIM_Try, /*On fail goto*//*Label 1547*/ GIMT_Encode4(56959), // Rule ID 18435 //
21937 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21938 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21939 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21940 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21941 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
21942 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
21943 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
21944 GIM_CheckIsSafeToFold, /*NumInsns*/1,
21945 // (vselect:{ *:[v16bf16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16bf16] }:$src1, immAllZerosV:{ *:[v16bf16] }) => (VMOVDQU16Z256rrkz:{ *:[v16bf16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16bf16] }:$src1)
21946 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z256rrkz),
21947 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21948 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21949 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21950 GIR_RootConstrainSelectedInstOperands,
21951 // GIR_Coverage, 18435,
21952 GIR_EraseRootFromParent_Done,
21953 // Label 1547: @56959
21954 GIM_Try, /*On fail goto*//*Label 1548*/ GIMT_Encode4(56996), // Rule ID 4520 //
21955 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
21956 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21957 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21958 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21959 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21960 // (vselect:{ *:[v16i16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src0) => (VMOVDQU16Z256rrk:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src0, VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16i16] }:$src1)
21961 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z256rrk),
21962 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
21963 GIR_RootToRootCopy, /*OpIdx*/3, // src0
21964 GIR_RootToRootCopy, /*OpIdx*/1, // mask
21965 GIR_RootToRootCopy, /*OpIdx*/2, // src1
21966 GIR_RootConstrainSelectedInstOperands,
21967 // GIR_Coverage, 4520,
21968 GIR_EraseRootFromParent_Done,
21969 // Label 1548: @56996
21970 GIM_Try, /*On fail goto*//*Label 1549*/ GIMT_Encode4(57186), // Rule ID 18324 //
21971 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
21972 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
21973 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
21974 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21975 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
21976 // (vselect:{ *:[v16i16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src0) => (EXTRACT_SUBREG:{ *:[v16i16] } (VMOVDQU16Zrrk:{ *:[v32i16] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v32i1] } VK16WM:{ *:[v16i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
21977 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
21978 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
21979 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
21980 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s1,
21981 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v32s16,
21982 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v32s16,
21983 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21984 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21985 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
21986 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
21987 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21988 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
21989 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
21990 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
21991 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
21992 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
21993 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
21994 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
21995 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
21996 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
21997 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
21998 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
21999 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22000 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
22001 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22002 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22003 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
22004 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
22005 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
22006 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22007 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22008 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22009 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
22010 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22011 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
22012 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
22013 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
22014 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
22015 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22016 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22017 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
22018 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
22019 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22020 // GIR_Coverage, 18324,
22021 GIR_EraseRootFromParent_Done,
22022 // Label 1549: @57186
22023 GIM_Try, /*On fail goto*//*Label 1550*/ GIMT_Encode4(57376), // Rule ID 18328 //
22024 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
22025 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22026 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22027 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22028 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22029 // (vselect:{ *:[v16f16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src0) => (EXTRACT_SUBREG:{ *:[v16f16] } (VMOVDQU16Zrrk:{ *:[v32f16] } (INSERT_SUBREG:{ *:[v32f16] } (IMPLICIT_DEF:{ *:[v32f16] }), VR256X:{ *:[v16f16] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v32i1] } VK16WM:{ *:[v16i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32f16] } (IMPLICIT_DEF:{ *:[v32f16] }), VR256X:{ *:[v16f16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
22030 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
22031 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
22032 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
22033 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s1,
22034 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v32s16,
22035 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v32s16,
22036 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
22037 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22038 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
22039 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22040 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22041 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
22042 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
22043 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
22044 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22045 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22046 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22047 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22048 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22049 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
22050 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
22051 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
22052 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22053 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
22054 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22055 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22056 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
22057 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
22058 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
22059 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22060 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22061 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22062 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
22063 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22064 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
22065 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
22066 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
22067 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
22068 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22069 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22070 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
22071 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
22072 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22073 // GIR_Coverage, 18328,
22074 GIR_EraseRootFromParent_Done,
22075 // Label 1550: @57376
22076 GIM_Try, /*On fail goto*//*Label 1551*/ GIMT_Encode4(57566), // Rule ID 18332 //
22077 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
22078 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22079 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22080 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22081 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22082 // (vselect:{ *:[v16bf16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16bf16] }:$src1, VR256X:{ *:[v16bf16] }:$src0) => (EXTRACT_SUBREG:{ *:[v16bf16] } (VMOVDQU16Zrrk:{ *:[v32bf16] } (INSERT_SUBREG:{ *:[v32bf16] } (IMPLICIT_DEF:{ *:[v32bf16] }), VR256X:{ *:[v16bf16] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v32i1] } VK16WM:{ *:[v16i1] }:$mask, VK32WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v32bf16] } (IMPLICIT_DEF:{ *:[v32bf16] }), VR256X:{ *:[v16bf16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
22083 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s16,
22084 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
22085 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
22086 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v32s1,
22087 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v32s16,
22088 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v32s16,
22089 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
22090 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22091 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
22092 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22093 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22094 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
22095 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
22096 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
22097 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22098 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22099 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22100 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22101 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22102 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
22103 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
22104 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
22105 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22106 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
22107 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22108 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22109 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
22110 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
22111 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
22112 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22113 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22114 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22115 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
22116 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22117 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
22118 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
22119 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
22120 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
22121 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22122 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22123 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
22124 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
22125 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22126 // GIR_Coverage, 18332,
22127 GIR_EraseRootFromParent_Done,
22128 // Label 1551: @57566
22129 GIM_Try, /*On fail goto*//*Label 1552*/ GIMT_Encode4(57603), // Rule ID 18404 //
22130 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22131 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22132 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22133 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22134 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22135 // (vselect:{ *:[v16f16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src0) => (VMOVDQU16Z256rrk:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src0, VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16f16] }:$src1)
22136 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z256rrk),
22137 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22138 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22139 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22140 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22141 GIR_RootConstrainSelectedInstOperands,
22142 // GIR_Coverage, 18404,
22143 GIR_EraseRootFromParent_Done,
22144 // Label 1552: @57603
22145 GIM_Try, /*On fail goto*//*Label 1553*/ GIMT_Encode4(57640), // Rule ID 18434 //
22146 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22147 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22148 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22149 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22150 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22151 // (vselect:{ *:[v16bf16] } VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16bf16] }:$src1, VR256X:{ *:[v16bf16] }:$src0) => (VMOVDQU16Z256rrk:{ *:[v16bf16] } VR256X:{ *:[v16bf16] }:$src0, VK16WM:{ *:[v16i1] }:$mask, VR256X:{ *:[v16bf16] }:$src1)
22152 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Z256rrk),
22153 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22154 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22155 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22156 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22157 GIR_RootConstrainSelectedInstOperands,
22158 // GIR_Coverage, 18434,
22159 GIR_EraseRootFromParent_Done,
22160 // Label 1553: @57640
22161 GIM_Reject,
22162 // Label 1541: @57641
22163 GIM_Reject,
22164 // Label 1474: @57642
22165 GIM_Try, /*On fail goto*//*Label 1554*/ GIMT_Encode4(57982),
22166 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1,
22167 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
22168 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s32,
22169 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22170 GIM_Try, /*On fail goto*//*Label 1555*/ GIMT_Encode4(57729), // Rule ID 18301 //
22171 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
22172 GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
22173 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
22174 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1,
22175 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID),
22176 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
22177 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22178 GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
22179 GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/2, // MIs[3]
22180 GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22181 GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
22182 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22183 GIM_CheckIsSafeToFold, /*NumInsns*/3,
22184 // (vselect:{ *:[v16i32] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$mask, immAllOnesV:{ *:[v16i1] }), immAllZerosV:{ *:[v16i32] }, VR512:{ *:[v16i32] }:$src) => (VMOVDQA32Zrrkz:{ *:[v16i32] } VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16i32] }:$src)
22185 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrkz),
22186 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22187 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // mask
22188 GIR_RootToRootCopy, /*OpIdx*/3, // src
22189 GIR_RootConstrainSelectedInstOperands,
22190 // GIR_Coverage, 18301,
22191 GIR_EraseRootFromParent_Done,
22192 // Label 1555: @57729
22193 GIM_Try, /*On fail goto*//*Label 1556*/ GIMT_Encode4(57776), // Rule ID 3550 //
22194 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
22195 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22196 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
22197 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22198 GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
22199 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
22200 GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22201 GIM_CheckIsBuildVectorAllZeros, /*MI*/2,
22202 GIM_CheckIsSafeToFold, /*NumInsns*/2,
22203 // (vselect:{ *:[v16i32] } VK16WM:{ *:[v16i1] }:$mask, immAllOnesV:{ *:[v16i32] }, immAllZerosV:{ *:[v16i32] }) => (AVX512_512_SEXT_MASK_32:{ *:[v16i32] } VK16WM:{ *:[v16i1] }:$mask)
22204 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AVX512_512_SEXT_MASK_32),
22205 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22206 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22207 GIR_RootConstrainSelectedInstOperands,
22208 // GIR_Coverage, 3550,
22209 GIR_EraseRootFromParent_Done,
22210 // Label 1556: @57776
22211 GIM_Try, /*On fail goto*//*Label 1557*/ GIMT_Encode4(57833), // Rule ID 18299 //
22212 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22213 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
22214 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22215 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22216 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22217 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22218 // (vselect:{ *:[v16i32] } VK16WM:{ *:[v16i1] }:$mask, immAllZerosV:{ *:[v16i32] }, VR512:{ *:[v16i32] }:$src) => (VMOVDQA32Zrrkz:{ *:[v16i32] } (KNOTWrr:{ *:[v16i1] } VK16WM:{ *:[v16i1] }:$mask), VR512:{ *:[v16i32] }:$src)
22219 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
22220 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWrr),
22221 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22222 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // mask
22223 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
22224 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrkz),
22225 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22226 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
22227 GIR_RootToRootCopy, /*OpIdx*/3, // src
22228 GIR_RootConstrainSelectedInstOperands,
22229 // GIR_Coverage, 18299,
22230 GIR_EraseRootFromParent_Done,
22231 // Label 1557: @57833
22232 GIM_Try, /*On fail goto*//*Label 1558*/ GIMT_Encode4(57874), // Rule ID 4413 //
22233 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
22234 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22235 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22236 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22237 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22238 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22239 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22240 // (vselect:{ *:[v16f32] } VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16f32] }:$src, immAllZerosV:{ *:[v16f32] }) => (VMOVAPSZrrkz:{ *:[v16f32] } VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16f32] }:$src)
22241 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZrrkz),
22242 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22243 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22244 GIR_RootToRootCopy, /*OpIdx*/2, // src
22245 GIR_RootConstrainSelectedInstOperands,
22246 // GIR_Coverage, 4413,
22247 GIR_EraseRootFromParent_Done,
22248 // Label 1558: @57874
22249 GIM_Try, /*On fail goto*//*Label 1559*/ GIMT_Encode4(57915), // Rule ID 4473 //
22250 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
22251 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22252 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22253 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22254 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22255 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22256 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22257 // (vselect:{ *:[v16i32] } VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16i32] }:$src, immAllZerosV:{ *:[v16i32] }) => (VMOVDQA32Zrrkz:{ *:[v16i32] } VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16i32] }:$src)
22258 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrkz),
22259 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22260 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22261 GIR_RootToRootCopy, /*OpIdx*/2, // src
22262 GIR_RootConstrainSelectedInstOperands,
22263 // GIR_Coverage, 4473,
22264 GIR_EraseRootFromParent_Done,
22265 // Label 1559: @57915
22266 GIM_Try, /*On fail goto*//*Label 1560*/ GIMT_Encode4(57948), // Rule ID 4415 //
22267 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
22268 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22269 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22270 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22271 // (vselect:{ *:[v16f32] } VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src0) => (VMOVAPSZrrk:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src0, VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16f32] }:$src1)
22272 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVAPSZrrk),
22273 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22274 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22275 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22276 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22277 GIR_RootConstrainSelectedInstOperands,
22278 // GIR_Coverage, 4415,
22279 GIR_EraseRootFromParent_Done,
22280 // Label 1560: @57948
22281 GIM_Try, /*On fail goto*//*Label 1561*/ GIMT_Encode4(57981), // Rule ID 4474 //
22282 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
22283 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16WMRegClassID),
22284 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22285 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22286 // (vselect:{ *:[v16i32] } VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src0) => (VMOVDQA32Zrrk:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src0, VK16WM:{ *:[v16i1] }:$mask, VR512:{ *:[v16i32] }:$src1)
22287 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQA32Zrrk),
22288 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22289 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22290 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22291 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22292 GIR_RootConstrainSelectedInstOperands,
22293 // GIR_Coverage, 4474,
22294 GIR_EraseRootFromParent_Done,
22295 // Label 1561: @57981
22296 GIM_Reject,
22297 // Label 1554: @57982
22298 GIM_Reject,
22299 // Label 1475: @57983
22300 GIM_Try, /*On fail goto*//*Label 1562*/ GIMT_Encode4(58416),
22301 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
22302 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
22303 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s8,
22304 GIM_Try, /*On fail goto*//*Label 1563*/ GIMT_Encode4(58042), // Rule ID 4507 //
22305 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22306 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22307 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32WMRegClassID),
22308 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22309 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22310 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22311 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22312 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22313 // (vselect:{ *:[v32i8] } VK32WM:{ *:[v32i1] }:$mask, VR256X:{ *:[v32i8] }:$src, immAllZerosV:{ *:[v32i8] }) => (VMOVDQU8Z256rrkz:{ *:[v32i8] } VK32WM:{ *:[v32i1] }:$mask, VR256X:{ *:[v32i8] }:$src)
22314 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Z256rrkz),
22315 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22316 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22317 GIR_RootToRootCopy, /*OpIdx*/2, // src
22318 GIR_RootConstrainSelectedInstOperands,
22319 // GIR_Coverage, 4507,
22320 GIR_EraseRootFromParent_Done,
22321 // Label 1563: @58042
22322 GIM_Try, /*On fail goto*//*Label 1564*/ GIMT_Encode4(58188), // Rule ID 18321 //
22323 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
22324 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22325 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32WMRegClassID),
22326 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22327 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22328 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22329 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22330 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22331 // (vselect:{ *:[v32i8] } VK32WM:{ *:[v32i1] }:$mask, VR256X:{ *:[v32i8] }:$src1, immAllZerosV:{ *:[v32i8] }) => (EXTRACT_SUBREG:{ *:[v32i8] } (VMOVDQU8Zrrkz:{ *:[v64i8] } (COPY_TO_REGCLASS:{ *:[v64i1] } VK32WM:{ *:[v32i1] }:$mask, VK64WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR256X:{ *:[v32i8] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
22332 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
22333 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s1,
22334 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
22335 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v64s8,
22336 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
22337 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22338 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
22339 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22340 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22341 GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3,
22342 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src1
22343 GIR_AddImm8, /*InsnID*/3, /*Imm*/10,
22344 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22345 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22346 GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22347 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22348 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22349 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // mask
22350 GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
22351 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Zrrkz),
22352 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22353 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
22354 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2,
22355 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
22356 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22357 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22358 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
22359 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
22360 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22361 // GIR_Coverage, 18321,
22362 GIR_EraseRootFromParent_Done,
22363 // Label 1564: @58188
22364 GIM_Try, /*On fail goto*//*Label 1565*/ GIMT_Encode4(58225), // Rule ID 4508 //
22365 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22366 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22367 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32WMRegClassID),
22368 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22369 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22370 // (vselect:{ *:[v32i8] } VK32WM:{ *:[v32i1] }:$mask, VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src0) => (VMOVDQU8Z256rrk:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src0, VK32WM:{ *:[v32i1] }:$mask, VR256X:{ *:[v32i8] }:$src1)
22371 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Z256rrk),
22372 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22373 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22374 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22375 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22376 GIR_RootConstrainSelectedInstOperands,
22377 // GIR_Coverage, 4508,
22378 GIR_EraseRootFromParent_Done,
22379 // Label 1565: @58225
22380 GIM_Try, /*On fail goto*//*Label 1566*/ GIMT_Encode4(58415), // Rule ID 18320 //
22381 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasEVEX512_NoVLX),
22382 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22383 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32WMRegClassID),
22384 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22385 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22386 // (vselect:{ *:[v32i8] } VK32WM:{ *:[v32i1] }:$mask, VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src0) => (EXTRACT_SUBREG:{ *:[v32i8] } (VMOVDQU8Zrrk:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR256X:{ *:[v32i8] }:$src0, sub_ymm:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v64i1] } VK32WM:{ *:[v32i1] }:$mask, VK64WM:{ *:[i32] }), (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR256X:{ *:[v32i8] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
22387 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
22388 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8,
22389 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
22390 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v64s1,
22391 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v64s8,
22392 GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v64s8,
22393 GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
22394 GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22395 GIR_ConstrainSelectedInstOperands, /*InsnID*/6,
22396 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22397 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22398 GIR_AddSimpleTempRegister, /*InsnID*/5, /*TempRegID*/5,
22399 GIR_Copy, /*NewInsnID*/5, /*OldInsnID*/0, /*OpIdx*/2, // src1
22400 GIR_AddImm8, /*InsnID*/5, /*Imm*/10,
22401 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22402 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22403 GIR_ConstrainOperandRC, /*InsnID*/5, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22404 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22405 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22406 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // mask
22407 GIR_ConstrainSelectedInstOperands, /*InsnID*/4,
22408 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
22409 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22410 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
22411 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
22412 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22413 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
22414 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src0
22415 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
22416 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
22417 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22418 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
22419 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Zrrk),
22420 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
22421 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
22422 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
22423 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/4,
22424 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
22425 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
22426 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22427 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
22428 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
22429 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
22430 // GIR_Coverage, 18320,
22431 GIR_EraseRootFromParent_Done,
22432 // Label 1566: @58415
22433 GIM_Reject,
22434 // Label 1562: @58416
22435 GIM_Reject,
22436 // Label 1476: @58417
22437 GIM_Try, /*On fail goto*//*Label 1567*/ GIMT_Encode4(58618),
22438 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1,
22439 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
22440 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s16,
22441 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22442 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32WMRegClassID),
22443 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22444 GIM_Try, /*On fail goto*//*Label 1568*/ GIMT_Encode4(58476), // Rule ID 4515 //
22445 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22446 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22447 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22448 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22449 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22450 // (vselect:{ *:[v32i16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32i16] }:$src, immAllZerosV:{ *:[v32i16] }) => (VMOVDQU16Zrrkz:{ *:[v32i16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32i16] }:$src)
22451 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
22452 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22453 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22454 GIR_RootToRootCopy, /*OpIdx*/2, // src
22455 GIR_RootConstrainSelectedInstOperands,
22456 // GIR_Coverage, 4515,
22457 GIR_EraseRootFromParent_Done,
22458 // Label 1568: @58476
22459 GIM_Try, /*On fail goto*//*Label 1569*/ GIMT_Encode4(58509), // Rule ID 18395 //
22460 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22461 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22462 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22463 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22464 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22465 // (vselect:{ *:[v32f16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32f16] }:$src1, immAllZerosV:{ *:[v32f16] }) => (VMOVDQU16Zrrkz:{ *:[v32f16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32f16] }:$src1)
22466 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
22467 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22468 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22469 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22470 GIR_RootConstrainSelectedInstOperands,
22471 // GIR_Coverage, 18395,
22472 GIR_EraseRootFromParent_Done,
22473 // Label 1569: @58509
22474 GIM_Try, /*On fail goto*//*Label 1570*/ GIMT_Encode4(58542), // Rule ID 18425 //
22475 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22476 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22477 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22478 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22479 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22480 // (vselect:{ *:[v32bf16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32bf16] }:$src1, immAllZerosV:{ *:[v32bf16] }) => (VMOVDQU16Zrrkz:{ *:[v32bf16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32bf16] }:$src1)
22481 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrkz),
22482 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22483 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22484 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22485 GIR_RootConstrainSelectedInstOperands,
22486 // GIR_Coverage, 18425,
22487 GIR_EraseRootFromParent_Done,
22488 // Label 1570: @58542
22489 GIM_Try, /*On fail goto*//*Label 1571*/ GIMT_Encode4(58567), // Rule ID 4516 //
22490 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22491 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22492 // (vselect:{ *:[v32i16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src0) => (VMOVDQU16Zrrk:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src0, VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32i16] }:$src1)
22493 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
22494 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22495 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22496 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22497 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22498 GIR_RootConstrainSelectedInstOperands,
22499 // GIR_Coverage, 4516,
22500 GIR_EraseRootFromParent_Done,
22501 // Label 1571: @58567
22502 GIM_Try, /*On fail goto*//*Label 1572*/ GIMT_Encode4(58592), // Rule ID 18394 //
22503 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22504 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22505 // (vselect:{ *:[v32f16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src0) => (VMOVDQU16Zrrk:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src0, VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32f16] }:$src1)
22506 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
22507 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22508 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22509 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22510 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22511 GIR_RootConstrainSelectedInstOperands,
22512 // GIR_Coverage, 18394,
22513 GIR_EraseRootFromParent_Done,
22514 // Label 1572: @58592
22515 GIM_Try, /*On fail goto*//*Label 1573*/ GIMT_Encode4(58617), // Rule ID 18424 //
22516 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22517 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22518 // (vselect:{ *:[v32bf16] } VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32bf16] }:$src1, VR512:{ *:[v32bf16] }:$src0) => (VMOVDQU16Zrrk:{ *:[v32bf16] } VR512:{ *:[v32bf16] }:$src0, VK32WM:{ *:[v32i1] }:$mask, VR512:{ *:[v32bf16] }:$src1)
22519 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU16Zrrk),
22520 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22521 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22522 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22523 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22524 GIR_RootConstrainSelectedInstOperands,
22525 // GIR_Coverage, 18424,
22526 GIR_EraseRootFromParent_Done,
22527 // Label 1573: @58617
22528 GIM_Reject,
22529 // Label 1567: @58618
22530 GIM_Reject,
22531 // Label 1477: @58619
22532 GIM_Try, /*On fail goto*//*Label 1574*/ GIMT_Encode4(58704),
22533 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1,
22534 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
22535 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v64s8,
22536 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22537 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64WMRegClassID),
22538 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22539 GIM_Try, /*On fail goto*//*Label 1575*/ GIMT_Encode4(58678), // Rule ID 4503 //
22540 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22541 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
22542 GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
22543 GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
22544 GIM_CheckIsSafeToFold, /*NumInsns*/1,
22545 // (vselect:{ *:[v64i8] } VK64WM:{ *:[v64i1] }:$mask, VR512:{ *:[v64i8] }:$src, immAllZerosV:{ *:[v64i8] }) => (VMOVDQU8Zrrkz:{ *:[v64i8] } VK64WM:{ *:[v64i1] }:$mask, VR512:{ *:[v64i8] }:$src)
22546 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Zrrkz),
22547 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22548 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22549 GIR_RootToRootCopy, /*OpIdx*/2, // src
22550 GIR_RootConstrainSelectedInstOperands,
22551 // GIR_Coverage, 4503,
22552 GIR_EraseRootFromParent_Done,
22553 // Label 1575: @58678
22554 GIM_Try, /*On fail goto*//*Label 1576*/ GIMT_Encode4(58703), // Rule ID 4504 //
22555 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22556 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22557 // (vselect:{ *:[v64i8] } VK64WM:{ *:[v64i1] }:$mask, VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src0) => (VMOVDQU8Zrrk:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src0, VK64WM:{ *:[v64i1] }:$mask, VR512:{ *:[v64i8] }:$src1)
22558 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDQU8Zrrk),
22559 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
22560 GIR_RootToRootCopy, /*OpIdx*/3, // src0
22561 GIR_RootToRootCopy, /*OpIdx*/1, // mask
22562 GIR_RootToRootCopy, /*OpIdx*/2, // src1
22563 GIR_RootConstrainSelectedInstOperands,
22564 // GIR_Coverage, 4504,
22565 GIR_EraseRootFromParent_Done,
22566 // Label 1576: @58703
22567 GIM_Reject,
22568 // Label 1574: @58704
22569 GIM_Reject,
22570 // Label 1478: @58705
22571 GIM_Reject,
22572 // Label 27: @58706
22573 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(23), /*)*//*default:*//*Label 1580*/ GIMT_Encode4(58952),
22574 /*GILLT_v8s16*//*Label 1577*/ GIMT_Encode4(58757), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
22575 /*GILLT_v16s16*//*Label 1578*/ GIMT_Encode4(58851), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
22576 /*GILLT_v32s16*//*Label 1579*/ GIMT_Encode4(58918),
22577 // Label 1577: @58757
22578 GIM_Try, /*On fail goto*//*Label 1581*/ GIMT_Encode4(58850),
22579 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
22580 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
22581 GIM_Try, /*On fail goto*//*Label 1582*/ GIMT_Encode4(58795), // Rule ID 2524 //
22582 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
22583 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22584 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22585 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22586 // (mulhu:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULHUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22587 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHUWrr),
22588 GIR_RootConstrainSelectedInstOperands,
22589 // GIR_Coverage, 2524,
22590 GIR_Done,
22591 // Label 1582: @58795
22592 GIM_Try, /*On fail goto*//*Label 1583*/ GIMT_Encode4(58822), // Rule ID 2526 //
22593 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
22594 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22595 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22596 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22597 // (mulhu:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULHUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22598 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMULHUWrr),
22599 GIR_RootConstrainSelectedInstOperands,
22600 // GIR_Coverage, 2526,
22601 GIR_Done,
22602 // Label 1583: @58822
22603 GIM_Try, /*On fail goto*//*Label 1584*/ GIMT_Encode4(58849), // Rule ID 5011 //
22604 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22605 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22606 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22607 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22608 // (mulhu:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULHUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
22609 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHUWZ128rr),
22610 GIR_RootConstrainSelectedInstOperands,
22611 // GIR_Coverage, 5011,
22612 GIR_Done,
22613 // Label 1584: @58849
22614 GIM_Reject,
22615 // Label 1581: @58850
22616 GIM_Reject,
22617 // Label 1578: @58851
22618 GIM_Try, /*On fail goto*//*Label 1585*/ GIMT_Encode4(58917),
22619 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
22620 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
22621 GIM_Try, /*On fail goto*//*Label 1586*/ GIMT_Encode4(58889), // Rule ID 2528 //
22622 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
22623 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22624 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22625 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22626 // (mulhu:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULHUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
22627 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHUWYrr),
22628 GIR_RootConstrainSelectedInstOperands,
22629 // GIR_Coverage, 2528,
22630 GIR_Done,
22631 // Label 1586: @58889
22632 GIM_Try, /*On fail goto*//*Label 1587*/ GIMT_Encode4(58916), // Rule ID 5005 //
22633 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22634 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22635 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22636 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22637 // (mulhu:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULHUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
22638 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHUWZ256rr),
22639 GIR_RootConstrainSelectedInstOperands,
22640 // GIR_Coverage, 5005,
22641 GIR_Done,
22642 // Label 1587: @58916
22643 GIM_Reject,
22644 // Label 1585: @58917
22645 GIM_Reject,
22646 // Label 1579: @58918
22647 GIM_Try, /*On fail goto*//*Label 1588*/ GIMT_Encode4(58951), // Rule ID 4999 //
22648 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22649 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
22650 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
22651 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22652 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22653 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22654 // (mulhu:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULHUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
22655 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHUWZrr),
22656 GIR_RootConstrainSelectedInstOperands,
22657 // GIR_Coverage, 4999,
22658 GIR_Done,
22659 // Label 1588: @58951
22660 GIM_Reject,
22661 // Label 1580: @58952
22662 GIM_Reject,
22663 // Label 28: @58953
22664 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(23), /*)*//*default:*//*Label 1592*/ GIMT_Encode4(59199),
22665 /*GILLT_v8s16*//*Label 1589*/ GIMT_Encode4(59004), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
22666 /*GILLT_v16s16*//*Label 1590*/ GIMT_Encode4(59098), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
22667 /*GILLT_v32s16*//*Label 1591*/ GIMT_Encode4(59165),
22668 // Label 1589: @59004
22669 GIM_Try, /*On fail goto*//*Label 1593*/ GIMT_Encode4(59097),
22670 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
22671 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
22672 GIM_Try, /*On fail goto*//*Label 1594*/ GIMT_Encode4(59042), // Rule ID 2530 //
22673 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
22674 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22675 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22676 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22677 // (mulhs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULHWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22678 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHWrr),
22679 GIR_RootConstrainSelectedInstOperands,
22680 // GIR_Coverage, 2530,
22681 GIR_Done,
22682 // Label 1594: @59042
22683 GIM_Try, /*On fail goto*//*Label 1595*/ GIMT_Encode4(59069), // Rule ID 2532 //
22684 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
22685 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22686 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22687 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22688 // (mulhs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULHWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22689 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMULHWrr),
22690 GIR_RootConstrainSelectedInstOperands,
22691 // GIR_Coverage, 2532,
22692 GIR_Done,
22693 // Label 1595: @59069
22694 GIM_Try, /*On fail goto*//*Label 1596*/ GIMT_Encode4(59096), // Rule ID 4993 //
22695 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22696 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22697 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22698 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22699 // (mulhs:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULHWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
22700 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHWZ128rr),
22701 GIR_RootConstrainSelectedInstOperands,
22702 // GIR_Coverage, 4993,
22703 GIR_Done,
22704 // Label 1596: @59096
22705 GIM_Reject,
22706 // Label 1593: @59097
22707 GIM_Reject,
22708 // Label 1590: @59098
22709 GIM_Try, /*On fail goto*//*Label 1597*/ GIMT_Encode4(59164),
22710 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
22711 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
22712 GIM_Try, /*On fail goto*//*Label 1598*/ GIMT_Encode4(59136), // Rule ID 2534 //
22713 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
22714 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22715 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22716 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22717 // (mulhs:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULHWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
22718 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHWYrr),
22719 GIR_RootConstrainSelectedInstOperands,
22720 // GIR_Coverage, 2534,
22721 GIR_Done,
22722 // Label 1598: @59136
22723 GIM_Try, /*On fail goto*//*Label 1599*/ GIMT_Encode4(59163), // Rule ID 4987 //
22724 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22725 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22726 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22727 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22728 // (mulhs:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULHWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
22729 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHWZ256rr),
22730 GIR_RootConstrainSelectedInstOperands,
22731 // GIR_Coverage, 4987,
22732 GIR_Done,
22733 // Label 1599: @59163
22734 GIM_Reject,
22735 // Label 1597: @59164
22736 GIM_Reject,
22737 // Label 1591: @59165
22738 GIM_Try, /*On fail goto*//*Label 1600*/ GIMT_Encode4(59198), // Rule ID 4981 //
22739 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22740 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
22741 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
22742 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22743 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22744 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22745 // (mulhs:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULHWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
22746 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULHWZrr),
22747 GIR_RootConstrainSelectedInstOperands,
22748 // GIR_Coverage, 4981,
22749 GIR_Done,
22750 // Label 1600: @59198
22751 GIM_Reject,
22752 // Label 1592: @59199
22753 GIM_Reject,
22754 // Label 29: @59200
22755 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(25), /*)*//*default:*//*Label 1607*/ GIMT_Encode4(59649),
22756 /*GILLT_v8s16*//*Label 1601*/ GIMT_Encode4(59259), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
22757 /*GILLT_v16s8*//*Label 1602*/ GIMT_Encode4(59353),
22758 /*GILLT_v16s16*//*Label 1603*/ GIMT_Encode4(59447), GIMT_Encode4(0), GIMT_Encode4(0),
22759 /*GILLT_v32s8*//*Label 1604*/ GIMT_Encode4(59514),
22760 /*GILLT_v32s16*//*Label 1605*/ GIMT_Encode4(59581), GIMT_Encode4(0),
22761 /*GILLT_v64s8*//*Label 1606*/ GIMT_Encode4(59615),
22762 // Label 1601: @59259
22763 GIM_Try, /*On fail goto*//*Label 1608*/ GIMT_Encode4(59352),
22764 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
22765 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
22766 GIM_Try, /*On fail goto*//*Label 1609*/ GIMT_Encode4(59297), // Rule ID 2512 //
22767 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
22768 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22769 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22770 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22771 // (uaddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22772 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSWrr),
22773 GIR_RootConstrainSelectedInstOperands,
22774 // GIR_Coverage, 2512,
22775 GIR_Done,
22776 // Label 1609: @59297
22777 GIM_Try, /*On fail goto*//*Label 1610*/ GIMT_Encode4(59324), // Rule ID 2514 //
22778 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
22779 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22780 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22781 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22782 // (uaddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22783 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDUSWrr),
22784 GIR_RootConstrainSelectedInstOperands,
22785 // GIR_Coverage, 2514,
22786 GIR_Done,
22787 // Label 1610: @59324
22788 GIM_Try, /*On fail goto*//*Label 1611*/ GIMT_Encode4(59351), // Rule ID 4849 //
22789 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22790 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22791 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22792 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22793 // (uaddsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDUSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
22794 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSWZ128rr),
22795 GIR_RootConstrainSelectedInstOperands,
22796 // GIR_Coverage, 4849,
22797 GIR_Done,
22798 // Label 1611: @59351
22799 GIM_Reject,
22800 // Label 1608: @59352
22801 GIM_Reject,
22802 // Label 1602: @59353
22803 GIM_Try, /*On fail goto*//*Label 1612*/ GIMT_Encode4(59446),
22804 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
22805 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
22806 GIM_Try, /*On fail goto*//*Label 1613*/ GIMT_Encode4(59391), // Rule ID 2506 //
22807 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
22808 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22809 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22810 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22811 // (uaddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
22812 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSBrr),
22813 GIR_RootConstrainSelectedInstOperands,
22814 // GIR_Coverage, 2506,
22815 GIR_Done,
22816 // Label 1613: @59391
22817 GIM_Try, /*On fail goto*//*Label 1614*/ GIMT_Encode4(59418), // Rule ID 2508 //
22818 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
22819 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22820 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22821 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22822 // (uaddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
22823 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDUSBrr),
22824 GIR_RootConstrainSelectedInstOperands,
22825 // GIR_Coverage, 2508,
22826 GIR_Done,
22827 // Label 1614: @59418
22828 GIM_Try, /*On fail goto*//*Label 1615*/ GIMT_Encode4(59445), // Rule ID 4867 //
22829 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22830 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22831 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22832 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22833 // (uaddsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDUSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
22834 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSBZ128rr),
22835 GIR_RootConstrainSelectedInstOperands,
22836 // GIR_Coverage, 4867,
22837 GIR_Done,
22838 // Label 1615: @59445
22839 GIM_Reject,
22840 // Label 1612: @59446
22841 GIM_Reject,
22842 // Label 1603: @59447
22843 GIM_Try, /*On fail goto*//*Label 1616*/ GIMT_Encode4(59513),
22844 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
22845 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
22846 GIM_Try, /*On fail goto*//*Label 1617*/ GIMT_Encode4(59485), // Rule ID 2516 //
22847 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
22848 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22849 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22850 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22851 // (uaddsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDUSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
22852 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSWYrr),
22853 GIR_RootConstrainSelectedInstOperands,
22854 // GIR_Coverage, 2516,
22855 GIR_Done,
22856 // Label 1617: @59485
22857 GIM_Try, /*On fail goto*//*Label 1618*/ GIMT_Encode4(59512), // Rule ID 4843 //
22858 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22859 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22860 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22861 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22862 // (uaddsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDUSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
22863 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSWZ256rr),
22864 GIR_RootConstrainSelectedInstOperands,
22865 // GIR_Coverage, 4843,
22866 GIR_Done,
22867 // Label 1618: @59512
22868 GIM_Reject,
22869 // Label 1616: @59513
22870 GIM_Reject,
22871 // Label 1604: @59514
22872 GIM_Try, /*On fail goto*//*Label 1619*/ GIMT_Encode4(59580),
22873 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
22874 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
22875 GIM_Try, /*On fail goto*//*Label 1620*/ GIMT_Encode4(59552), // Rule ID 2510 //
22876 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
22877 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22878 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22879 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
22880 // (uaddsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDUSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
22881 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSBYrr),
22882 GIR_RootConstrainSelectedInstOperands,
22883 // GIR_Coverage, 2510,
22884 GIR_Done,
22885 // Label 1620: @59552
22886 GIM_Try, /*On fail goto*//*Label 1621*/ GIMT_Encode4(59579), // Rule ID 4861 //
22887 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22888 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22889 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22890 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
22891 // (uaddsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDUSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
22892 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSBZ256rr),
22893 GIR_RootConstrainSelectedInstOperands,
22894 // GIR_Coverage, 4861,
22895 GIR_Done,
22896 // Label 1621: @59579
22897 GIM_Reject,
22898 // Label 1619: @59580
22899 GIM_Reject,
22900 // Label 1605: @59581
22901 GIM_Try, /*On fail goto*//*Label 1622*/ GIMT_Encode4(59614), // Rule ID 4837 //
22902 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22903 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
22904 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
22905 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22906 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22907 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22908 // (uaddsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDUSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
22909 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSWZrr),
22910 GIR_RootConstrainSelectedInstOperands,
22911 // GIR_Coverage, 4837,
22912 GIR_Done,
22913 // Label 1622: @59614
22914 GIM_Reject,
22915 // Label 1606: @59615
22916 GIM_Try, /*On fail goto*//*Label 1623*/ GIMT_Encode4(59648), // Rule ID 4855 //
22917 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
22918 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
22919 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
22920 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22921 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22922 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
22923 // (uaddsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDUSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
22924 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDUSBZrr),
22925 GIR_RootConstrainSelectedInstOperands,
22926 // GIR_Coverage, 4855,
22927 GIR_Done,
22928 // Label 1623: @59648
22929 GIM_Reject,
22930 // Label 1607: @59649
22931 GIM_Reject,
22932 // Label 30: @59650
22933 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(25), /*)*//*default:*//*Label 1630*/ GIMT_Encode4(60099),
22934 /*GILLT_v8s16*//*Label 1624*/ GIMT_Encode4(59709), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
22935 /*GILLT_v16s8*//*Label 1625*/ GIMT_Encode4(59803),
22936 /*GILLT_v16s16*//*Label 1626*/ GIMT_Encode4(59897), GIMT_Encode4(0), GIMT_Encode4(0),
22937 /*GILLT_v32s8*//*Label 1627*/ GIMT_Encode4(59964),
22938 /*GILLT_v32s16*//*Label 1628*/ GIMT_Encode4(60031), GIMT_Encode4(0),
22939 /*GILLT_v64s8*//*Label 1629*/ GIMT_Encode4(60065),
22940 // Label 1624: @59709
22941 GIM_Try, /*On fail goto*//*Label 1631*/ GIMT_Encode4(59802),
22942 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
22943 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
22944 GIM_Try, /*On fail goto*//*Label 1632*/ GIMT_Encode4(59747), // Rule ID 2500 //
22945 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
22946 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22947 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22948 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22949 // (saddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22950 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSWrr),
22951 GIR_RootConstrainSelectedInstOperands,
22952 // GIR_Coverage, 2500,
22953 GIR_Done,
22954 // Label 1632: @59747
22955 GIM_Try, /*On fail goto*//*Label 1633*/ GIMT_Encode4(59774), // Rule ID 2502 //
22956 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
22957 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22958 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22959 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22960 // (saddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
22961 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDSWrr),
22962 GIR_RootConstrainSelectedInstOperands,
22963 // GIR_Coverage, 2502,
22964 GIR_Done,
22965 // Label 1633: @59774
22966 GIM_Try, /*On fail goto*//*Label 1634*/ GIMT_Encode4(59801), // Rule ID 4777 //
22967 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
22968 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22969 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22970 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
22971 // (saddsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
22972 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSWZ128rr),
22973 GIR_RootConstrainSelectedInstOperands,
22974 // GIR_Coverage, 4777,
22975 GIR_Done,
22976 // Label 1634: @59801
22977 GIM_Reject,
22978 // Label 1631: @59802
22979 GIM_Reject,
22980 // Label 1625: @59803
22981 GIM_Try, /*On fail goto*//*Label 1635*/ GIMT_Encode4(59896),
22982 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
22983 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
22984 GIM_Try, /*On fail goto*//*Label 1636*/ GIMT_Encode4(59841), // Rule ID 2494 //
22985 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
22986 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22987 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22988 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22989 // (saddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
22990 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSBrr),
22991 GIR_RootConstrainSelectedInstOperands,
22992 // GIR_Coverage, 2494,
22993 GIR_Done,
22994 // Label 1636: @59841
22995 GIM_Try, /*On fail goto*//*Label 1637*/ GIMT_Encode4(59868), // Rule ID 2496 //
22996 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
22997 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22998 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
22999 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23000 // (saddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
23001 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDSBrr),
23002 GIR_RootConstrainSelectedInstOperands,
23003 // GIR_Coverage, 2496,
23004 GIR_Done,
23005 // Label 1637: @59868
23006 GIM_Try, /*On fail goto*//*Label 1638*/ GIMT_Encode4(59895), // Rule ID 4795 //
23007 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23008 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23009 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23010 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23011 // (saddsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
23012 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSBZ128rr),
23013 GIR_RootConstrainSelectedInstOperands,
23014 // GIR_Coverage, 4795,
23015 GIR_Done,
23016 // Label 1638: @59895
23017 GIM_Reject,
23018 // Label 1635: @59896
23019 GIM_Reject,
23020 // Label 1626: @59897
23021 GIM_Try, /*On fail goto*//*Label 1639*/ GIMT_Encode4(59963),
23022 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
23023 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
23024 GIM_Try, /*On fail goto*//*Label 1640*/ GIMT_Encode4(59935), // Rule ID 2504 //
23025 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
23026 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23027 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23028 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23029 // (saddsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
23030 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSWYrr),
23031 GIR_RootConstrainSelectedInstOperands,
23032 // GIR_Coverage, 2504,
23033 GIR_Done,
23034 // Label 1640: @59935
23035 GIM_Try, /*On fail goto*//*Label 1641*/ GIMT_Encode4(59962), // Rule ID 4771 //
23036 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23037 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23038 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23039 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23040 // (saddsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
23041 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSWZ256rr),
23042 GIR_RootConstrainSelectedInstOperands,
23043 // GIR_Coverage, 4771,
23044 GIR_Done,
23045 // Label 1641: @59962
23046 GIM_Reject,
23047 // Label 1639: @59963
23048 GIM_Reject,
23049 // Label 1627: @59964
23050 GIM_Try, /*On fail goto*//*Label 1642*/ GIMT_Encode4(60030),
23051 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
23052 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
23053 GIM_Try, /*On fail goto*//*Label 1643*/ GIMT_Encode4(60002), // Rule ID 2498 //
23054 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
23055 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23056 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23057 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23058 // (saddsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
23059 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSBYrr),
23060 GIR_RootConstrainSelectedInstOperands,
23061 // GIR_Coverage, 2498,
23062 GIR_Done,
23063 // Label 1643: @60002
23064 GIM_Try, /*On fail goto*//*Label 1644*/ GIMT_Encode4(60029), // Rule ID 4789 //
23065 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23066 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23067 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23068 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23069 // (saddsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
23070 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSBZ256rr),
23071 GIR_RootConstrainSelectedInstOperands,
23072 // GIR_Coverage, 4789,
23073 GIR_Done,
23074 // Label 1644: @60029
23075 GIM_Reject,
23076 // Label 1642: @60030
23077 GIM_Reject,
23078 // Label 1628: @60031
23079 GIM_Try, /*On fail goto*//*Label 1645*/ GIMT_Encode4(60064), // Rule ID 4765 //
23080 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
23081 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
23082 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
23083 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23084 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23085 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23086 // (saddsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
23087 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSWZrr),
23088 GIR_RootConstrainSelectedInstOperands,
23089 // GIR_Coverage, 4765,
23090 GIR_Done,
23091 // Label 1645: @60064
23092 GIM_Reject,
23093 // Label 1629: @60065
23094 GIM_Try, /*On fail goto*//*Label 1646*/ GIMT_Encode4(60098), // Rule ID 4783 //
23095 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
23096 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
23097 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
23098 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23099 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23100 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23101 // (saddsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
23102 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDSBZrr),
23103 GIR_RootConstrainSelectedInstOperands,
23104 // GIR_Coverage, 4783,
23105 GIR_Done,
23106 // Label 1646: @60098
23107 GIM_Reject,
23108 // Label 1630: @60099
23109 GIM_Reject,
23110 // Label 31: @60100
23111 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(25), /*)*//*default:*//*Label 1653*/ GIMT_Encode4(60549),
23112 /*GILLT_v8s16*//*Label 1647*/ GIMT_Encode4(60159), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
23113 /*GILLT_v16s8*//*Label 1648*/ GIMT_Encode4(60253),
23114 /*GILLT_v16s16*//*Label 1649*/ GIMT_Encode4(60347), GIMT_Encode4(0), GIMT_Encode4(0),
23115 /*GILLT_v32s8*//*Label 1650*/ GIMT_Encode4(60414),
23116 /*GILLT_v32s16*//*Label 1651*/ GIMT_Encode4(60481), GIMT_Encode4(0),
23117 /*GILLT_v64s8*//*Label 1652*/ GIMT_Encode4(60515),
23118 // Label 1647: @60159
23119 GIM_Try, /*On fail goto*//*Label 1654*/ GIMT_Encode4(60252),
23120 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
23121 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
23122 GIM_Try, /*On fail goto*//*Label 1655*/ GIMT_Encode4(60197), // Rule ID 2578 //
23123 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
23124 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23125 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23126 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23127 // (usubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
23128 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSWrr),
23129 GIR_RootConstrainSelectedInstOperands,
23130 // GIR_Coverage, 2578,
23131 GIR_Done,
23132 // Label 1655: @60197
23133 GIM_Try, /*On fail goto*//*Label 1656*/ GIMT_Encode4(60224), // Rule ID 2580 //
23134 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
23135 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23136 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23137 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23138 // (usubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
23139 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBUSWrr),
23140 GIR_RootConstrainSelectedInstOperands,
23141 // GIR_Coverage, 2580,
23142 GIR_Done,
23143 // Label 1656: @60224
23144 GIM_Try, /*On fail goto*//*Label 1657*/ GIMT_Encode4(60251), // Rule ID 4885 //
23145 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23146 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23147 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23148 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23149 // (usubsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBUSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
23150 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSWZ128rr),
23151 GIR_RootConstrainSelectedInstOperands,
23152 // GIR_Coverage, 4885,
23153 GIR_Done,
23154 // Label 1657: @60251
23155 GIM_Reject,
23156 // Label 1654: @60252
23157 GIM_Reject,
23158 // Label 1648: @60253
23159 GIM_Try, /*On fail goto*//*Label 1658*/ GIMT_Encode4(60346),
23160 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
23161 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
23162 GIM_Try, /*On fail goto*//*Label 1659*/ GIMT_Encode4(60291), // Rule ID 2572 //
23163 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
23164 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23165 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23166 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23167 // (usubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
23168 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSBrr),
23169 GIR_RootConstrainSelectedInstOperands,
23170 // GIR_Coverage, 2572,
23171 GIR_Done,
23172 // Label 1659: @60291
23173 GIM_Try, /*On fail goto*//*Label 1660*/ GIMT_Encode4(60318), // Rule ID 2574 //
23174 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
23175 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23176 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23177 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23178 // (usubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
23179 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBUSBrr),
23180 GIR_RootConstrainSelectedInstOperands,
23181 // GIR_Coverage, 2574,
23182 GIR_Done,
23183 // Label 1660: @60318
23184 GIM_Try, /*On fail goto*//*Label 1661*/ GIMT_Encode4(60345), // Rule ID 4903 //
23185 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23186 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23187 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23188 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23189 // (usubsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBUSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
23190 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSBZ128rr),
23191 GIR_RootConstrainSelectedInstOperands,
23192 // GIR_Coverage, 4903,
23193 GIR_Done,
23194 // Label 1661: @60345
23195 GIM_Reject,
23196 // Label 1658: @60346
23197 GIM_Reject,
23198 // Label 1649: @60347
23199 GIM_Try, /*On fail goto*//*Label 1662*/ GIMT_Encode4(60413),
23200 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
23201 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
23202 GIM_Try, /*On fail goto*//*Label 1663*/ GIMT_Encode4(60385), // Rule ID 2582 //
23203 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
23204 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23205 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23206 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23207 // (usubsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBUSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
23208 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSWYrr),
23209 GIR_RootConstrainSelectedInstOperands,
23210 // GIR_Coverage, 2582,
23211 GIR_Done,
23212 // Label 1663: @60385
23213 GIM_Try, /*On fail goto*//*Label 1664*/ GIMT_Encode4(60412), // Rule ID 4879 //
23214 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23215 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23216 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23217 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23218 // (usubsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBUSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
23219 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSWZ256rr),
23220 GIR_RootConstrainSelectedInstOperands,
23221 // GIR_Coverage, 4879,
23222 GIR_Done,
23223 // Label 1664: @60412
23224 GIM_Reject,
23225 // Label 1662: @60413
23226 GIM_Reject,
23227 // Label 1650: @60414
23228 GIM_Try, /*On fail goto*//*Label 1665*/ GIMT_Encode4(60480),
23229 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
23230 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
23231 GIM_Try, /*On fail goto*//*Label 1666*/ GIMT_Encode4(60452), // Rule ID 2576 //
23232 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
23233 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23234 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23235 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23236 // (usubsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBUSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
23237 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSBYrr),
23238 GIR_RootConstrainSelectedInstOperands,
23239 // GIR_Coverage, 2576,
23240 GIR_Done,
23241 // Label 1666: @60452
23242 GIM_Try, /*On fail goto*//*Label 1667*/ GIMT_Encode4(60479), // Rule ID 4897 //
23243 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23244 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23245 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23246 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23247 // (usubsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBUSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
23248 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSBZ256rr),
23249 GIR_RootConstrainSelectedInstOperands,
23250 // GIR_Coverage, 4897,
23251 GIR_Done,
23252 // Label 1667: @60479
23253 GIM_Reject,
23254 // Label 1665: @60480
23255 GIM_Reject,
23256 // Label 1651: @60481
23257 GIM_Try, /*On fail goto*//*Label 1668*/ GIMT_Encode4(60514), // Rule ID 4873 //
23258 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
23259 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
23260 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
23261 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23262 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23263 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23264 // (usubsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBUSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
23265 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSWZrr),
23266 GIR_RootConstrainSelectedInstOperands,
23267 // GIR_Coverage, 4873,
23268 GIR_Done,
23269 // Label 1668: @60514
23270 GIM_Reject,
23271 // Label 1652: @60515
23272 GIM_Try, /*On fail goto*//*Label 1669*/ GIMT_Encode4(60548), // Rule ID 4891 //
23273 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
23274 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
23275 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
23276 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23277 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23278 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23279 // (usubsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBUSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
23280 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBUSBZrr),
23281 GIR_RootConstrainSelectedInstOperands,
23282 // GIR_Coverage, 4891,
23283 GIR_Done,
23284 // Label 1669: @60548
23285 GIM_Reject,
23286 // Label 1653: @60549
23287 GIM_Reject,
23288 // Label 32: @60550
23289 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(25), /*)*//*default:*//*Label 1676*/ GIMT_Encode4(60999),
23290 /*GILLT_v8s16*//*Label 1670*/ GIMT_Encode4(60609), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
23291 /*GILLT_v16s8*//*Label 1671*/ GIMT_Encode4(60703),
23292 /*GILLT_v16s16*//*Label 1672*/ GIMT_Encode4(60797), GIMT_Encode4(0), GIMT_Encode4(0),
23293 /*GILLT_v32s8*//*Label 1673*/ GIMT_Encode4(60864),
23294 /*GILLT_v32s16*//*Label 1674*/ GIMT_Encode4(60931), GIMT_Encode4(0),
23295 /*GILLT_v64s8*//*Label 1675*/ GIMT_Encode4(60965),
23296 // Label 1670: @60609
23297 GIM_Try, /*On fail goto*//*Label 1677*/ GIMT_Encode4(60702),
23298 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
23299 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
23300 GIM_Try, /*On fail goto*//*Label 1678*/ GIMT_Encode4(60647), // Rule ID 2566 //
23301 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
23302 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23303 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23304 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23305 // (ssubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
23306 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSWrr),
23307 GIR_RootConstrainSelectedInstOperands,
23308 // GIR_Coverage, 2566,
23309 GIR_Done,
23310 // Label 1678: @60647
23311 GIM_Try, /*On fail goto*//*Label 1679*/ GIMT_Encode4(60674), // Rule ID 2568 //
23312 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
23313 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23314 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23315 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23316 // (ssubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
23317 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBSWrr),
23318 GIR_RootConstrainSelectedInstOperands,
23319 // GIR_Coverage, 2568,
23320 GIR_Done,
23321 // Label 1679: @60674
23322 GIM_Try, /*On fail goto*//*Label 1680*/ GIMT_Encode4(60701), // Rule ID 4813 //
23323 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23324 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23325 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23326 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23327 // (ssubsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
23328 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSWZ128rr),
23329 GIR_RootConstrainSelectedInstOperands,
23330 // GIR_Coverage, 4813,
23331 GIR_Done,
23332 // Label 1680: @60701
23333 GIM_Reject,
23334 // Label 1677: @60702
23335 GIM_Reject,
23336 // Label 1671: @60703
23337 GIM_Try, /*On fail goto*//*Label 1681*/ GIMT_Encode4(60796),
23338 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
23339 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
23340 GIM_Try, /*On fail goto*//*Label 1682*/ GIMT_Encode4(60741), // Rule ID 2560 //
23341 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
23342 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23343 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23344 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23345 // (ssubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
23346 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSBrr),
23347 GIR_RootConstrainSelectedInstOperands,
23348 // GIR_Coverage, 2560,
23349 GIR_Done,
23350 // Label 1682: @60741
23351 GIM_Try, /*On fail goto*//*Label 1683*/ GIMT_Encode4(60768), // Rule ID 2562 //
23352 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
23353 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23354 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23355 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23356 // (ssubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
23357 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBSBrr),
23358 GIR_RootConstrainSelectedInstOperands,
23359 // GIR_Coverage, 2562,
23360 GIR_Done,
23361 // Label 1683: @60768
23362 GIM_Try, /*On fail goto*//*Label 1684*/ GIMT_Encode4(60795), // Rule ID 4831 //
23363 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23364 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23365 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23366 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23367 // (ssubsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
23368 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSBZ128rr),
23369 GIR_RootConstrainSelectedInstOperands,
23370 // GIR_Coverage, 4831,
23371 GIR_Done,
23372 // Label 1684: @60795
23373 GIM_Reject,
23374 // Label 1681: @60796
23375 GIM_Reject,
23376 // Label 1672: @60797
23377 GIM_Try, /*On fail goto*//*Label 1685*/ GIMT_Encode4(60863),
23378 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
23379 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
23380 GIM_Try, /*On fail goto*//*Label 1686*/ GIMT_Encode4(60835), // Rule ID 2570 //
23381 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
23382 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23383 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23384 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23385 // (ssubsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
23386 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSWYrr),
23387 GIR_RootConstrainSelectedInstOperands,
23388 // GIR_Coverage, 2570,
23389 GIR_Done,
23390 // Label 1686: @60835
23391 GIM_Try, /*On fail goto*//*Label 1687*/ GIMT_Encode4(60862), // Rule ID 4807 //
23392 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23393 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23394 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23395 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23396 // (ssubsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
23397 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSWZ256rr),
23398 GIR_RootConstrainSelectedInstOperands,
23399 // GIR_Coverage, 4807,
23400 GIR_Done,
23401 // Label 1687: @60862
23402 GIM_Reject,
23403 // Label 1685: @60863
23404 GIM_Reject,
23405 // Label 1673: @60864
23406 GIM_Try, /*On fail goto*//*Label 1688*/ GIMT_Encode4(60930),
23407 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
23408 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
23409 GIM_Try, /*On fail goto*//*Label 1689*/ GIMT_Encode4(60902), // Rule ID 2564 //
23410 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
23411 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23412 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23413 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23414 // (ssubsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
23415 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSBYrr),
23416 GIR_RootConstrainSelectedInstOperands,
23417 // GIR_Coverage, 2564,
23418 GIR_Done,
23419 // Label 1689: @60902
23420 GIM_Try, /*On fail goto*//*Label 1690*/ GIMT_Encode4(60929), // Rule ID 4825 //
23421 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
23422 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23423 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23424 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23425 // (ssubsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
23426 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSBZ256rr),
23427 GIR_RootConstrainSelectedInstOperands,
23428 // GIR_Coverage, 4825,
23429 GIR_Done,
23430 // Label 1690: @60929
23431 GIM_Reject,
23432 // Label 1688: @60930
23433 GIM_Reject,
23434 // Label 1674: @60931
23435 GIM_Try, /*On fail goto*//*Label 1691*/ GIMT_Encode4(60964), // Rule ID 4801 //
23436 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
23437 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
23438 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
23439 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23440 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23441 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23442 // (ssubsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
23443 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSWZrr),
23444 GIR_RootConstrainSelectedInstOperands,
23445 // GIR_Coverage, 4801,
23446 GIR_Done,
23447 // Label 1691: @60964
23448 GIM_Reject,
23449 // Label 1675: @60965
23450 GIM_Try, /*On fail goto*//*Label 1692*/ GIMT_Encode4(60998), // Rule ID 4819 //
23451 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
23452 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
23453 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
23454 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23455 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23456 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23457 // (ssubsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
23458 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBSBZrr),
23459 GIR_RootConstrainSelectedInstOperands,
23460 // GIR_Coverage, 4819,
23461 GIR_Done,
23462 // Label 1692: @60998
23463 GIM_Reject,
23464 // Label 1676: @60999
23465 GIM_Reject,
23466 // Label 33: @61000
23467 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 1706*/ GIMT_Encode4(62015),
23468 /*GILLT_s16*//*Label 1693*/ GIMT_Encode4(61095),
23469 /*GILLT_s32*//*Label 1694*/ GIMT_Encode4(61133),
23470 /*GILLT_s64*//*Label 1695*/ GIMT_Encode4(61276),
23471 /*GILLT_s80*//*Label 1696*/ GIMT_Encode4(61419), GIMT_Encode4(0), GIMT_Encode4(0),
23472 /*GILLT_v2s64*//*Label 1697*/ GIMT_Encode4(61463), GIMT_Encode4(0),
23473 /*GILLT_v4s32*//*Label 1698*/ GIMT_Encode4(61569),
23474 /*GILLT_v4s64*//*Label 1699*/ GIMT_Encode4(61675), GIMT_Encode4(0),
23475 /*GILLT_v8s16*//*Label 1700*/ GIMT_Encode4(61750),
23476 /*GILLT_v8s32*//*Label 1701*/ GIMT_Encode4(61788),
23477 /*GILLT_v8s64*//*Label 1702*/ GIMT_Encode4(61863), GIMT_Encode4(0), GIMT_Encode4(0),
23478 /*GILLT_v16s16*//*Label 1703*/ GIMT_Encode4(61901),
23479 /*GILLT_v16s32*//*Label 1704*/ GIMT_Encode4(61939), GIMT_Encode4(0), GIMT_Encode4(0),
23480 /*GILLT_v32s16*//*Label 1705*/ GIMT_Encode4(61977),
23481 // Label 1693: @61095
23482 GIM_Try, /*On fail goto*//*Label 1707*/ GIMT_Encode4(61132), // Rule ID 5905 //
23483 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
23484 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
23485 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
23486 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
23487 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
23488 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
23489 // (fadd:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VADDSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
23490 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSHZrr),
23491 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23492 GIR_RootConstrainSelectedInstOperands,
23493 // GIR_Coverage, 5905,
23494 GIR_Done,
23495 // Label 1707: @61132
23496 GIM_Reject,
23497 // Label 1694: @61133
23498 GIM_Try, /*On fail goto*//*Label 1708*/ GIMT_Encode4(61275),
23499 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
23500 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
23501 GIM_Try, /*On fail goto*//*Label 1709*/ GIMT_Encode4(61181), // Rule ID 875 //
23502 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
23503 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
23504 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
23505 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
23506 // (fadd:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (ADD_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
23507 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD_Fp32),
23508 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
23509 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
23510 GIR_RootConstrainSelectedInstOperands,
23511 // GIR_Coverage, 875,
23512 GIR_Done,
23513 // Label 1709: @61181
23514 GIM_Try, /*On fail goto*//*Label 1710*/ GIMT_Encode4(61212), // Rule ID 2147 //
23515 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
23516 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23517 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23518 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23519 // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
23520 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSSrr),
23521 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23522 GIR_RootConstrainSelectedInstOperands,
23523 // GIR_Coverage, 2147,
23524 GIR_Done,
23525 // Label 1710: @61212
23526 GIM_Try, /*On fail goto*//*Label 1711*/ GIMT_Encode4(61243), // Rule ID 2155 //
23527 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
23528 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23529 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23530 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23531 // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (ADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
23532 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDSSrr),
23533 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23534 GIR_RootConstrainSelectedInstOperands,
23535 // GIR_Coverage, 2155,
23536 GIR_Done,
23537 // Label 1711: @61243
23538 GIM_Try, /*On fail goto*//*Label 1712*/ GIMT_Encode4(61274), // Rule ID 5867 //
23539 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
23540 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
23541 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
23542 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
23543 // (fadd:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VADDSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
23544 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSSZrr),
23545 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23546 GIR_RootConstrainSelectedInstOperands,
23547 // GIR_Coverage, 5867,
23548 GIR_Done,
23549 // Label 1712: @61274
23550 GIM_Reject,
23551 // Label 1708: @61275
23552 GIM_Reject,
23553 // Label 1695: @61276
23554 GIM_Try, /*On fail goto*//*Label 1713*/ GIMT_Encode4(61418),
23555 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
23556 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
23557 GIM_Try, /*On fail goto*//*Label 1714*/ GIMT_Encode4(61324), // Rule ID 877 //
23558 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
23559 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
23560 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
23561 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
23562 // (fadd:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (ADD_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
23563 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD_Fp64),
23564 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
23565 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
23566 GIR_RootConstrainSelectedInstOperands,
23567 // GIR_Coverage, 877,
23568 GIR_Done,
23569 // Label 1714: @61324
23570 GIM_Try, /*On fail goto*//*Label 1715*/ GIMT_Encode4(61355), // Rule ID 2151 //
23571 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
23572 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23573 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23574 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23575 // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
23576 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSDrr),
23577 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23578 GIR_RootConstrainSelectedInstOperands,
23579 // GIR_Coverage, 2151,
23580 GIR_Done,
23581 // Label 1715: @61355
23582 GIM_Try, /*On fail goto*//*Label 1716*/ GIMT_Encode4(61386), // Rule ID 2159 //
23583 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
23584 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23585 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23586 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23587 // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (ADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
23588 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDSDrr),
23589 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23590 GIR_RootConstrainSelectedInstOperands,
23591 // GIR_Coverage, 2159,
23592 GIR_Done,
23593 // Label 1716: @61386
23594 GIM_Try, /*On fail goto*//*Label 1717*/ GIMT_Encode4(61417), // Rule ID 5886 //
23595 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
23596 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
23597 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
23598 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
23599 // (fadd:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VADDSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
23600 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSDZrr),
23601 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23602 GIR_RootConstrainSelectedInstOperands,
23603 // GIR_Coverage, 5886,
23604 GIR_Done,
23605 // Label 1717: @61417
23606 GIM_Reject,
23607 // Label 1713: @61418
23608 GIM_Reject,
23609 // Label 1696: @61419
23610 GIM_Try, /*On fail goto*//*Label 1718*/ GIMT_Encode4(61462), // Rule ID 879 //
23611 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
23612 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
23613 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
23614 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
23615 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
23616 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
23617 // (fadd:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (ADD_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
23618 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD_Fp80),
23619 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
23620 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
23621 GIR_RootConstrainSelectedInstOperands,
23622 // GIR_Coverage, 879,
23623 GIR_Done,
23624 // Label 1718: @61462
23625 GIM_Reject,
23626 // Label 1697: @61463
23627 GIM_Try, /*On fail goto*//*Label 1719*/ GIMT_Encode4(61568),
23628 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
23629 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
23630 GIM_Try, /*On fail goto*//*Label 1720*/ GIMT_Encode4(61505), // Rule ID 2127 //
23631 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
23632 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23633 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23634 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23635 // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
23636 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDrr),
23637 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23638 GIR_RootConstrainSelectedInstOperands,
23639 // GIR_Coverage, 2127,
23640 GIR_Done,
23641 // Label 1720: @61505
23642 GIM_Try, /*On fail goto*//*Label 1721*/ GIMT_Encode4(61536), // Rule ID 2143 //
23643 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
23644 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23645 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23646 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23647 // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (ADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
23648 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDPDrr),
23649 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23650 GIR_RootConstrainSelectedInstOperands,
23651 // GIR_Coverage, 2143,
23652 GIR_Done,
23653 // Label 1721: @61536
23654 GIM_Try, /*On fail goto*//*Label 1722*/ GIMT_Encode4(61567), // Rule ID 6245 //
23655 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
23656 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23657 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23658 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23659 // (fadd:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VADDPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
23660 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDZ128rr),
23661 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23662 GIR_RootConstrainSelectedInstOperands,
23663 // GIR_Coverage, 6245,
23664 GIR_Done,
23665 // Label 1722: @61567
23666 GIM_Reject,
23667 // Label 1719: @61568
23668 GIM_Reject,
23669 // Label 1698: @61569
23670 GIM_Try, /*On fail goto*//*Label 1723*/ GIMT_Encode4(61674),
23671 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
23672 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
23673 GIM_Try, /*On fail goto*//*Label 1724*/ GIMT_Encode4(61611), // Rule ID 2123 //
23674 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
23675 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23676 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23677 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23678 // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
23679 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSrr),
23680 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23681 GIR_RootConstrainSelectedInstOperands,
23682 // GIR_Coverage, 2123,
23683 GIR_Done,
23684 // Label 1724: @61611
23685 GIM_Try, /*On fail goto*//*Label 1725*/ GIMT_Encode4(61642), // Rule ID 2139 //
23686 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
23687 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23688 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23689 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
23690 // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (ADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
23691 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDPSrr),
23692 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23693 GIR_RootConstrainSelectedInstOperands,
23694 // GIR_Coverage, 2139,
23695 GIR_Done,
23696 // Label 1725: @61642
23697 GIM_Try, /*On fail goto*//*Label 1726*/ GIMT_Encode4(61673), // Rule ID 6221 //
23698 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
23699 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23700 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23701 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23702 // (fadd:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VADDPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
23703 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSZ128rr),
23704 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23705 GIR_RootConstrainSelectedInstOperands,
23706 // GIR_Coverage, 6221,
23707 GIR_Done,
23708 // Label 1726: @61673
23709 GIM_Reject,
23710 // Label 1723: @61674
23711 GIM_Reject,
23712 // Label 1699: @61675
23713 GIM_Try, /*On fail goto*//*Label 1727*/ GIMT_Encode4(61749),
23714 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
23715 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
23716 GIM_Try, /*On fail goto*//*Label 1728*/ GIMT_Encode4(61717), // Rule ID 2135 //
23717 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
23718 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23719 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23720 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23721 // (fadd:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VADDPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
23722 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDYrr),
23723 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23724 GIR_RootConstrainSelectedInstOperands,
23725 // GIR_Coverage, 2135,
23726 GIR_Done,
23727 // Label 1728: @61717
23728 GIM_Try, /*On fail goto*//*Label 1729*/ GIMT_Encode4(61748), // Rule ID 6257 //
23729 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
23730 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23731 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23732 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23733 // (fadd:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VADDPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
23734 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDZ256rr),
23735 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23736 GIR_RootConstrainSelectedInstOperands,
23737 // GIR_Coverage, 6257,
23738 GIR_Done,
23739 // Label 1729: @61748
23740 GIM_Reject,
23741 // Label 1727: @61749
23742 GIM_Reject,
23743 // Label 1700: @61750
23744 GIM_Try, /*On fail goto*//*Label 1730*/ GIMT_Encode4(61787), // Rule ID 6281 //
23745 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
23746 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
23747 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
23748 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23749 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23750 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
23751 // (fadd:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VADDPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
23752 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPHZ128rr),
23753 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23754 GIR_RootConstrainSelectedInstOperands,
23755 // GIR_Coverage, 6281,
23756 GIR_Done,
23757 // Label 1730: @61787
23758 GIM_Reject,
23759 // Label 1701: @61788
23760 GIM_Try, /*On fail goto*//*Label 1731*/ GIMT_Encode4(61862),
23761 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
23762 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
23763 GIM_Try, /*On fail goto*//*Label 1732*/ GIMT_Encode4(61830), // Rule ID 2131 //
23764 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
23765 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23766 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23767 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
23768 // (fadd:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VADDPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
23769 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSYrr),
23770 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23771 GIR_RootConstrainSelectedInstOperands,
23772 // GIR_Coverage, 2131,
23773 GIR_Done,
23774 // Label 1732: @61830
23775 GIM_Try, /*On fail goto*//*Label 1733*/ GIMT_Encode4(61861), // Rule ID 6233 //
23776 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
23777 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23778 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23779 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23780 // (fadd:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VADDPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
23781 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSZ256rr),
23782 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23783 GIR_RootConstrainSelectedInstOperands,
23784 // GIR_Coverage, 6233,
23785 GIR_Done,
23786 // Label 1733: @61861
23787 GIM_Reject,
23788 // Label 1731: @61862
23789 GIM_Reject,
23790 // Label 1702: @61863
23791 GIM_Try, /*On fail goto*//*Label 1734*/ GIMT_Encode4(61900), // Rule ID 6209 //
23792 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
23793 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
23794 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
23795 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23796 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23797 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23798 // (fadd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
23799 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDZrr),
23800 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23801 GIR_RootConstrainSelectedInstOperands,
23802 // GIR_Coverage, 6209,
23803 GIR_Done,
23804 // Label 1734: @61900
23805 GIM_Reject,
23806 // Label 1703: @61901
23807 GIM_Try, /*On fail goto*//*Label 1735*/ GIMT_Encode4(61938), // Rule ID 6293 //
23808 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
23809 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
23810 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
23811 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23812 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23813 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
23814 // (fadd:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VADDPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
23815 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPHZ256rr),
23816 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23817 GIR_RootConstrainSelectedInstOperands,
23818 // GIR_Coverage, 6293,
23819 GIR_Done,
23820 // Label 1735: @61938
23821 GIM_Reject,
23822 // Label 1704: @61939
23823 GIM_Try, /*On fail goto*//*Label 1736*/ GIMT_Encode4(61976), // Rule ID 6197 //
23824 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
23825 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
23826 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
23827 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23828 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23829 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23830 // (fadd:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VADDPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
23831 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSZrr),
23832 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23833 GIR_RootConstrainSelectedInstOperands,
23834 // GIR_Coverage, 6197,
23835 GIR_Done,
23836 // Label 1736: @61976
23837 GIM_Reject,
23838 // Label 1705: @61977
23839 GIM_Try, /*On fail goto*//*Label 1737*/ GIMT_Encode4(62014), // Rule ID 6269 //
23840 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
23841 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
23842 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
23843 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23844 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23845 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
23846 // (fadd:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VADDPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
23847 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPHZrr),
23848 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23849 GIR_RootConstrainSelectedInstOperands,
23850 // GIR_Coverage, 6269,
23851 GIR_Done,
23852 // Label 1737: @62014
23853 GIM_Reject,
23854 // Label 1706: @62015
23855 GIM_Reject,
23856 // Label 34: @62016
23857 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 1751*/ GIMT_Encode4(63031),
23858 /*GILLT_s16*//*Label 1738*/ GIMT_Encode4(62111),
23859 /*GILLT_s32*//*Label 1739*/ GIMT_Encode4(62149),
23860 /*GILLT_s64*//*Label 1740*/ GIMT_Encode4(62292),
23861 /*GILLT_s80*//*Label 1741*/ GIMT_Encode4(62435), GIMT_Encode4(0), GIMT_Encode4(0),
23862 /*GILLT_v2s64*//*Label 1742*/ GIMT_Encode4(62479), GIMT_Encode4(0),
23863 /*GILLT_v4s32*//*Label 1743*/ GIMT_Encode4(62585),
23864 /*GILLT_v4s64*//*Label 1744*/ GIMT_Encode4(62691), GIMT_Encode4(0),
23865 /*GILLT_v8s16*//*Label 1745*/ GIMT_Encode4(62766),
23866 /*GILLT_v8s32*//*Label 1746*/ GIMT_Encode4(62804),
23867 /*GILLT_v8s64*//*Label 1747*/ GIMT_Encode4(62879), GIMT_Encode4(0), GIMT_Encode4(0),
23868 /*GILLT_v16s16*//*Label 1748*/ GIMT_Encode4(62917),
23869 /*GILLT_v16s32*//*Label 1749*/ GIMT_Encode4(62955), GIMT_Encode4(0), GIMT_Encode4(0),
23870 /*GILLT_v32s16*//*Label 1750*/ GIMT_Encode4(62993),
23871 // Label 1738: @62111
23872 GIM_Try, /*On fail goto*//*Label 1752*/ GIMT_Encode4(62148), // Rule ID 6019 //
23873 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
23874 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
23875 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
23876 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
23877 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
23878 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
23879 // (fsub:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VSUBSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
23880 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSHZrr),
23881 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23882 GIR_RootConstrainSelectedInstOperands,
23883 // GIR_Coverage, 6019,
23884 GIR_Done,
23885 // Label 1752: @62148
23886 GIM_Reject,
23887 // Label 1739: @62149
23888 GIM_Try, /*On fail goto*//*Label 1753*/ GIMT_Encode4(62291),
23889 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
23890 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
23891 GIM_Try, /*On fail goto*//*Label 1754*/ GIMT_Encode4(62197), // Rule ID 881 //
23892 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
23893 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
23894 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
23895 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
23896 // (fsub:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (SUB_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
23897 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB_Fp32),
23898 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
23899 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
23900 GIR_RootConstrainSelectedInstOperands,
23901 // GIR_Coverage, 881,
23902 GIR_Done,
23903 // Label 1754: @62197
23904 GIM_Try, /*On fail goto*//*Label 1755*/ GIMT_Encode4(62228), // Rule ID 2227 //
23905 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
23906 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23907 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23908 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23909 // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VSUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
23910 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSSrr),
23911 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23912 GIR_RootConstrainSelectedInstOperands,
23913 // GIR_Coverage, 2227,
23914 GIR_Done,
23915 // Label 1755: @62228
23916 GIM_Try, /*On fail goto*//*Label 1756*/ GIMT_Encode4(62259), // Rule ID 2235 //
23917 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
23918 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23919 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23920 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
23921 // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (SUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
23922 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBSSrr),
23923 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23924 GIR_RootConstrainSelectedInstOperands,
23925 // GIR_Coverage, 2235,
23926 GIR_Done,
23927 // Label 1756: @62259
23928 GIM_Try, /*On fail goto*//*Label 1757*/ GIMT_Encode4(62290), // Rule ID 5981 //
23929 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
23930 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
23931 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
23932 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
23933 // (fsub:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VSUBSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
23934 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSSZrr),
23935 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23936 GIR_RootConstrainSelectedInstOperands,
23937 // GIR_Coverage, 5981,
23938 GIR_Done,
23939 // Label 1757: @62290
23940 GIM_Reject,
23941 // Label 1753: @62291
23942 GIM_Reject,
23943 // Label 1740: @62292
23944 GIM_Try, /*On fail goto*//*Label 1758*/ GIMT_Encode4(62434),
23945 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
23946 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
23947 GIM_Try, /*On fail goto*//*Label 1759*/ GIMT_Encode4(62340), // Rule ID 883 //
23948 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
23949 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
23950 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
23951 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
23952 // (fsub:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (SUB_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
23953 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB_Fp64),
23954 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
23955 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
23956 GIR_RootConstrainSelectedInstOperands,
23957 // GIR_Coverage, 883,
23958 GIR_Done,
23959 // Label 1759: @62340
23960 GIM_Try, /*On fail goto*//*Label 1760*/ GIMT_Encode4(62371), // Rule ID 2231 //
23961 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
23962 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23963 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23964 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23965 // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VSUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
23966 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSDrr),
23967 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23968 GIR_RootConstrainSelectedInstOperands,
23969 // GIR_Coverage, 2231,
23970 GIR_Done,
23971 // Label 1760: @62371
23972 GIM_Try, /*On fail goto*//*Label 1761*/ GIMT_Encode4(62402), // Rule ID 2239 //
23973 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
23974 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23975 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23976 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
23977 // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (SUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
23978 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBSDrr),
23979 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23980 GIR_RootConstrainSelectedInstOperands,
23981 // GIR_Coverage, 2239,
23982 GIR_Done,
23983 // Label 1761: @62402
23984 GIM_Try, /*On fail goto*//*Label 1762*/ GIMT_Encode4(62433), // Rule ID 6000 //
23985 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
23986 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
23987 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
23988 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
23989 // (fsub:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VSUBSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
23990 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSDZrr),
23991 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
23992 GIR_RootConstrainSelectedInstOperands,
23993 // GIR_Coverage, 6000,
23994 GIR_Done,
23995 // Label 1762: @62433
23996 GIM_Reject,
23997 // Label 1758: @62434
23998 GIM_Reject,
23999 // Label 1741: @62435
24000 GIM_Try, /*On fail goto*//*Label 1763*/ GIMT_Encode4(62478), // Rule ID 885 //
24001 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
24002 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
24003 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
24004 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
24005 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
24006 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
24007 // (fsub:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (SUB_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
24008 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB_Fp80),
24009 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
24010 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
24011 GIR_RootConstrainSelectedInstOperands,
24012 // GIR_Coverage, 885,
24013 GIR_Done,
24014 // Label 1763: @62478
24015 GIM_Reject,
24016 // Label 1742: @62479
24017 GIM_Try, /*On fail goto*//*Label 1764*/ GIMT_Encode4(62584),
24018 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
24019 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
24020 GIM_Try, /*On fail goto*//*Label 1765*/ GIMT_Encode4(62521), // Rule ID 2207 //
24021 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24022 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24023 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24024 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24025 // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VSUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
24026 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDrr),
24027 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24028 GIR_RootConstrainSelectedInstOperands,
24029 // GIR_Coverage, 2207,
24030 GIR_Done,
24031 // Label 1765: @62521
24032 GIM_Try, /*On fail goto*//*Label 1766*/ GIMT_Encode4(62552), // Rule ID 2223 //
24033 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
24034 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24035 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24036 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24037 // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (SUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
24038 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBPDrr),
24039 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24040 GIR_RootConstrainSelectedInstOperands,
24041 // GIR_Coverage, 2223,
24042 GIR_Done,
24043 // Label 1766: @62552
24044 GIM_Try, /*On fail goto*//*Label 1767*/ GIMT_Encode4(62583), // Rule ID 6479 //
24045 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24046 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24047 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24048 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24049 // (fsub:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VSUBPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
24050 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDZ128rr),
24051 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24052 GIR_RootConstrainSelectedInstOperands,
24053 // GIR_Coverage, 6479,
24054 GIR_Done,
24055 // Label 1767: @62583
24056 GIM_Reject,
24057 // Label 1764: @62584
24058 GIM_Reject,
24059 // Label 1743: @62585
24060 GIM_Try, /*On fail goto*//*Label 1768*/ GIMT_Encode4(62690),
24061 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
24062 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
24063 GIM_Try, /*On fail goto*//*Label 1769*/ GIMT_Encode4(62627), // Rule ID 2203 //
24064 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24065 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24066 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24067 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24068 // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VSUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
24069 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSrr),
24070 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24071 GIR_RootConstrainSelectedInstOperands,
24072 // GIR_Coverage, 2203,
24073 GIR_Done,
24074 // Label 1769: @62627
24075 GIM_Try, /*On fail goto*//*Label 1770*/ GIMT_Encode4(62658), // Rule ID 2219 //
24076 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
24077 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24078 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24079 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24080 // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (SUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
24081 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBPSrr),
24082 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24083 GIR_RootConstrainSelectedInstOperands,
24084 // GIR_Coverage, 2219,
24085 GIR_Done,
24086 // Label 1770: @62658
24087 GIM_Try, /*On fail goto*//*Label 1771*/ GIMT_Encode4(62689), // Rule ID 6455 //
24088 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24089 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24090 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24091 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24092 // (fsub:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VSUBPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
24093 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSZ128rr),
24094 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24095 GIR_RootConstrainSelectedInstOperands,
24096 // GIR_Coverage, 6455,
24097 GIR_Done,
24098 // Label 1771: @62689
24099 GIM_Reject,
24100 // Label 1768: @62690
24101 GIM_Reject,
24102 // Label 1744: @62691
24103 GIM_Try, /*On fail goto*//*Label 1772*/ GIMT_Encode4(62765),
24104 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
24105 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
24106 GIM_Try, /*On fail goto*//*Label 1773*/ GIMT_Encode4(62733), // Rule ID 2215 //
24107 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24108 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24109 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24110 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24111 // (fsub:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VSUBPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
24112 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDYrr),
24113 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24114 GIR_RootConstrainSelectedInstOperands,
24115 // GIR_Coverage, 2215,
24116 GIR_Done,
24117 // Label 1773: @62733
24118 GIM_Try, /*On fail goto*//*Label 1774*/ GIMT_Encode4(62764), // Rule ID 6491 //
24119 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24120 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24121 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24122 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24123 // (fsub:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VSUBPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
24124 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDZ256rr),
24125 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24126 GIR_RootConstrainSelectedInstOperands,
24127 // GIR_Coverage, 6491,
24128 GIR_Done,
24129 // Label 1774: @62764
24130 GIM_Reject,
24131 // Label 1772: @62765
24132 GIM_Reject,
24133 // Label 1745: @62766
24134 GIM_Try, /*On fail goto*//*Label 1775*/ GIMT_Encode4(62803), // Rule ID 6515 //
24135 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
24136 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
24137 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
24138 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24139 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24140 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24141 // (fsub:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VSUBPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
24142 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPHZ128rr),
24143 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24144 GIR_RootConstrainSelectedInstOperands,
24145 // GIR_Coverage, 6515,
24146 GIR_Done,
24147 // Label 1775: @62803
24148 GIM_Reject,
24149 // Label 1746: @62804
24150 GIM_Try, /*On fail goto*//*Label 1776*/ GIMT_Encode4(62878),
24151 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
24152 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
24153 GIM_Try, /*On fail goto*//*Label 1777*/ GIMT_Encode4(62846), // Rule ID 2211 //
24154 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24155 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24156 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24157 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24158 // (fsub:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VSUBPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
24159 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSYrr),
24160 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24161 GIR_RootConstrainSelectedInstOperands,
24162 // GIR_Coverage, 2211,
24163 GIR_Done,
24164 // Label 1777: @62846
24165 GIM_Try, /*On fail goto*//*Label 1778*/ GIMT_Encode4(62877), // Rule ID 6467 //
24166 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24167 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24168 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24169 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24170 // (fsub:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VSUBPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
24171 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSZ256rr),
24172 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24173 GIR_RootConstrainSelectedInstOperands,
24174 // GIR_Coverage, 6467,
24175 GIR_Done,
24176 // Label 1778: @62877
24177 GIM_Reject,
24178 // Label 1776: @62878
24179 GIM_Reject,
24180 // Label 1747: @62879
24181 GIM_Try, /*On fail goto*//*Label 1779*/ GIMT_Encode4(62916), // Rule ID 6443 //
24182 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24183 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
24184 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
24185 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24186 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24187 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24188 // (fsub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
24189 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDZrr),
24190 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24191 GIR_RootConstrainSelectedInstOperands,
24192 // GIR_Coverage, 6443,
24193 GIR_Done,
24194 // Label 1779: @62916
24195 GIM_Reject,
24196 // Label 1748: @62917
24197 GIM_Try, /*On fail goto*//*Label 1780*/ GIMT_Encode4(62954), // Rule ID 6527 //
24198 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
24199 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
24200 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
24201 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24202 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24203 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24204 // (fsub:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VSUBPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
24205 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPHZ256rr),
24206 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24207 GIR_RootConstrainSelectedInstOperands,
24208 // GIR_Coverage, 6527,
24209 GIR_Done,
24210 // Label 1780: @62954
24211 GIM_Reject,
24212 // Label 1749: @62955
24213 GIM_Try, /*On fail goto*//*Label 1781*/ GIMT_Encode4(62992), // Rule ID 6431 //
24214 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24215 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
24216 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
24217 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24218 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24219 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24220 // (fsub:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VSUBPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
24221 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSZrr),
24222 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24223 GIR_RootConstrainSelectedInstOperands,
24224 // GIR_Coverage, 6431,
24225 GIR_Done,
24226 // Label 1781: @62992
24227 GIM_Reject,
24228 // Label 1750: @62993
24229 GIM_Try, /*On fail goto*//*Label 1782*/ GIMT_Encode4(63030), // Rule ID 6503 //
24230 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
24231 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
24232 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
24233 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24234 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24235 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24236 // (fsub:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VSUBPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
24237 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPHZrr),
24238 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24239 GIR_RootConstrainSelectedInstOperands,
24240 // GIR_Coverage, 6503,
24241 GIR_Done,
24242 // Label 1782: @63030
24243 GIM_Reject,
24244 // Label 1751: @63031
24245 GIM_Reject,
24246 // Label 35: @63032
24247 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 1796*/ GIMT_Encode4(64047),
24248 /*GILLT_s16*//*Label 1783*/ GIMT_Encode4(63127),
24249 /*GILLT_s32*//*Label 1784*/ GIMT_Encode4(63165),
24250 /*GILLT_s64*//*Label 1785*/ GIMT_Encode4(63308),
24251 /*GILLT_s80*//*Label 1786*/ GIMT_Encode4(63451), GIMT_Encode4(0), GIMT_Encode4(0),
24252 /*GILLT_v2s64*//*Label 1787*/ GIMT_Encode4(63495), GIMT_Encode4(0),
24253 /*GILLT_v4s32*//*Label 1788*/ GIMT_Encode4(63601),
24254 /*GILLT_v4s64*//*Label 1789*/ GIMT_Encode4(63707), GIMT_Encode4(0),
24255 /*GILLT_v8s16*//*Label 1790*/ GIMT_Encode4(63782),
24256 /*GILLT_v8s32*//*Label 1791*/ GIMT_Encode4(63820),
24257 /*GILLT_v8s64*//*Label 1792*/ GIMT_Encode4(63895), GIMT_Encode4(0), GIMT_Encode4(0),
24258 /*GILLT_v16s16*//*Label 1793*/ GIMT_Encode4(63933),
24259 /*GILLT_v16s32*//*Label 1794*/ GIMT_Encode4(63971), GIMT_Encode4(0), GIMT_Encode4(0),
24260 /*GILLT_v32s16*//*Label 1795*/ GIMT_Encode4(64009),
24261 // Label 1783: @63127
24262 GIM_Try, /*On fail goto*//*Label 1797*/ GIMT_Encode4(63164), // Rule ID 5962 //
24263 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
24264 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
24265 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
24266 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
24267 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
24268 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
24269 // (fmul:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VMULSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
24270 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSHZrr),
24271 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24272 GIR_RootConstrainSelectedInstOperands,
24273 // GIR_Coverage, 5962,
24274 GIR_Done,
24275 // Label 1797: @63164
24276 GIM_Reject,
24277 // Label 1784: @63165
24278 GIM_Try, /*On fail goto*//*Label 1798*/ GIMT_Encode4(63307),
24279 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
24280 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
24281 GIM_Try, /*On fail goto*//*Label 1799*/ GIMT_Encode4(63213), // Rule ID 887 //
24282 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
24283 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
24284 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
24285 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
24286 // (fmul:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (MUL_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
24287 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MUL_Fp32),
24288 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
24289 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
24290 GIR_RootConstrainSelectedInstOperands,
24291 // GIR_Coverage, 887,
24292 GIR_Done,
24293 // Label 1799: @63213
24294 GIM_Try, /*On fail goto*//*Label 1800*/ GIMT_Encode4(63244), // Rule ID 2187 //
24295 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
24296 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24297 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24298 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24299 // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VMULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
24300 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSSrr),
24301 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24302 GIR_RootConstrainSelectedInstOperands,
24303 // GIR_Coverage, 2187,
24304 GIR_Done,
24305 // Label 1800: @63244
24306 GIM_Try, /*On fail goto*//*Label 1801*/ GIMT_Encode4(63275), // Rule ID 2195 //
24307 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
24308 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24309 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24310 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24311 // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (MULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
24312 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULSSrr),
24313 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24314 GIR_RootConstrainSelectedInstOperands,
24315 // GIR_Coverage, 2195,
24316 GIR_Done,
24317 // Label 1801: @63275
24318 GIM_Try, /*On fail goto*//*Label 1802*/ GIMT_Encode4(63306), // Rule ID 5924 //
24319 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24320 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
24321 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
24322 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
24323 // (fmul:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VMULSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
24324 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSSZrr),
24325 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24326 GIR_RootConstrainSelectedInstOperands,
24327 // GIR_Coverage, 5924,
24328 GIR_Done,
24329 // Label 1802: @63306
24330 GIM_Reject,
24331 // Label 1798: @63307
24332 GIM_Reject,
24333 // Label 1785: @63308
24334 GIM_Try, /*On fail goto*//*Label 1803*/ GIMT_Encode4(63450),
24335 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
24336 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
24337 GIM_Try, /*On fail goto*//*Label 1804*/ GIMT_Encode4(63356), // Rule ID 889 //
24338 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
24339 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
24340 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
24341 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
24342 // (fmul:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (MUL_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
24343 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MUL_Fp64),
24344 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
24345 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
24346 GIR_RootConstrainSelectedInstOperands,
24347 // GIR_Coverage, 889,
24348 GIR_Done,
24349 // Label 1804: @63356
24350 GIM_Try, /*On fail goto*//*Label 1805*/ GIMT_Encode4(63387), // Rule ID 2191 //
24351 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
24352 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24353 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24354 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24355 // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VMULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
24356 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSDrr),
24357 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24358 GIR_RootConstrainSelectedInstOperands,
24359 // GIR_Coverage, 2191,
24360 GIR_Done,
24361 // Label 1805: @63387
24362 GIM_Try, /*On fail goto*//*Label 1806*/ GIMT_Encode4(63418), // Rule ID 2199 //
24363 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
24364 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24365 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24366 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24367 // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (MULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
24368 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULSDrr),
24369 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24370 GIR_RootConstrainSelectedInstOperands,
24371 // GIR_Coverage, 2199,
24372 GIR_Done,
24373 // Label 1806: @63418
24374 GIM_Try, /*On fail goto*//*Label 1807*/ GIMT_Encode4(63449), // Rule ID 5943 //
24375 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24376 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
24377 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
24378 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
24379 // (fmul:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VMULSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
24380 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSDZrr),
24381 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24382 GIR_RootConstrainSelectedInstOperands,
24383 // GIR_Coverage, 5943,
24384 GIR_Done,
24385 // Label 1807: @63449
24386 GIM_Reject,
24387 // Label 1803: @63450
24388 GIM_Reject,
24389 // Label 1786: @63451
24390 GIM_Try, /*On fail goto*//*Label 1808*/ GIMT_Encode4(63494), // Rule ID 891 //
24391 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
24392 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
24393 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
24394 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
24395 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
24396 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
24397 // (fmul:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (MUL_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
24398 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MUL_Fp80),
24399 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
24400 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
24401 GIR_RootConstrainSelectedInstOperands,
24402 // GIR_Coverage, 891,
24403 GIR_Done,
24404 // Label 1808: @63494
24405 GIM_Reject,
24406 // Label 1787: @63495
24407 GIM_Try, /*On fail goto*//*Label 1809*/ GIMT_Encode4(63600),
24408 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
24409 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
24410 GIM_Try, /*On fail goto*//*Label 1810*/ GIMT_Encode4(63537), // Rule ID 2167 //
24411 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24412 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24413 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24414 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24415 // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VMULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
24416 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDrr),
24417 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24418 GIR_RootConstrainSelectedInstOperands,
24419 // GIR_Coverage, 2167,
24420 GIR_Done,
24421 // Label 1810: @63537
24422 GIM_Try, /*On fail goto*//*Label 1811*/ GIMT_Encode4(63568), // Rule ID 2183 //
24423 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
24424 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24425 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24426 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24427 // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (MULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
24428 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULPDrr),
24429 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24430 GIR_RootConstrainSelectedInstOperands,
24431 // GIR_Coverage, 2183,
24432 GIR_Done,
24433 // Label 1811: @63568
24434 GIM_Try, /*On fail goto*//*Label 1812*/ GIMT_Encode4(63599), // Rule ID 6362 //
24435 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24436 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24437 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24438 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24439 // (fmul:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VMULPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
24440 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDZ128rr),
24441 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24442 GIR_RootConstrainSelectedInstOperands,
24443 // GIR_Coverage, 6362,
24444 GIR_Done,
24445 // Label 1812: @63599
24446 GIM_Reject,
24447 // Label 1809: @63600
24448 GIM_Reject,
24449 // Label 1788: @63601
24450 GIM_Try, /*On fail goto*//*Label 1813*/ GIMT_Encode4(63706),
24451 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
24452 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
24453 GIM_Try, /*On fail goto*//*Label 1814*/ GIMT_Encode4(63643), // Rule ID 2163 //
24454 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24455 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24456 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24457 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24458 // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VMULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
24459 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSrr),
24460 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24461 GIR_RootConstrainSelectedInstOperands,
24462 // GIR_Coverage, 2163,
24463 GIR_Done,
24464 // Label 1814: @63643
24465 GIM_Try, /*On fail goto*//*Label 1815*/ GIMT_Encode4(63674), // Rule ID 2179 //
24466 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
24467 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24468 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24469 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24470 // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (MULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
24471 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULPSrr),
24472 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24473 GIR_RootConstrainSelectedInstOperands,
24474 // GIR_Coverage, 2179,
24475 GIR_Done,
24476 // Label 1815: @63674
24477 GIM_Try, /*On fail goto*//*Label 1816*/ GIMT_Encode4(63705), // Rule ID 6338 //
24478 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24479 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24480 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24481 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24482 // (fmul:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VMULPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
24483 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSZ128rr),
24484 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24485 GIR_RootConstrainSelectedInstOperands,
24486 // GIR_Coverage, 6338,
24487 GIR_Done,
24488 // Label 1816: @63705
24489 GIM_Reject,
24490 // Label 1813: @63706
24491 GIM_Reject,
24492 // Label 1789: @63707
24493 GIM_Try, /*On fail goto*//*Label 1817*/ GIMT_Encode4(63781),
24494 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
24495 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
24496 GIM_Try, /*On fail goto*//*Label 1818*/ GIMT_Encode4(63749), // Rule ID 2175 //
24497 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24498 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24499 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24500 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24501 // (fmul:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VMULPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
24502 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDYrr),
24503 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24504 GIR_RootConstrainSelectedInstOperands,
24505 // GIR_Coverage, 2175,
24506 GIR_Done,
24507 // Label 1818: @63749
24508 GIM_Try, /*On fail goto*//*Label 1819*/ GIMT_Encode4(63780), // Rule ID 6374 //
24509 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24510 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24511 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24512 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24513 // (fmul:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VMULPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
24514 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDZ256rr),
24515 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24516 GIR_RootConstrainSelectedInstOperands,
24517 // GIR_Coverage, 6374,
24518 GIR_Done,
24519 // Label 1819: @63780
24520 GIM_Reject,
24521 // Label 1817: @63781
24522 GIM_Reject,
24523 // Label 1790: @63782
24524 GIM_Try, /*On fail goto*//*Label 1820*/ GIMT_Encode4(63819), // Rule ID 6398 //
24525 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
24526 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
24527 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
24528 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24529 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24530 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24531 // (fmul:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VMULPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
24532 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPHZ128rr),
24533 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24534 GIR_RootConstrainSelectedInstOperands,
24535 // GIR_Coverage, 6398,
24536 GIR_Done,
24537 // Label 1820: @63819
24538 GIM_Reject,
24539 // Label 1791: @63820
24540 GIM_Try, /*On fail goto*//*Label 1821*/ GIMT_Encode4(63894),
24541 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
24542 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
24543 GIM_Try, /*On fail goto*//*Label 1822*/ GIMT_Encode4(63862), // Rule ID 2171 //
24544 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
24545 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24546 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24547 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24548 // (fmul:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VMULPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
24549 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSYrr),
24550 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24551 GIR_RootConstrainSelectedInstOperands,
24552 // GIR_Coverage, 2171,
24553 GIR_Done,
24554 // Label 1822: @63862
24555 GIM_Try, /*On fail goto*//*Label 1823*/ GIMT_Encode4(63893), // Rule ID 6350 //
24556 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24557 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24558 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24559 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24560 // (fmul:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VMULPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
24561 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSZ256rr),
24562 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24563 GIR_RootConstrainSelectedInstOperands,
24564 // GIR_Coverage, 6350,
24565 GIR_Done,
24566 // Label 1823: @63893
24567 GIM_Reject,
24568 // Label 1821: @63894
24569 GIM_Reject,
24570 // Label 1792: @63895
24571 GIM_Try, /*On fail goto*//*Label 1824*/ GIMT_Encode4(63932), // Rule ID 6326 //
24572 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24573 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
24574 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
24575 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24576 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24577 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24578 // (fmul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
24579 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDZrr),
24580 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24581 GIR_RootConstrainSelectedInstOperands,
24582 // GIR_Coverage, 6326,
24583 GIR_Done,
24584 // Label 1824: @63932
24585 GIM_Reject,
24586 // Label 1793: @63933
24587 GIM_Try, /*On fail goto*//*Label 1825*/ GIMT_Encode4(63970), // Rule ID 6410 //
24588 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
24589 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
24590 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
24591 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24592 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24593 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24594 // (fmul:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VMULPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
24595 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPHZ256rr),
24596 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24597 GIR_RootConstrainSelectedInstOperands,
24598 // GIR_Coverage, 6410,
24599 GIR_Done,
24600 // Label 1825: @63970
24601 GIM_Reject,
24602 // Label 1794: @63971
24603 GIM_Try, /*On fail goto*//*Label 1826*/ GIMT_Encode4(64008), // Rule ID 6314 //
24604 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24605 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
24606 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
24607 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24608 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24609 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24610 // (fmul:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VMULPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
24611 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSZrr),
24612 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24613 GIR_RootConstrainSelectedInstOperands,
24614 // GIR_Coverage, 6314,
24615 GIR_Done,
24616 // Label 1826: @64008
24617 GIM_Reject,
24618 // Label 1795: @64009
24619 GIM_Try, /*On fail goto*//*Label 1827*/ GIMT_Encode4(64046), // Rule ID 6386 //
24620 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
24621 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
24622 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
24623 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24624 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24625 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
24626 // (fmul:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VMULPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
24627 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPHZrr),
24628 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24629 GIR_RootConstrainSelectedInstOperands,
24630 // GIR_Coverage, 6386,
24631 GIR_Done,
24632 // Label 1827: @64046
24633 GIM_Reject,
24634 // Label 1796: @64047
24635 GIM_Reject,
24636 // Label 36: @64048
24637 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 1840*/ GIMT_Encode4(65175),
24638 /*GILLT_s16*//*Label 1828*/ GIMT_Encode4(64143),
24639 /*GILLT_s32*//*Label 1829*/ GIMT_Encode4(64190),
24640 /*GILLT_s64*//*Label 1830*/ GIMT_Encode4(64315), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
24641 /*GILLT_v2s64*//*Label 1831*/ GIMT_Encode4(64440), GIMT_Encode4(0),
24642 /*GILLT_v4s32*//*Label 1832*/ GIMT_Encode4(64565),
24643 /*GILLT_v4s64*//*Label 1833*/ GIMT_Encode4(64690), GIMT_Encode4(0),
24644 /*GILLT_v8s16*//*Label 1834*/ GIMT_Encode4(64815),
24645 /*GILLT_v8s32*//*Label 1835*/ GIMT_Encode4(64862),
24646 /*GILLT_v8s64*//*Label 1836*/ GIMT_Encode4(64987), GIMT_Encode4(0), GIMT_Encode4(0),
24647 /*GILLT_v16s16*//*Label 1837*/ GIMT_Encode4(65034),
24648 /*GILLT_v16s32*//*Label 1838*/ GIMT_Encode4(65081), GIMT_Encode4(0), GIMT_Encode4(0),
24649 /*GILLT_v32s16*//*Label 1839*/ GIMT_Encode4(65128),
24650 // Label 1828: @64143
24651 GIM_Try, /*On fail goto*//*Label 1841*/ GIMT_Encode4(64189), // Rule ID 10037 //
24652 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
24653 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
24654 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
24655 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s16,
24656 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
24657 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
24658 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
24659 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
24660 // (fma:{ *:[f16] } FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src3) => (VFMADD213SHZr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src3)
24661 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SHZr),
24662 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24663 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24664 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24665 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24666 GIR_RootConstrainSelectedInstOperands,
24667 // GIR_Coverage, 10037,
24668 GIR_EraseRootFromParent_Done,
24669 // Label 1841: @64189
24670 GIM_Reject,
24671 // Label 1829: @64190
24672 GIM_Try, /*On fail goto*//*Label 1842*/ GIMT_Encode4(64314),
24673 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
24674 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
24675 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
24676 GIM_Try, /*On fail goto*//*Label 1843*/ GIMT_Encode4(64241), // Rule ID 1286 //
24677 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoAVX512_NoFMA4),
24678 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24679 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24680 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24681 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24682 // (fma:{ *:[f32] } FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src3) => (VFMADD213SSr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3)
24683 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SSr),
24684 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24685 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24686 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24687 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24688 GIR_RootConstrainSelectedInstOperands,
24689 // GIR_Coverage, 1286,
24690 GIR_EraseRootFromParent_Done,
24691 // Label 1843: @64241
24692 GIM_Try, /*On fail goto*//*Label 1844*/ GIMT_Encode4(64276), // Rule ID 1350 //
24693 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoAVX512),
24694 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24695 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24696 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24697 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
24698 // (fma:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) => (VFMADDSS4rr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3)
24699 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDSS4rr),
24700 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24701 GIR_RootConstrainSelectedInstOperands,
24702 // GIR_Coverage, 1350,
24703 GIR_Done,
24704 // Label 1844: @64276
24705 GIM_Try, /*On fail goto*//*Label 1845*/ GIMT_Encode4(64313), // Rule ID 10019 //
24706 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24707 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
24708 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
24709 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
24710 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
24711 // (fma:{ *:[f32] } FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src3) => (VFMADD213SSZr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src3)
24712 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SSZr),
24713 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24714 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24715 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24716 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24717 GIR_RootConstrainSelectedInstOperands,
24718 // GIR_Coverage, 10019,
24719 GIR_EraseRootFromParent_Done,
24720 // Label 1845: @64313
24721 GIM_Reject,
24722 // Label 1842: @64314
24723 GIM_Reject,
24724 // Label 1830: @64315
24725 GIM_Try, /*On fail goto*//*Label 1846*/ GIMT_Encode4(64439),
24726 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
24727 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
24728 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
24729 GIM_Try, /*On fail goto*//*Label 1847*/ GIMT_Encode4(64366), // Rule ID 1294 //
24730 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoAVX512_NoFMA4),
24731 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24732 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24733 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24734 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24735 // (fma:{ *:[f64] } FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src3) => (VFMADD213SDr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3)
24736 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SDr),
24737 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24738 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24739 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24740 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24741 GIR_RootConstrainSelectedInstOperands,
24742 // GIR_Coverage, 1294,
24743 GIR_EraseRootFromParent_Done,
24744 // Label 1847: @64366
24745 GIM_Try, /*On fail goto*//*Label 1848*/ GIMT_Encode4(64401), // Rule ID 1434 //
24746 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoAVX512),
24747 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24748 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24749 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24750 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
24751 // (fma:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) => (VFMADDSD4rr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3)
24752 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDSD4rr),
24753 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24754 GIR_RootConstrainSelectedInstOperands,
24755 // GIR_Coverage, 1434,
24756 GIR_Done,
24757 // Label 1848: @64401
24758 GIM_Try, /*On fail goto*//*Label 1849*/ GIMT_Encode4(64438), // Rule ID 10028 //
24759 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
24760 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
24761 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
24762 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
24763 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
24764 // (fma:{ *:[f64] } FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src3) => (VFMADD213SDZr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src3)
24765 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SDZr),
24766 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24767 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24768 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24769 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24770 GIR_RootConstrainSelectedInstOperands,
24771 // GIR_Coverage, 10028,
24772 GIR_EraseRootFromParent_Done,
24773 // Label 1849: @64438
24774 GIM_Reject,
24775 // Label 1846: @64439
24776 GIM_Reject,
24777 // Label 1831: @64440
24778 GIM_Try, /*On fail goto*//*Label 1850*/ GIMT_Encode4(64564),
24779 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
24780 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
24781 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
24782 GIM_Try, /*On fail goto*//*Label 1851*/ GIMT_Encode4(64491), // Rule ID 1174 //
24783 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
24784 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24785 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24786 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24787 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24788 // (fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src3) => (VFMADD213PDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3)
24789 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDr),
24790 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24791 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24792 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24793 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24794 GIR_RootConstrainSelectedInstOperands,
24795 // GIR_Coverage, 1174,
24796 GIR_EraseRootFromParent_Done,
24797 // Label 1851: @64491
24798 GIM_Try, /*On fail goto*//*Label 1852*/ GIMT_Encode4(64526), // Rule ID 1458 //
24799 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
24800 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24801 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24802 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24803 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24804 // (fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) => (VFMADDPD4rr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3)
24805 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPD4rr),
24806 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24807 GIR_RootConstrainSelectedInstOperands,
24808 // GIR_Coverage, 1458,
24809 GIR_Done,
24810 // Label 1852: @64526
24811 GIM_Try, /*On fail goto*//*Label 1853*/ GIMT_Encode4(64563), // Rule ID 8396 //
24812 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24813 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24814 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24815 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24816 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24817 // (fma:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src3) => (VFMADD213PDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src3)
24818 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDZ128r),
24819 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24820 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24821 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24822 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24823 GIR_RootConstrainSelectedInstOperands,
24824 // GIR_Coverage, 8396,
24825 GIR_EraseRootFromParent_Done,
24826 // Label 1853: @64563
24827 GIM_Reject,
24828 // Label 1850: @64564
24829 GIM_Reject,
24830 // Label 1832: @64565
24831 GIM_Try, /*On fail goto*//*Label 1854*/ GIMT_Encode4(64689),
24832 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
24833 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
24834 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
24835 GIM_Try, /*On fail goto*//*Label 1855*/ GIMT_Encode4(64616), // Rule ID 1126 //
24836 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
24837 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24838 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24839 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24840 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24841 // (fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src3) => (VFMADD213PSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3)
24842 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSr),
24843 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24844 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24845 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24846 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24847 GIR_RootConstrainSelectedInstOperands,
24848 // GIR_Coverage, 1126,
24849 GIR_EraseRootFromParent_Done,
24850 // Label 1855: @64616
24851 GIM_Try, /*On fail goto*//*Label 1856*/ GIMT_Encode4(64651), // Rule ID 1374 //
24852 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
24853 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24854 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24855 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24856 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
24857 // (fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) => (VFMADDPS4rr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3)
24858 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPS4rr),
24859 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24860 GIR_RootConstrainSelectedInstOperands,
24861 // GIR_Coverage, 1374,
24862 GIR_Done,
24863 // Label 1856: @64651
24864 GIM_Try, /*On fail goto*//*Label 1857*/ GIMT_Encode4(64688), // Rule ID 8357 //
24865 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24866 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24867 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24868 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24869 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24870 // (fma:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src3) => (VFMADD213PSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src3)
24871 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSZ128r),
24872 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24873 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24874 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24875 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24876 GIR_RootConstrainSelectedInstOperands,
24877 // GIR_Coverage, 8357,
24878 GIR_EraseRootFromParent_Done,
24879 // Label 1857: @64688
24880 GIM_Reject,
24881 // Label 1854: @64689
24882 GIM_Reject,
24883 // Label 1833: @64690
24884 GIM_Try, /*On fail goto*//*Label 1858*/ GIMT_Encode4(64814),
24885 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
24886 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
24887 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
24888 GIM_Try, /*On fail goto*//*Label 1859*/ GIMT_Encode4(64741), // Rule ID 1182 //
24889 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
24890 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24891 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24892 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24893 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24894 // (fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src3) => (VFMADD213PDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3)
24895 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDYr),
24896 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24897 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24898 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24899 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24900 GIR_RootConstrainSelectedInstOperands,
24901 // GIR_Coverage, 1182,
24902 GIR_EraseRootFromParent_Done,
24903 // Label 1859: @64741
24904 GIM_Try, /*On fail goto*//*Label 1860*/ GIMT_Encode4(64776), // Rule ID 1464 //
24905 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
24906 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24907 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24908 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24909 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24910 // (fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) => (VFMADDPD4Yrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3)
24911 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPD4Yrr),
24912 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24913 GIR_RootConstrainSelectedInstOperands,
24914 // GIR_Coverage, 1464,
24915 GIR_Done,
24916 // Label 1860: @64776
24917 GIM_Try, /*On fail goto*//*Label 1861*/ GIMT_Encode4(64813), // Rule ID 8384 //
24918 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24919 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24920 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24921 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24922 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24923 // (fma:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src3) => (VFMADD213PDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src3)
24924 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDZ256r),
24925 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24926 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24927 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24928 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24929 GIR_RootConstrainSelectedInstOperands,
24930 // GIR_Coverage, 8384,
24931 GIR_EraseRootFromParent_Done,
24932 // Label 1861: @64813
24933 GIM_Reject,
24934 // Label 1858: @64814
24935 GIM_Reject,
24936 // Label 1834: @64815
24937 GIM_Try, /*On fail goto*//*Label 1862*/ GIMT_Encode4(64861), // Rule ID 8318 //
24938 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
24939 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
24940 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
24941 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
24942 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24943 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24944 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24945 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
24946 // (fma:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src3) => (VFMADD213PHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src3)
24947 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PHZ128r),
24948 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24949 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24950 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24951 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24952 GIR_RootConstrainSelectedInstOperands,
24953 // GIR_Coverage, 8318,
24954 GIR_EraseRootFromParent_Done,
24955 // Label 1862: @64861
24956 GIM_Reject,
24957 // Label 1835: @64862
24958 GIM_Try, /*On fail goto*//*Label 1863*/ GIMT_Encode4(64986),
24959 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
24960 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
24961 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
24962 GIM_Try, /*On fail goto*//*Label 1864*/ GIMT_Encode4(64913), // Rule ID 1134 //
24963 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
24964 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24965 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24966 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24967 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24968 // (fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src3) => (VFMADD213PSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3)
24969 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSYr),
24970 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
24971 GIR_RootToRootCopy, /*OpIdx*/2, // src1
24972 GIR_RootToRootCopy, /*OpIdx*/1, // src2
24973 GIR_RootToRootCopy, /*OpIdx*/3, // src3
24974 GIR_RootConstrainSelectedInstOperands,
24975 // GIR_Coverage, 1134,
24976 GIR_EraseRootFromParent_Done,
24977 // Label 1864: @64913
24978 GIM_Try, /*On fail goto*//*Label 1865*/ GIMT_Encode4(64948), // Rule ID 1380 //
24979 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
24980 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24981 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24982 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24983 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
24984 // (fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) => (VFMADDPS4Yrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3)
24985 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPS4Yrr),
24986 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
24987 GIR_RootConstrainSelectedInstOperands,
24988 // GIR_Coverage, 1380,
24989 GIR_Done,
24990 // Label 1865: @64948
24991 GIM_Try, /*On fail goto*//*Label 1866*/ GIMT_Encode4(64985), // Rule ID 8345 //
24992 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
24993 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24994 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24995 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24996 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
24997 // (fma:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src3) => (VFMADD213PSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src3)
24998 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSZ256r),
24999 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25000 GIR_RootToRootCopy, /*OpIdx*/2, // src1
25001 GIR_RootToRootCopy, /*OpIdx*/1, // src2
25002 GIR_RootToRootCopy, /*OpIdx*/3, // src3
25003 GIR_RootConstrainSelectedInstOperands,
25004 // GIR_Coverage, 8345,
25005 GIR_EraseRootFromParent_Done,
25006 // Label 1866: @64985
25007 GIM_Reject,
25008 // Label 1863: @64986
25009 GIM_Reject,
25010 // Label 1836: @64987
25011 GIM_Try, /*On fail goto*//*Label 1867*/ GIMT_Encode4(65033), // Rule ID 8369 //
25012 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25013 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
25014 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
25015 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
25016 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25017 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25018 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25019 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25020 // (fma:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src3) => (VFMADD213PDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src3)
25021 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDZr),
25022 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25023 GIR_RootToRootCopy, /*OpIdx*/2, // src1
25024 GIR_RootToRootCopy, /*OpIdx*/1, // src2
25025 GIR_RootToRootCopy, /*OpIdx*/3, // src3
25026 GIR_RootConstrainSelectedInstOperands,
25027 // GIR_Coverage, 8369,
25028 GIR_EraseRootFromParent_Done,
25029 // Label 1867: @65033
25030 GIM_Reject,
25031 // Label 1837: @65034
25032 GIM_Try, /*On fail goto*//*Label 1868*/ GIMT_Encode4(65080), // Rule ID 8306 //
25033 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
25034 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
25035 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
25036 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
25037 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25038 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25039 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25040 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25041 // (fma:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src3) => (VFMADD213PHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src3)
25042 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PHZ256r),
25043 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25044 GIR_RootToRootCopy, /*OpIdx*/2, // src1
25045 GIR_RootToRootCopy, /*OpIdx*/1, // src2
25046 GIR_RootToRootCopy, /*OpIdx*/3, // src3
25047 GIR_RootConstrainSelectedInstOperands,
25048 // GIR_Coverage, 8306,
25049 GIR_EraseRootFromParent_Done,
25050 // Label 1868: @65080
25051 GIM_Reject,
25052 // Label 1838: @65081
25053 GIM_Try, /*On fail goto*//*Label 1869*/ GIMT_Encode4(65127), // Rule ID 8330 //
25054 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25055 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
25056 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
25057 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s32,
25058 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25059 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25060 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25061 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25062 // (fma:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src3) => (VFMADD213PSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src3)
25063 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSZr),
25064 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25065 GIR_RootToRootCopy, /*OpIdx*/2, // src1
25066 GIR_RootToRootCopy, /*OpIdx*/1, // src2
25067 GIR_RootToRootCopy, /*OpIdx*/3, // src3
25068 GIR_RootConstrainSelectedInstOperands,
25069 // GIR_Coverage, 8330,
25070 GIR_EraseRootFromParent_Done,
25071 // Label 1869: @65127
25072 GIM_Reject,
25073 // Label 1839: @65128
25074 GIM_Try, /*On fail goto*//*Label 1870*/ GIMT_Encode4(65174), // Rule ID 8291 //
25075 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25076 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
25077 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
25078 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s16,
25079 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25080 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25081 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25082 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25083 // (fma:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src3) => (VFMADD213PHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src3)
25084 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PHZr),
25085 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25086 GIR_RootToRootCopy, /*OpIdx*/2, // src1
25087 GIR_RootToRootCopy, /*OpIdx*/1, // src2
25088 GIR_RootToRootCopy, /*OpIdx*/3, // src3
25089 GIR_RootConstrainSelectedInstOperands,
25090 // GIR_Coverage, 8291,
25091 GIR_EraseRootFromParent_Done,
25092 // Label 1870: @65174
25093 GIM_Reject,
25094 // Label 1840: @65175
25095 GIM_Reject,
25096 // Label 37: @65176
25097 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 1884*/ GIMT_Encode4(66191),
25098 /*GILLT_s16*//*Label 1871*/ GIMT_Encode4(65271),
25099 /*GILLT_s32*//*Label 1872*/ GIMT_Encode4(65309),
25100 /*GILLT_s64*//*Label 1873*/ GIMT_Encode4(65452),
25101 /*GILLT_s80*//*Label 1874*/ GIMT_Encode4(65595), GIMT_Encode4(0), GIMT_Encode4(0),
25102 /*GILLT_v2s64*//*Label 1875*/ GIMT_Encode4(65639), GIMT_Encode4(0),
25103 /*GILLT_v4s32*//*Label 1876*/ GIMT_Encode4(65745),
25104 /*GILLT_v4s64*//*Label 1877*/ GIMT_Encode4(65851), GIMT_Encode4(0),
25105 /*GILLT_v8s16*//*Label 1878*/ GIMT_Encode4(65926),
25106 /*GILLT_v8s32*//*Label 1879*/ GIMT_Encode4(65964),
25107 /*GILLT_v8s64*//*Label 1880*/ GIMT_Encode4(66039), GIMT_Encode4(0), GIMT_Encode4(0),
25108 /*GILLT_v16s16*//*Label 1881*/ GIMT_Encode4(66077),
25109 /*GILLT_v16s32*//*Label 1882*/ GIMT_Encode4(66115), GIMT_Encode4(0), GIMT_Encode4(0),
25110 /*GILLT_v32s16*//*Label 1883*/ GIMT_Encode4(66153),
25111 // Label 1871: @65271
25112 GIM_Try, /*On fail goto*//*Label 1885*/ GIMT_Encode4(65308), // Rule ID 6076 //
25113 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25114 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
25115 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
25116 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25117 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25118 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25119 // (fdiv:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VDIVSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
25120 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSHZrr),
25121 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25122 GIR_RootConstrainSelectedInstOperands,
25123 // GIR_Coverage, 6076,
25124 GIR_Done,
25125 // Label 1885: @65308
25126 GIM_Reject,
25127 // Label 1872: @65309
25128 GIM_Try, /*On fail goto*//*Label 1886*/ GIMT_Encode4(65451),
25129 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25130 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
25131 GIM_Try, /*On fail goto*//*Label 1887*/ GIMT_Encode4(65357), // Rule ID 893 //
25132 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
25133 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25134 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25135 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25136 // (fdiv:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (DIV_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
25137 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIV_Fp32),
25138 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
25139 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
25140 GIR_RootConstrainSelectedInstOperands,
25141 // GIR_Coverage, 893,
25142 GIR_Done,
25143 // Label 1887: @65357
25144 GIM_Try, /*On fail goto*//*Label 1888*/ GIMT_Encode4(65388), // Rule ID 2267 //
25145 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25146 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25147 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25148 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25149 // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VDIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
25150 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSSrr),
25151 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25152 GIR_RootConstrainSelectedInstOperands,
25153 // GIR_Coverage, 2267,
25154 GIR_Done,
25155 // Label 1888: @65388
25156 GIM_Try, /*On fail goto*//*Label 1889*/ GIMT_Encode4(65419), // Rule ID 2275 //
25157 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
25158 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25159 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25160 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25161 // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (DIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
25162 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVSSrr),
25163 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25164 GIR_RootConstrainSelectedInstOperands,
25165 // GIR_Coverage, 2275,
25166 GIR_Done,
25167 // Label 1889: @65419
25168 GIM_Try, /*On fail goto*//*Label 1890*/ GIMT_Encode4(65450), // Rule ID 6038 //
25169 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25170 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25171 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25172 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25173 // (fdiv:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VDIVSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
25174 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSSZrr),
25175 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25176 GIR_RootConstrainSelectedInstOperands,
25177 // GIR_Coverage, 6038,
25178 GIR_Done,
25179 // Label 1890: @65450
25180 GIM_Reject,
25181 // Label 1886: @65451
25182 GIM_Reject,
25183 // Label 1873: @65452
25184 GIM_Try, /*On fail goto*//*Label 1891*/ GIMT_Encode4(65594),
25185 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25186 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
25187 GIM_Try, /*On fail goto*//*Label 1892*/ GIMT_Encode4(65500), // Rule ID 895 //
25188 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
25189 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25190 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25191 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25192 // (fdiv:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (DIV_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
25193 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIV_Fp64),
25194 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
25195 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
25196 GIR_RootConstrainSelectedInstOperands,
25197 // GIR_Coverage, 895,
25198 GIR_Done,
25199 // Label 1892: @65500
25200 GIM_Try, /*On fail goto*//*Label 1893*/ GIMT_Encode4(65531), // Rule ID 2271 //
25201 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25202 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25203 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25204 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25205 // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VDIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
25206 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSDrr),
25207 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25208 GIR_RootConstrainSelectedInstOperands,
25209 // GIR_Coverage, 2271,
25210 GIR_Done,
25211 // Label 1893: @65531
25212 GIM_Try, /*On fail goto*//*Label 1894*/ GIMT_Encode4(65562), // Rule ID 2279 //
25213 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
25214 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25215 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25216 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25217 // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (DIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
25218 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVSDrr),
25219 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25220 GIR_RootConstrainSelectedInstOperands,
25221 // GIR_Coverage, 2279,
25222 GIR_Done,
25223 // Label 1894: @65562
25224 GIM_Try, /*On fail goto*//*Label 1895*/ GIMT_Encode4(65593), // Rule ID 6057 //
25225 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25226 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25227 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25228 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25229 // (fdiv:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VDIVSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
25230 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSDZrr),
25231 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25232 GIR_RootConstrainSelectedInstOperands,
25233 // GIR_Coverage, 6057,
25234 GIR_Done,
25235 // Label 1895: @65593
25236 GIM_Reject,
25237 // Label 1891: @65594
25238 GIM_Reject,
25239 // Label 1874: @65595
25240 GIM_Try, /*On fail goto*//*Label 1896*/ GIMT_Encode4(65638), // Rule ID 897 //
25241 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
25242 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
25243 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
25244 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25245 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25246 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25247 // (fdiv:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (DIV_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
25248 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIV_Fp80),
25249 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
25250 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
25251 GIR_RootConstrainSelectedInstOperands,
25252 // GIR_Coverage, 897,
25253 GIR_Done,
25254 // Label 1896: @65638
25255 GIM_Reject,
25256 // Label 1875: @65639
25257 GIM_Try, /*On fail goto*//*Label 1897*/ GIMT_Encode4(65744),
25258 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
25259 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
25260 GIM_Try, /*On fail goto*//*Label 1898*/ GIMT_Encode4(65681), // Rule ID 2247 //
25261 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
25262 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25263 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25264 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25265 // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VDIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
25266 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDrr),
25267 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25268 GIR_RootConstrainSelectedInstOperands,
25269 // GIR_Coverage, 2247,
25270 GIR_Done,
25271 // Label 1898: @65681
25272 GIM_Try, /*On fail goto*//*Label 1899*/ GIMT_Encode4(65712), // Rule ID 2263 //
25273 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
25274 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25275 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25276 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25277 // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (DIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
25278 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVPDrr),
25279 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25280 GIR_RootConstrainSelectedInstOperands,
25281 // GIR_Coverage, 2263,
25282 GIR_Done,
25283 // Label 1899: @65712
25284 GIM_Try, /*On fail goto*//*Label 1900*/ GIMT_Encode4(65743), // Rule ID 6596 //
25285 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
25286 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25287 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25288 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25289 // (fdiv:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VDIVPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
25290 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDZ128rr),
25291 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25292 GIR_RootConstrainSelectedInstOperands,
25293 // GIR_Coverage, 6596,
25294 GIR_Done,
25295 // Label 1900: @65743
25296 GIM_Reject,
25297 // Label 1897: @65744
25298 GIM_Reject,
25299 // Label 1876: @65745
25300 GIM_Try, /*On fail goto*//*Label 1901*/ GIMT_Encode4(65850),
25301 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
25302 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
25303 GIM_Try, /*On fail goto*//*Label 1902*/ GIMT_Encode4(65787), // Rule ID 2243 //
25304 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
25305 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25306 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25307 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25308 // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VDIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
25309 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSrr),
25310 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25311 GIR_RootConstrainSelectedInstOperands,
25312 // GIR_Coverage, 2243,
25313 GIR_Done,
25314 // Label 1902: @65787
25315 GIM_Try, /*On fail goto*//*Label 1903*/ GIMT_Encode4(65818), // Rule ID 2259 //
25316 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
25317 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25318 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25319 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25320 // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (DIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
25321 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVPSrr),
25322 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25323 GIR_RootConstrainSelectedInstOperands,
25324 // GIR_Coverage, 2259,
25325 GIR_Done,
25326 // Label 1903: @65818
25327 GIM_Try, /*On fail goto*//*Label 1904*/ GIMT_Encode4(65849), // Rule ID 6572 //
25328 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
25329 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25330 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25331 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25332 // (fdiv:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VDIVPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
25333 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSZ128rr),
25334 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25335 GIR_RootConstrainSelectedInstOperands,
25336 // GIR_Coverage, 6572,
25337 GIR_Done,
25338 // Label 1904: @65849
25339 GIM_Reject,
25340 // Label 1901: @65850
25341 GIM_Reject,
25342 // Label 1877: @65851
25343 GIM_Try, /*On fail goto*//*Label 1905*/ GIMT_Encode4(65925),
25344 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
25345 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
25346 GIM_Try, /*On fail goto*//*Label 1906*/ GIMT_Encode4(65893), // Rule ID 2255 //
25347 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
25348 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
25349 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
25350 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
25351 // (fdiv:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VDIVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
25352 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDYrr),
25353 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25354 GIR_RootConstrainSelectedInstOperands,
25355 // GIR_Coverage, 2255,
25356 GIR_Done,
25357 // Label 1906: @65893
25358 GIM_Try, /*On fail goto*//*Label 1907*/ GIMT_Encode4(65924), // Rule ID 6608 //
25359 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
25360 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25361 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25362 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25363 // (fdiv:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VDIVPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
25364 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDZ256rr),
25365 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25366 GIR_RootConstrainSelectedInstOperands,
25367 // GIR_Coverage, 6608,
25368 GIR_Done,
25369 // Label 1907: @65924
25370 GIM_Reject,
25371 // Label 1905: @65925
25372 GIM_Reject,
25373 // Label 1878: @65926
25374 GIM_Try, /*On fail goto*//*Label 1908*/ GIMT_Encode4(65963), // Rule ID 6632 //
25375 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
25376 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
25377 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
25378 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25379 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25380 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25381 // (fdiv:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VDIVPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
25382 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPHZ128rr),
25383 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25384 GIR_RootConstrainSelectedInstOperands,
25385 // GIR_Coverage, 6632,
25386 GIR_Done,
25387 // Label 1908: @65963
25388 GIM_Reject,
25389 // Label 1879: @65964
25390 GIM_Try, /*On fail goto*//*Label 1909*/ GIMT_Encode4(66038),
25391 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
25392 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
25393 GIM_Try, /*On fail goto*//*Label 1910*/ GIMT_Encode4(66006), // Rule ID 2251 //
25394 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
25395 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
25396 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
25397 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
25398 // (fdiv:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VDIVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
25399 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSYrr),
25400 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25401 GIR_RootConstrainSelectedInstOperands,
25402 // GIR_Coverage, 2251,
25403 GIR_Done,
25404 // Label 1910: @66006
25405 GIM_Try, /*On fail goto*//*Label 1911*/ GIMT_Encode4(66037), // Rule ID 6584 //
25406 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
25407 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25408 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25409 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25410 // (fdiv:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VDIVPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
25411 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSZ256rr),
25412 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25413 GIR_RootConstrainSelectedInstOperands,
25414 // GIR_Coverage, 6584,
25415 GIR_Done,
25416 // Label 1911: @66037
25417 GIM_Reject,
25418 // Label 1909: @66038
25419 GIM_Reject,
25420 // Label 1880: @66039
25421 GIM_Try, /*On fail goto*//*Label 1912*/ GIMT_Encode4(66076), // Rule ID 6560 //
25422 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25423 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
25424 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
25425 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25426 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25427 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25428 // (fdiv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
25429 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDZrr),
25430 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25431 GIR_RootConstrainSelectedInstOperands,
25432 // GIR_Coverage, 6560,
25433 GIR_Done,
25434 // Label 1912: @66076
25435 GIM_Reject,
25436 // Label 1881: @66077
25437 GIM_Try, /*On fail goto*//*Label 1913*/ GIMT_Encode4(66114), // Rule ID 6644 //
25438 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
25439 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
25440 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
25441 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25442 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25443 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25444 // (fdiv:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VDIVPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
25445 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPHZ256rr),
25446 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25447 GIR_RootConstrainSelectedInstOperands,
25448 // GIR_Coverage, 6644,
25449 GIR_Done,
25450 // Label 1913: @66114
25451 GIM_Reject,
25452 // Label 1882: @66115
25453 GIM_Try, /*On fail goto*//*Label 1914*/ GIMT_Encode4(66152), // Rule ID 6548 //
25454 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25455 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
25456 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
25457 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25458 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25459 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25460 // (fdiv:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VDIVPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
25461 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSZrr),
25462 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25463 GIR_RootConstrainSelectedInstOperands,
25464 // GIR_Coverage, 6548,
25465 GIR_Done,
25466 // Label 1914: @66152
25467 GIM_Reject,
25468 // Label 1883: @66153
25469 GIM_Try, /*On fail goto*//*Label 1915*/ GIMT_Encode4(66190), // Rule ID 6620 //
25470 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25471 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
25472 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
25473 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25474 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25475 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25476 // (fdiv:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VDIVPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
25477 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPHZrr),
25478 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25479 GIR_RootConstrainSelectedInstOperands,
25480 // GIR_Coverage, 6620,
25481 GIR_Done,
25482 // Label 1915: @66190
25483 GIM_Reject,
25484 // Label 1884: @66191
25485 GIM_Reject,
25486 // Label 38: @66192
25487 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(6), /*)*//*default:*//*Label 1919*/ GIMT_Encode4(66314),
25488 /*GILLT_s32*//*Label 1916*/ GIMT_Encode4(66215),
25489 /*GILLT_s64*//*Label 1917*/ GIMT_Encode4(66248),
25490 /*GILLT_s80*//*Label 1918*/ GIMT_Encode4(66281),
25491 // Label 1916: @66215
25492 GIM_Try, /*On fail goto*//*Label 1920*/ GIMT_Encode4(66247), // Rule ID 1030 //
25493 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
25494 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25495 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25496 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25497 // (fneg:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (CHS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src)
25498 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CHS_Fp32),
25499 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
25500 GIR_RootConstrainSelectedInstOperands,
25501 // GIR_Coverage, 1030,
25502 GIR_Done,
25503 // Label 1920: @66247
25504 GIM_Reject,
25505 // Label 1917: @66248
25506 GIM_Try, /*On fail goto*//*Label 1921*/ GIMT_Encode4(66280), // Rule ID 1031 //
25507 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
25508 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25509 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25510 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25511 // (fneg:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (CHS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src)
25512 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CHS_Fp64),
25513 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
25514 GIR_RootConstrainSelectedInstOperands,
25515 // GIR_Coverage, 1031,
25516 GIR_Done,
25517 // Label 1921: @66280
25518 GIM_Reject,
25519 // Label 1918: @66281
25520 GIM_Try, /*On fail goto*//*Label 1922*/ GIMT_Encode4(66313), // Rule ID 1032 //
25521 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
25522 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
25523 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25524 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25525 // (fneg:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (CHS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src)
25526 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CHS_Fp80),
25527 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
25528 GIR_RootConstrainSelectedInstOperands,
25529 // GIR_Coverage, 1032,
25530 GIR_Done,
25531 // Label 1922: @66313
25532 GIM_Reject,
25533 // Label 1919: @66314
25534 GIM_Reject,
25535 // Label 39: @66315
25536 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(20), /*)*//*default:*//*Label 1930*/ GIMT_Encode4(66884),
25537 /*GILLT_s32*//*Label 1923*/ GIMT_Encode4(66394),
25538 /*GILLT_s64*//*Label 1924*/ GIMT_Encode4(66440),
25539 /*GILLT_s80*//*Label 1925*/ GIMT_Encode4(66636), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
25540 /*GILLT_v4s64*//*Label 1926*/ GIMT_Encode4(66697), GIMT_Encode4(0), GIMT_Encode4(0),
25541 /*GILLT_v8s32*//*Label 1927*/ GIMT_Encode4(66761),
25542 /*GILLT_v8s64*//*Label 1928*/ GIMT_Encode4(66792), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
25543 /*GILLT_v16s32*//*Label 1929*/ GIMT_Encode4(66853),
25544 // Label 1923: @66394
25545 GIM_Try, /*On fail goto*//*Label 1931*/ GIMT_Encode4(66439), // Rule ID 19782 //
25546 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25547 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
25548 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25549 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25550 // (fpextend:{ *:[f32] } FR16X:{ *:[f16] }:$src) => (VCVTSH2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR16X:{ *:[f16] }:$src)
25551 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
25552 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25553 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25554 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25555 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSH2SSZrr),
25556 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25557 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25558 GIR_RootToRootCopy, /*OpIdx*/1, // src
25559 GIR_RootConstrainSelectedInstOperands,
25560 // GIR_Coverage, 19782,
25561 GIR_EraseRootFromParent_Done,
25562 // Label 1931: @66439
25563 GIM_Reject,
25564 // Label 1924: @66440
25565 GIM_Try, /*On fail goto*//*Label 1932*/ GIMT_Encode4(66470), // Rule ID 1880 //
25566 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
25567 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25568 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25569 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25570 // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (CVTSS2SDrr:{ *:[f64] } FR32:{ *:[f32] }:$src)
25571 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSS2SDrr),
25572 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25573 GIR_RootConstrainSelectedInstOperands,
25574 // GIR_Coverage, 1880,
25575 GIR_Done,
25576 // Label 1932: @66470
25577 GIM_Try, /*On fail goto*//*Label 1933*/ GIMT_Encode4(66500), // Rule ID 16229 //
25578 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
25579 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25580 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25581 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25582 // (fpextend:{ *:[f64] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP32:{ *:[f32] }:$src, RFP64:{ *:[i32] })
25583 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
25584 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::RFP64RegClassID),
25585 // GIR_Coverage, 16229,
25586 GIR_Done,
25587 // Label 1933: @66500
25588 GIM_Try, /*On fail goto*//*Label 1934*/ GIMT_Encode4(66545), // Rule ID 16510 //
25589 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25590 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25591 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25592 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25593 // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32:{ *:[f32] }:$src)
25594 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
25595 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25596 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25597 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25598 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SDrr),
25599 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25600 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25601 GIR_RootToRootCopy, /*OpIdx*/1, // src
25602 GIR_RootConstrainSelectedInstOperands,
25603 // GIR_Coverage, 16510,
25604 GIR_EraseRootFromParent_Done,
25605 // Label 1934: @66545
25606 GIM_Try, /*On fail goto*//*Label 1935*/ GIMT_Encode4(66590), // Rule ID 19776 //
25607 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25608 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25609 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25610 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25611 // (fpextend:{ *:[f64] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32X:{ *:[f32] }:$src)
25612 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
25613 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25614 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25615 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25616 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SDZrr),
25617 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25618 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25619 GIR_RootToRootCopy, /*OpIdx*/1, // src
25620 GIR_RootConstrainSelectedInstOperands,
25621 // GIR_Coverage, 19776,
25622 GIR_EraseRootFromParent_Done,
25623 // Label 1935: @66590
25624 GIM_Try, /*On fail goto*//*Label 1936*/ GIMT_Encode4(66635), // Rule ID 19786 //
25625 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25626 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
25627 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25628 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25629 // (fpextend:{ *:[f64] } FR16X:{ *:[f16] }:$src) => (VCVTSH2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR16X:{ *:[f16] }:$src)
25630 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
25631 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25632 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25633 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25634 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSH2SDZrr),
25635 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25636 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25637 GIR_RootToRootCopy, /*OpIdx*/1, // src
25638 GIR_RootConstrainSelectedInstOperands,
25639 // GIR_Coverage, 19786,
25640 GIR_EraseRootFromParent_Done,
25641 // Label 1936: @66635
25642 GIM_Reject,
25643 // Label 1925: @66636
25644 GIM_Try, /*On fail goto*//*Label 1937*/ GIMT_Encode4(66666), // Rule ID 16231 //
25645 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
25646 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25647 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25648 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25649 // (fpextend:{ *:[f80] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP32:{ *:[f32] }:$src, RFP80:{ *:[i32] })
25650 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
25651 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::RFP80RegClassID),
25652 // GIR_Coverage, 16231,
25653 GIR_Done,
25654 // Label 1937: @66666
25655 GIM_Try, /*On fail goto*//*Label 1938*/ GIMT_Encode4(66696), // Rule ID 16233 //
25656 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
25657 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25658 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25659 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25660 // (fpextend:{ *:[f80] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP64:{ *:[f64] }:$src, RFP80:{ *:[i32] })
25661 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
25662 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::RFP80RegClassID),
25663 // GIR_Coverage, 16233,
25664 GIR_Done,
25665 // Label 1938: @66696
25666 GIM_Reject,
25667 // Label 1926: @66697
25668 GIM_Try, /*On fail goto*//*Label 1939*/ GIMT_Encode4(66760),
25669 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
25670 GIM_Try, /*On fail goto*//*Label 1940*/ GIMT_Encode4(66732), // Rule ID 1923 //
25671 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
25672 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
25673 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
25674 // (fpextend:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) => (VCVTPS2PDYrr:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src)
25675 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2PDYrr),
25676 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25677 GIR_RootConstrainSelectedInstOperands,
25678 // GIR_Coverage, 1923,
25679 GIR_Done,
25680 // Label 1940: @66732
25681 GIM_Try, /*On fail goto*//*Label 1941*/ GIMT_Encode4(66759), // Rule ID 10461 //
25682 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
25683 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25684 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25685 // (fpextend:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src)
25686 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2PDZ256rr),
25687 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25688 GIR_RootConstrainSelectedInstOperands,
25689 // GIR_Coverage, 10461,
25690 GIR_Done,
25691 // Label 1941: @66759
25692 GIM_Reject,
25693 // Label 1939: @66760
25694 GIM_Reject,
25695 // Label 1927: @66761
25696 GIM_Try, /*On fail goto*//*Label 1942*/ GIMT_Encode4(66791), // Rule ID 10524 //
25697 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
25698 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
25699 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25700 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25701 // (fpextend:{ *:[v8f32] } VR128X:{ *:[v8f16] }:$src) => (VCVTPH2PSXZ256rr:{ *:[v8f32] } VR128X:{ *:[v8f16] }:$src)
25702 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPH2PSXZ256rr),
25703 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25704 GIR_RootConstrainSelectedInstOperands,
25705 // GIR_Coverage, 10524,
25706 GIR_Done,
25707 // Label 1942: @66791
25708 GIM_Reject,
25709 // Label 1928: @66792
25710 GIM_Try, /*On fail goto*//*Label 1943*/ GIMT_Encode4(66822), // Rule ID 10436 //
25711 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25712 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
25713 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25714 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25715 // (fpextend:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src)
25716 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2PDZrr),
25717 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25718 GIR_RootConstrainSelectedInstOperands,
25719 // GIR_Coverage, 10436,
25720 GIR_Done,
25721 // Label 1943: @66822
25722 GIM_Try, /*On fail goto*//*Label 1944*/ GIMT_Encode4(66852), // Rule ID 10550 //
25723 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25724 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
25725 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25726 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
25727 // (fpextend:{ *:[v8f64] } VR128X:{ *:[v8f16] }:$src) => (VCVTPH2PDZrr:{ *:[v8f64] } VR128X:{ *:[v8f16] }:$src)
25728 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPH2PDZrr),
25729 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25730 GIR_RootConstrainSelectedInstOperands,
25731 // GIR_Coverage, 10550,
25732 GIR_Done,
25733 // Label 1944: @66852
25734 GIM_Reject,
25735 // Label 1929: @66853
25736 GIM_Try, /*On fail goto*//*Label 1945*/ GIMT_Encode4(66883), // Rule ID 10499 //
25737 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25738 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
25739 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
25740 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
25741 // (fpextend:{ *:[v16f32] } VR256X:{ *:[v16f16] }:$src) => (VCVTPH2PSXZrr:{ *:[v16f32] } VR256X:{ *:[v16f16] }:$src)
25742 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPH2PSXZrr),
25743 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25744 GIR_RootConstrainSelectedInstOperands,
25745 // GIR_Coverage, 10499,
25746 GIR_Done,
25747 // Label 1945: @66883
25748 GIM_Reject,
25749 // Label 1930: @66884
25750 GIM_Reject,
25751 // Label 40: @66885
25752 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 1949*/ GIMT_Encode4(67211),
25753 /*GILLT_s16*//*Label 1946*/ GIMT_Encode4(66908),
25754 /*GILLT_s32*//*Label 1947*/ GIMT_Encode4(66999),
25755 /*GILLT_s64*//*Label 1948*/ GIMT_Encode4(67180),
25756 // Label 1946: @66908
25757 GIM_Try, /*On fail goto*//*Label 1950*/ GIMT_Encode4(66953), // Rule ID 19790 //
25758 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25759 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25760 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25761 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25762 // (fpround:{ *:[f16] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR32X:{ *:[f32] }:$src)
25763 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
25764 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25765 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25766 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25767 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SHZrr),
25768 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25769 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25770 GIR_RootToRootCopy, /*OpIdx*/1, // src
25771 GIR_RootConstrainSelectedInstOperands,
25772 // GIR_Coverage, 19790,
25773 GIR_EraseRootFromParent_Done,
25774 // Label 1950: @66953
25775 GIM_Try, /*On fail goto*//*Label 1951*/ GIMT_Encode4(66998), // Rule ID 19792 //
25776 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25777 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25778 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25779 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25780 // (fpround:{ *:[f16] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR64X:{ *:[f64] }:$src)
25781 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
25782 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25783 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25784 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25785 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SHZrr),
25786 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25787 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25788 GIR_RootToRootCopy, /*OpIdx*/1, // src
25789 GIR_RootConstrainSelectedInstOperands,
25790 // GIR_Coverage, 19792,
25791 GIR_EraseRootFromParent_Done,
25792 // Label 1951: @66998
25793 GIM_Reject,
25794 // Label 1947: @66999
25795 GIM_Try, /*On fail goto*//*Label 1952*/ GIMT_Encode4(67029), // Rule ID 1868 //
25796 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
25797 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25798 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25799 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25800 // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (CVTSD2SSrr:{ *:[f32] } FR64:{ *:[f64] }:$src)
25801 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSD2SSrr),
25802 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25803 GIR_RootConstrainSelectedInstOperands,
25804 // GIR_Coverage, 1868,
25805 GIR_Done,
25806 // Label 1952: @67029
25807 GIM_Try, /*On fail goto*//*Label 1953*/ GIMT_Encode4(67059), // Rule ID 16235 //
25808 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
25809 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25810 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25811 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25812 // (fpround:{ *:[f32] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP64:{ *:[f64] }:$src, RFP32:{ *:[i32] })
25813 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
25814 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::RFP32RegClassID),
25815 // GIR_Coverage, 16235,
25816 GIR_Done,
25817 // Label 1953: @67059
25818 GIM_Try, /*On fail goto*//*Label 1954*/ GIMT_Encode4(67089), // Rule ID 16237 //
25819 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
25820 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
25821 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
25822 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25823 // (fpround:{ *:[f32] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP80:{ *:[f80] }:$src, RFP32:{ *:[i32] })
25824 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
25825 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::RFP32RegClassID),
25826 // GIR_Coverage, 16237,
25827 GIR_Done,
25828 // Label 1954: @67089
25829 GIM_Try, /*On fail goto*//*Label 1955*/ GIMT_Encode4(67134), // Rule ID 16508 //
25830 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25831 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25832 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25833 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25834 // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64:{ *:[f64] }:$src)
25835 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
25836 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25837 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25838 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25839 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SSrr),
25840 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25841 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25842 GIR_RootToRootCopy, /*OpIdx*/1, // src
25843 GIR_RootConstrainSelectedInstOperands,
25844 // GIR_Coverage, 16508,
25845 GIR_EraseRootFromParent_Done,
25846 // Label 1955: @67134
25847 GIM_Try, /*On fail goto*//*Label 1956*/ GIMT_Encode4(67179), // Rule ID 19780 //
25848 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25849 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25850 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25851 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25852 // (fpround:{ *:[f32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64X:{ *:[f64] }:$src)
25853 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
25854 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
25855 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
25856 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
25857 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SSZrr),
25858 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
25859 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
25860 GIR_RootToRootCopy, /*OpIdx*/1, // src
25861 GIR_RootConstrainSelectedInstOperands,
25862 // GIR_Coverage, 19780,
25863 GIR_EraseRootFromParent_Done,
25864 // Label 1956: @67179
25865 GIM_Reject,
25866 // Label 1948: @67180
25867 GIM_Try, /*On fail goto*//*Label 1957*/ GIMT_Encode4(67210), // Rule ID 16239 //
25868 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
25869 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
25870 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
25871 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
25872 // (fpround:{ *:[f64] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP80:{ *:[f80] }:$src, RFP64:{ *:[i32] })
25873 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
25874 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::RFP64RegClassID),
25875 // GIR_Coverage, 16239,
25876 GIR_Done,
25877 // Label 1957: @67210
25878 GIM_Reject,
25879 // Label 1949: @67211
25880 GIM_Reject,
25881 // Label 41: @67212
25882 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(11), /*)*//*default:*//*Label 1961*/ GIMT_Encode4(67708),
25883 /*GILLT_s32*//*Label 1958*/ GIMT_Encode4(67255),
25884 /*GILLT_s64*//*Label 1959*/ GIMT_Encode4(67466), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
25885 /*GILLT_v4s32*//*Label 1960*/ GIMT_Encode4(67677),
25886 // Label 1958: @67255
25887 GIM_Try, /*On fail goto*//*Label 1962*/ GIMT_Encode4(67285), // Rule ID 1728 //
25888 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25889 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25890 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
25891 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25892 // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
25893 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSS2SIrr),
25894 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25895 GIR_RootConstrainSelectedInstOperands,
25896 // GIR_Coverage, 1728,
25897 GIR_Done,
25898 // Label 1962: @67285
25899 GIM_Try, /*On fail goto*//*Label 1963*/ GIMT_Encode4(67315), // Rule ID 1736 //
25900 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25901 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25902 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
25903 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25904 // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src)
25905 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSD2SIrr),
25906 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25907 GIR_RootConstrainSelectedInstOperands,
25908 // GIR_Coverage, 1736,
25909 GIR_Done,
25910 // Label 1963: @67315
25911 GIM_Try, /*On fail goto*//*Label 1964*/ GIMT_Encode4(67345), // Rule ID 1752 //
25912 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
25913 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25914 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
25915 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25916 // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
25917 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTTSS2SIrr),
25918 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25919 GIR_RootConstrainSelectedInstOperands,
25920 // GIR_Coverage, 1752,
25921 GIR_Done,
25922 // Label 1964: @67345
25923 GIM_Try, /*On fail goto*//*Label 1965*/ GIMT_Encode4(67375), // Rule ID 1760 //
25924 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
25925 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25926 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
25927 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25928 // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src)
25929 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTTSD2SIrr),
25930 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25931 GIR_RootConstrainSelectedInstOperands,
25932 // GIR_Coverage, 1760,
25933 GIR_Done,
25934 // Label 1965: @67375
25935 GIM_Try, /*On fail goto*//*Label 1966*/ GIMT_Encode4(67405), // Rule ID 10247 //
25936 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25937 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25938 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
25939 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
25940 // (fp_to_sint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)
25941 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSS2SIZrr),
25942 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25943 GIR_RootConstrainSelectedInstOperands,
25944 // GIR_Coverage, 10247,
25945 GIR_Done,
25946 // Label 1966: @67405
25947 GIM_Try, /*On fail goto*//*Label 1967*/ GIMT_Encode4(67435), // Rule ID 10265 //
25948 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
25949 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25950 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
25951 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
25952 // (fp_to_sint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src)
25953 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSD2SIZrr),
25954 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25955 GIR_RootConstrainSelectedInstOperands,
25956 // GIR_Coverage, 10265,
25957 GIR_Done,
25958 // Label 1967: @67435
25959 GIM_Try, /*On fail goto*//*Label 1968*/ GIMT_Encode4(67465), // Rule ID 15118 //
25960 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
25961 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
25962 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
25963 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
25964 // (fp_to_sint:{ *:[i32] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2SIZrr:{ *:[i32] } FR16X:{ *:[f16] }:$src)
25965 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSH2SIZrr),
25966 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25967 GIR_RootConstrainSelectedInstOperands,
25968 // GIR_Coverage, 15118,
25969 GIR_Done,
25970 // Label 1968: @67465
25971 GIM_Reject,
25972 // Label 1959: @67466
25973 GIM_Try, /*On fail goto*//*Label 1969*/ GIMT_Encode4(67496), // Rule ID 1732 //
25974 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25975 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
25976 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
25977 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
25978 // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
25979 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSS2SI64rr),
25980 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25981 GIR_RootConstrainSelectedInstOperands,
25982 // GIR_Coverage, 1732,
25983 GIR_Done,
25984 // Label 1969: @67496
25985 GIM_Try, /*On fail goto*//*Label 1970*/ GIMT_Encode4(67526), // Rule ID 1740 //
25986 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
25987 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
25988 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
25989 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
25990 // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
25991 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSD2SI64rr),
25992 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
25993 GIR_RootConstrainSelectedInstOperands,
25994 // GIR_Coverage, 1740,
25995 GIR_Done,
25996 // Label 1970: @67526
25997 GIM_Try, /*On fail goto*//*Label 1971*/ GIMT_Encode4(67556), // Rule ID 1756 //
25998 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
25999 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26000 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26001 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
26002 // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
26003 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTTSS2SI64rr),
26004 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26005 GIR_RootConstrainSelectedInstOperands,
26006 // GIR_Coverage, 1756,
26007 GIR_Done,
26008 // Label 1971: @67556
26009 GIM_Try, /*On fail goto*//*Label 1972*/ GIMT_Encode4(67586), // Rule ID 1764 //
26010 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
26011 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26012 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26013 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
26014 // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
26015 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTTSD2SI64rr),
26016 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26017 GIR_RootConstrainSelectedInstOperands,
26018 // GIR_Coverage, 1764,
26019 GIR_Done,
26020 // Label 1972: @67586
26021 GIM_Try, /*On fail goto*//*Label 1973*/ GIMT_Encode4(67616), // Rule ID 10256 //
26022 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26023 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26024 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26025 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
26026 // (fp_to_sint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src)
26027 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSS2SI64Zrr),
26028 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26029 GIR_RootConstrainSelectedInstOperands,
26030 // GIR_Coverage, 10256,
26031 GIR_Done,
26032 // Label 1973: @67616
26033 GIM_Try, /*On fail goto*//*Label 1974*/ GIMT_Encode4(67646), // Rule ID 10274 //
26034 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26035 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26036 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26037 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
26038 // (fp_to_sint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)
26039 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSD2SI64Zrr),
26040 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26041 GIR_RootConstrainSelectedInstOperands,
26042 // GIR_Coverage, 10274,
26043 GIR_Done,
26044 // Label 1974: @67646
26045 GIM_Try, /*On fail goto*//*Label 1975*/ GIMT_Encode4(67676), // Rule ID 15127 //
26046 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26047 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
26048 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26049 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
26050 // (fp_to_sint:{ *:[i64] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2SI64Zrr:{ *:[i64] } FR16X:{ *:[f16] }:$src)
26051 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSH2SI64Zrr),
26052 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26053 GIR_RootConstrainSelectedInstOperands,
26054 // GIR_Coverage, 15127,
26055 GIR_Done,
26056 // Label 1975: @67676
26057 GIM_Reject,
26058 // Label 1960: @67677
26059 GIM_Try, /*On fail goto*//*Label 1976*/ GIMT_Encode4(67707), // Rule ID 16562 //
26060 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
26061 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
26062 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
26063 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
26064 // (fp_to_sint:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) => (VCVTTPD2DQYrr:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src)
26065 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTPD2DQYrr),
26066 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26067 GIR_RootConstrainSelectedInstOperands,
26068 // GIR_Coverage, 16562,
26069 GIR_Done,
26070 // Label 1976: @67707
26071 GIM_Reject,
26072 // Label 1961: @67708
26073 GIM_Reject,
26074 // Label 42: @67709
26075 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(5), /*)*//*default:*//*Label 1979*/ GIMT_Encode4(67910),
26076 /*GILLT_s32*//*Label 1977*/ GIMT_Encode4(67728),
26077 /*GILLT_s64*//*Label 1978*/ GIMT_Encode4(67819),
26078 // Label 1977: @67728
26079 GIM_Try, /*On fail goto*//*Label 1980*/ GIMT_Encode4(67758), // Rule ID 10283 //
26080 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26081 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26082 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26083 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
26084 // (fp_to_uint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)
26085 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSS2USIZrr),
26086 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26087 GIR_RootConstrainSelectedInstOperands,
26088 // GIR_Coverage, 10283,
26089 GIR_Done,
26090 // Label 1980: @67758
26091 GIM_Try, /*On fail goto*//*Label 1981*/ GIMT_Encode4(67788), // Rule ID 10301 //
26092 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26093 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26094 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26095 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
26096 // (fp_to_uint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src)
26097 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSD2USIZrr),
26098 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26099 GIR_RootConstrainSelectedInstOperands,
26100 // GIR_Coverage, 10301,
26101 GIR_Done,
26102 // Label 1981: @67788
26103 GIM_Try, /*On fail goto*//*Label 1982*/ GIMT_Encode4(67818), // Rule ID 15136 //
26104 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26105 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
26106 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26107 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
26108 // (fp_to_uint:{ *:[i32] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2USIZrr:{ *:[i32] } FR16X:{ *:[f16] }:$src)
26109 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSH2USIZrr),
26110 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26111 GIR_RootConstrainSelectedInstOperands,
26112 // GIR_Coverage, 15136,
26113 GIR_Done,
26114 // Label 1982: @67818
26115 GIM_Reject,
26116 // Label 1978: @67819
26117 GIM_Try, /*On fail goto*//*Label 1983*/ GIMT_Encode4(67849), // Rule ID 10292 //
26118 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26119 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26120 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26121 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
26122 // (fp_to_uint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src)
26123 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSS2USI64Zrr),
26124 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26125 GIR_RootConstrainSelectedInstOperands,
26126 // GIR_Coverage, 10292,
26127 GIR_Done,
26128 // Label 1983: @67849
26129 GIM_Try, /*On fail goto*//*Label 1984*/ GIMT_Encode4(67879), // Rule ID 10310 //
26130 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26131 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26132 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26133 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
26134 // (fp_to_uint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)
26135 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSD2USI64Zrr),
26136 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26137 GIR_RootConstrainSelectedInstOperands,
26138 // GIR_Coverage, 10310,
26139 GIR_Done,
26140 // Label 1984: @67879
26141 GIM_Try, /*On fail goto*//*Label 1985*/ GIMT_Encode4(67909), // Rule ID 15145 //
26142 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26143 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
26144 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26145 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
26146 // (fp_to_uint:{ *:[i64] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2USI64Zrr:{ *:[i64] } FR16X:{ *:[f16] }:$src)
26147 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTTSH2USI64Zrr),
26148 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26149 GIR_RootConstrainSelectedInstOperands,
26150 // GIR_Coverage, 15145,
26151 GIR_Done,
26152 // Label 1985: @67909
26153 GIM_Reject,
26154 // Label 1979: @67910
26155 GIM_Reject,
26156 // Label 43: @67911
26157 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 1998*/ GIMT_Encode4(69172),
26158 /*GILLT_s16*//*Label 1986*/ GIMT_Encode4(68006),
26159 /*GILLT_s32*//*Label 1987*/ GIMT_Encode4(68097),
26160 /*GILLT_s64*//*Label 1988*/ GIMT_Encode4(68338), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
26161 /*GILLT_v2s64*//*Label 1989*/ GIMT_Encode4(68575), GIMT_Encode4(0),
26162 /*GILLT_v4s32*//*Label 1990*/ GIMT_Encode4(68606),
26163 /*GILLT_v4s64*//*Label 1991*/ GIMT_Encode4(68727), GIMT_Encode4(0),
26164 /*GILLT_v8s16*//*Label 1992*/ GIMT_Encode4(68810),
26165 /*GILLT_v8s32*//*Label 1993*/ GIMT_Encode4(68901),
26166 /*GILLT_v8s64*//*Label 1994*/ GIMT_Encode4(68992), GIMT_Encode4(0), GIMT_Encode4(0),
26167 /*GILLT_v16s16*//*Label 1995*/ GIMT_Encode4(69049),
26168 /*GILLT_v16s32*//*Label 1996*/ GIMT_Encode4(69110), GIMT_Encode4(0), GIMT_Encode4(0),
26169 /*GILLT_v32s16*//*Label 1997*/ GIMT_Encode4(69141),
26170 // Label 1986: @68006
26171 GIM_Try, /*On fail goto*//*Label 1999*/ GIMT_Encode4(68051), // Rule ID 20709 //
26172 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26173 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26174 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
26175 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26176 // (sint_to_fp:{ *:[f16] } GR32:{ *:[i32] }:$src) => (VCVTSI2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR32:{ *:[i32] }:$src)
26177 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
26178 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26179 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26180 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26181 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI2SHZrr),
26182 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26183 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26184 GIR_RootToRootCopy, /*OpIdx*/1, // src
26185 GIR_RootConstrainSelectedInstOperands,
26186 // GIR_Coverage, 20709,
26187 GIR_EraseRootFromParent_Done,
26188 // Label 1999: @68051
26189 GIM_Try, /*On fail goto*//*Label 2000*/ GIMT_Encode4(68096), // Rule ID 20711 //
26190 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26191 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26192 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
26193 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26194 // (sint_to_fp:{ *:[f16] } GR64:{ *:[i64] }:$src) => (VCVTSI642SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR64:{ *:[i64] }:$src)
26195 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
26196 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26197 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26198 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26199 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI642SHZrr),
26200 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26201 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26202 GIR_RootToRootCopy, /*OpIdx*/1, // src
26203 GIR_RootConstrainSelectedInstOperands,
26204 // GIR_Coverage, 20711,
26205 GIR_EraseRootFromParent_Done,
26206 // Label 2000: @68096
26207 GIM_Reject,
26208 // Label 1987: @68097
26209 GIM_Try, /*On fail goto*//*Label 2001*/ GIMT_Encode4(68127), // Rule ID 1776 //
26210 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
26211 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26212 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
26213 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26214 // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (CVTSI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
26215 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSI2SSrr),
26216 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26217 GIR_RootConstrainSelectedInstOperands,
26218 // GIR_Coverage, 1776,
26219 GIR_Done,
26220 // Label 2001: @68127
26221 GIM_Try, /*On fail goto*//*Label 2002*/ GIMT_Encode4(68157), // Rule ID 1780 //
26222 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
26223 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26224 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
26225 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26226 // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (CVTSI642SSrr:{ *:[f32] } GR64:{ *:[i64] }:$src)
26227 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSI642SSrr),
26228 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26229 GIR_RootConstrainSelectedInstOperands,
26230 // GIR_Coverage, 1780,
26231 GIR_Done,
26232 // Label 2002: @68157
26233 GIM_Try, /*On fail goto*//*Label 2003*/ GIMT_Encode4(68202), // Rule ID 16492 //
26234 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
26235 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26236 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
26237 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26238 // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src)
26239 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
26240 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26241 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26242 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26243 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI2SSrr),
26244 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26245 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26246 GIR_RootToRootCopy, /*OpIdx*/1, // src
26247 GIR_RootConstrainSelectedInstOperands,
26248 // GIR_Coverage, 16492,
26249 GIR_EraseRootFromParent_Done,
26250 // Label 2003: @68202
26251 GIM_Try, /*On fail goto*//*Label 2004*/ GIMT_Encode4(68247), // Rule ID 16494 //
26252 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
26253 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26254 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
26255 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26256 // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src)
26257 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
26258 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26259 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26260 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26261 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI642SSrr),
26262 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26263 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26264 GIR_RootToRootCopy, /*OpIdx*/1, // src
26265 GIR_RootConstrainSelectedInstOperands,
26266 // GIR_Coverage, 16494,
26267 GIR_EraseRootFromParent_Done,
26268 // Label 2004: @68247
26269 GIM_Try, /*On fail goto*//*Label 2005*/ GIMT_Encode4(68292), // Rule ID 19716 //
26270 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26271 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26272 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
26273 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26274 // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src)
26275 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
26276 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26277 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26278 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26279 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI2SSZrr),
26280 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26281 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26282 GIR_RootToRootCopy, /*OpIdx*/1, // src
26283 GIR_RootConstrainSelectedInstOperands,
26284 // GIR_Coverage, 19716,
26285 GIR_EraseRootFromParent_Done,
26286 // Label 2005: @68292
26287 GIM_Try, /*On fail goto*//*Label 2006*/ GIMT_Encode4(68337), // Rule ID 19718 //
26288 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26289 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26290 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
26291 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26292 // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src)
26293 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
26294 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26295 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26296 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26297 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI642SSZrr),
26298 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26299 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26300 GIR_RootToRootCopy, /*OpIdx*/1, // src
26301 GIR_RootConstrainSelectedInstOperands,
26302 // GIR_Coverage, 19718,
26303 GIR_EraseRootFromParent_Done,
26304 // Label 2006: @68337
26305 GIM_Reject,
26306 // Label 1988: @68338
26307 GIM_Try, /*On fail goto*//*Label 2007*/ GIMT_Encode4(68364), // Rule ID 1784 //
26308 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
26309 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26310 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
26311 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26312 // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (CVTSI2SDrr:{ *:[f64] } GR32:{ *:[i32] }:$src)
26313 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSI2SDrr),
26314 GIR_RootConstrainSelectedInstOperands,
26315 // GIR_Coverage, 1784,
26316 GIR_Done,
26317 // Label 2007: @68364
26318 GIM_Try, /*On fail goto*//*Label 2008*/ GIMT_Encode4(68394), // Rule ID 1788 //
26319 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
26320 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26321 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
26322 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26323 // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (CVTSI642SDrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
26324 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSI642SDrr),
26325 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26326 GIR_RootConstrainSelectedInstOperands,
26327 // GIR_Coverage, 1788,
26328 GIR_Done,
26329 // Label 2008: @68394
26330 GIM_Try, /*On fail goto*//*Label 2009*/ GIMT_Encode4(68439), // Rule ID 16496 //
26331 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
26332 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26333 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
26334 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26335 // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src)
26336 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
26337 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26338 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26339 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26340 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI2SDrr),
26341 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26342 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26343 GIR_RootToRootCopy, /*OpIdx*/1, // src
26344 GIR_RootConstrainSelectedInstOperands,
26345 // GIR_Coverage, 16496,
26346 GIR_EraseRootFromParent_Done,
26347 // Label 2009: @68439
26348 GIM_Try, /*On fail goto*//*Label 2010*/ GIMT_Encode4(68484), // Rule ID 16498 //
26349 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
26350 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26351 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
26352 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26353 // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src)
26354 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
26355 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26356 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26357 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26358 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI642SDrr),
26359 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26360 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26361 GIR_RootToRootCopy, /*OpIdx*/1, // src
26362 GIR_RootConstrainSelectedInstOperands,
26363 // GIR_Coverage, 16498,
26364 GIR_EraseRootFromParent_Done,
26365 // Label 2010: @68484
26366 GIM_Try, /*On fail goto*//*Label 2011*/ GIMT_Encode4(68529), // Rule ID 19720 //
26367 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26368 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26369 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
26370 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26371 // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src)
26372 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
26373 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26374 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26375 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26376 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI2SDZrr),
26377 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26378 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26379 GIR_RootToRootCopy, /*OpIdx*/1, // src
26380 GIR_RootConstrainSelectedInstOperands,
26381 // GIR_Coverage, 19720,
26382 GIR_EraseRootFromParent_Done,
26383 // Label 2011: @68529
26384 GIM_Try, /*On fail goto*//*Label 2012*/ GIMT_Encode4(68574), // Rule ID 19722 //
26385 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26386 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26387 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
26388 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26389 // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src)
26390 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
26391 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26392 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26393 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26394 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTSI642SDZrr),
26395 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26396 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26397 GIR_RootToRootCopy, /*OpIdx*/1, // src
26398 GIR_RootConstrainSelectedInstOperands,
26399 // GIR_Coverage, 19722,
26400 GIR_EraseRootFromParent_Done,
26401 // Label 2012: @68574
26402 GIM_Reject,
26403 // Label 1989: @68575
26404 GIM_Try, /*On fail goto*//*Label 2013*/ GIMT_Encode4(68605), // Rule ID 11261 //
26405 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
26406 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
26407 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26408 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26409 // (sint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src)
26410 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTQQ2PDZ128rr),
26411 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26412 GIR_RootConstrainSelectedInstOperands,
26413 // GIR_Coverage, 11261,
26414 GIR_Done,
26415 // Label 2013: @68605
26416 GIM_Reject,
26417 // Label 1990: @68606
26418 GIM_Try, /*On fail goto*//*Label 2014*/ GIMT_Encode4(68636), // Rule ID 1856 //
26419 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
26420 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
26421 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
26422 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
26423 // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src)
26424 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PSrr),
26425 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26426 GIR_RootConstrainSelectedInstOperands,
26427 // GIR_Coverage, 1856,
26428 GIR_Done,
26429 // Label 2014: @68636
26430 GIM_Try, /*On fail goto*//*Label 2015*/ GIMT_Encode4(68666), // Rule ID 1864 //
26431 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
26432 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
26433 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
26434 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
26435 // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (CVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src)
26436 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTDQ2PSrr),
26437 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26438 GIR_RootConstrainSelectedInstOperands,
26439 // GIR_Coverage, 1864,
26440 GIR_Done,
26441 // Label 2015: @68666
26442 GIM_Try, /*On fail goto*//*Label 2016*/ GIMT_Encode4(68696), // Rule ID 10637 //
26443 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
26444 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
26445 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26446 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26447 // (sint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src)
26448 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PSZ128rr),
26449 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26450 GIR_RootConstrainSelectedInstOperands,
26451 // GIR_Coverage, 10637,
26452 GIR_Done,
26453 // Label 2016: @68696
26454 GIM_Try, /*On fail goto*//*Label 2017*/ GIMT_Encode4(68726), // Rule ID 11393 //
26455 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
26456 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
26457 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26458 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26459 // (sint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src)
26460 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTQQ2PSZ256rr),
26461 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26462 GIR_RootConstrainSelectedInstOperands,
26463 // GIR_Coverage, 11393,
26464 GIR_Done,
26465 // Label 2017: @68726
26466 GIM_Reject,
26467 // Label 1991: @68727
26468 GIM_Try, /*On fail goto*//*Label 2018*/ GIMT_Encode4(68753), // Rule ID 1935 //
26469 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
26470 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
26471 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
26472 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
26473 // (sint_to_fp:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PDYrr:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src)
26474 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PDYrr),
26475 GIR_RootConstrainSelectedInstOperands,
26476 // GIR_Coverage, 1935,
26477 GIR_Done,
26478 // Label 2018: @68753
26479 GIM_Try, /*On fail goto*//*Label 2019*/ GIMT_Encode4(68779), // Rule ID 10610 //
26480 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
26481 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
26482 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26483 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26484 // (sint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src)
26485 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PDZ256rr),
26486 GIR_RootConstrainSelectedInstOperands,
26487 // GIR_Coverage, 10610,
26488 GIR_Done,
26489 // Label 2019: @68779
26490 GIM_Try, /*On fail goto*//*Label 2020*/ GIMT_Encode4(68809), // Rule ID 11273 //
26491 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
26492 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
26493 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26494 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26495 // (sint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src)
26496 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTQQ2PDZ256rr),
26497 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26498 GIR_RootConstrainSelectedInstOperands,
26499 // GIR_Coverage, 11273,
26500 GIR_Done,
26501 // Label 2020: @68809
26502 GIM_Reject,
26503 // Label 1992: @68810
26504 GIM_Try, /*On fail goto*//*Label 2021*/ GIMT_Encode4(68840), // Rule ID 11339 //
26505 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
26506 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
26507 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26508 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26509 // (sint_to_fp:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PHZ256rr:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src)
26510 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PHZ256rr),
26511 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26512 GIR_RootConstrainSelectedInstOperands,
26513 // GIR_Coverage, 11339,
26514 GIR_Done,
26515 // Label 2021: @68840
26516 GIM_Try, /*On fail goto*//*Label 2022*/ GIMT_Encode4(68870), // Rule ID 14768 //
26517 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
26518 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
26519 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26520 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26521 // (sint_to_fp:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src) => (VCVTW2PHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src)
26522 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTW2PHZ128rr),
26523 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26524 GIR_RootConstrainSelectedInstOperands,
26525 // GIR_Coverage, 14768,
26526 GIR_Done,
26527 // Label 2022: @68870
26528 GIM_Try, /*On fail goto*//*Label 2023*/ GIMT_Encode4(68900), // Rule ID 15068 //
26529 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26530 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
26531 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26532 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26533 // (sint_to_fp:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PHZrr:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src)
26534 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTQQ2PHZrr),
26535 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26536 GIR_RootConstrainSelectedInstOperands,
26537 // GIR_Coverage, 15068,
26538 GIR_Done,
26539 // Label 2023: @68900
26540 GIM_Reject,
26541 // Label 1993: @68901
26542 GIM_Try, /*On fail goto*//*Label 2024*/ GIMT_Encode4(68931), // Rule ID 1860 //
26543 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
26544 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
26545 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
26546 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
26547 // (sint_to_fp:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) => (VCVTDQ2PSYrr:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src)
26548 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PSYrr),
26549 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26550 GIR_RootConstrainSelectedInstOperands,
26551 // GIR_Coverage, 1860,
26552 GIR_Done,
26553 // Label 2024: @68931
26554 GIM_Try, /*On fail goto*//*Label 2025*/ GIMT_Encode4(68961), // Rule ID 10649 //
26555 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
26556 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
26557 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26558 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26559 // (sint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src)
26560 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PSZ256rr),
26561 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26562 GIR_RootConstrainSelectedInstOperands,
26563 // GIR_Coverage, 10649,
26564 GIR_Done,
26565 // Label 2025: @68961
26566 GIM_Try, /*On fail goto*//*Label 2026*/ GIMT_Encode4(68991), // Rule ID 11378 //
26567 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
26568 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
26569 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26570 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26571 // (sint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src)
26572 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTQQ2PSZrr),
26573 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26574 GIR_RootConstrainSelectedInstOperands,
26575 // GIR_Coverage, 11378,
26576 GIR_Done,
26577 // Label 2026: @68991
26578 GIM_Reject,
26579 // Label 1994: @68992
26580 GIM_Try, /*On fail goto*//*Label 2027*/ GIMT_Encode4(69018), // Rule ID 10586 //
26581 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26582 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
26583 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26584 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26585 // (sint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src)
26586 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PDZrr),
26587 GIR_RootConstrainSelectedInstOperands,
26588 // GIR_Coverage, 10586,
26589 GIR_Done,
26590 // Label 2027: @69018
26591 GIM_Try, /*On fail goto*//*Label 2028*/ GIMT_Encode4(69048), // Rule ID 11246 //
26592 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
26593 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
26594 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26595 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26596 // (sint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src)
26597 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTQQ2PDZrr),
26598 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26599 GIR_RootConstrainSelectedInstOperands,
26600 // GIR_Coverage, 11246,
26601 GIR_Done,
26602 // Label 2028: @69048
26603 GIM_Reject,
26604 // Label 1995: @69049
26605 GIM_Try, /*On fail goto*//*Label 2029*/ GIMT_Encode4(69079), // Rule ID 11324 //
26606 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26607 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
26608 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26609 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26610 // (sint_to_fp:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src) => (VCVTDQ2PHZrr:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src)
26611 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PHZrr),
26612 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26613 GIR_RootConstrainSelectedInstOperands,
26614 // GIR_Coverage, 11324,
26615 GIR_Done,
26616 // Label 2029: @69079
26617 GIM_Try, /*On fail goto*//*Label 2030*/ GIMT_Encode4(69109), // Rule ID 14780 //
26618 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
26619 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
26620 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26621 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26622 // (sint_to_fp:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src) => (VCVTW2PHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src)
26623 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTW2PHZ256rr),
26624 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26625 GIR_RootConstrainSelectedInstOperands,
26626 // GIR_Coverage, 14780,
26627 GIR_Done,
26628 // Label 2030: @69109
26629 GIM_Reject,
26630 // Label 1996: @69110
26631 GIM_Try, /*On fail goto*//*Label 2031*/ GIMT_Encode4(69140), // Rule ID 10622 //
26632 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26633 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
26634 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26635 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26636 // (sint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src)
26637 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTDQ2PSZrr),
26638 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26639 GIR_RootConstrainSelectedInstOperands,
26640 // GIR_Coverage, 10622,
26641 GIR_Done,
26642 // Label 2031: @69140
26643 GIM_Reject,
26644 // Label 1997: @69141
26645 GIM_Try, /*On fail goto*//*Label 2032*/ GIMT_Encode4(69171), // Rule ID 14753 //
26646 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26647 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
26648 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26649 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26650 // (sint_to_fp:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src) => (VCVTW2PHZrr:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src)
26651 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTW2PHZrr),
26652 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26653 GIR_RootConstrainSelectedInstOperands,
26654 // GIR_Coverage, 14753,
26655 GIR_Done,
26656 // Label 2032: @69171
26657 GIM_Reject,
26658 // Label 1998: @69172
26659 GIM_Reject,
26660 // Label 44: @69173
26661 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2045*/ GIMT_Encode4(70022),
26662 /*GILLT_s16*//*Label 2033*/ GIMT_Encode4(69268),
26663 /*GILLT_s32*//*Label 2034*/ GIMT_Encode4(69359),
26664 /*GILLT_s64*//*Label 2035*/ GIMT_Encode4(69450), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
26665 /*GILLT_v2s64*//*Label 2036*/ GIMT_Encode4(69541), GIMT_Encode4(0),
26666 /*GILLT_v4s32*//*Label 2037*/ GIMT_Encode4(69572),
26667 /*GILLT_v4s64*//*Label 2038*/ GIMT_Encode4(69633), GIMT_Encode4(0),
26668 /*GILLT_v8s16*//*Label 2039*/ GIMT_Encode4(69690),
26669 /*GILLT_v8s32*//*Label 2040*/ GIMT_Encode4(69781),
26670 /*GILLT_v8s64*//*Label 2041*/ GIMT_Encode4(69842), GIMT_Encode4(0), GIMT_Encode4(0),
26671 /*GILLT_v16s16*//*Label 2042*/ GIMT_Encode4(69899),
26672 /*GILLT_v16s32*//*Label 2043*/ GIMT_Encode4(69960), GIMT_Encode4(0), GIMT_Encode4(0),
26673 /*GILLT_v32s16*//*Label 2044*/ GIMT_Encode4(69991),
26674 // Label 2033: @69268
26675 GIM_Try, /*On fail goto*//*Label 2046*/ GIMT_Encode4(69313), // Rule ID 20717 //
26676 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26677 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26678 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
26679 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26680 // (uint_to_fp:{ *:[f16] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR32:{ *:[i32] }:$src)
26681 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
26682 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26683 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26684 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26685 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTUSI2SHZrr),
26686 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26687 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26688 GIR_RootToRootCopy, /*OpIdx*/1, // src
26689 GIR_RootConstrainSelectedInstOperands,
26690 // GIR_Coverage, 20717,
26691 GIR_EraseRootFromParent_Done,
26692 // Label 2046: @69313
26693 GIM_Try, /*On fail goto*//*Label 2047*/ GIMT_Encode4(69358), // Rule ID 20719 //
26694 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26695 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26696 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
26697 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26698 // (uint_to_fp:{ *:[f16] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR64:{ *:[i64] }:$src)
26699 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
26700 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26701 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26702 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26703 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTUSI642SHZrr),
26704 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26705 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26706 GIR_RootToRootCopy, /*OpIdx*/1, // src
26707 GIR_RootConstrainSelectedInstOperands,
26708 // GIR_Coverage, 20719,
26709 GIR_EraseRootFromParent_Done,
26710 // Label 2047: @69358
26711 GIM_Reject,
26712 // Label 2034: @69359
26713 GIM_Try, /*On fail goto*//*Label 2048*/ GIMT_Encode4(69404), // Rule ID 19732 //
26714 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26715 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26716 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
26717 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26718 // (uint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src)
26719 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
26720 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26721 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26722 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26723 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTUSI2SSZrr),
26724 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26725 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26726 GIR_RootToRootCopy, /*OpIdx*/1, // src
26727 GIR_RootConstrainSelectedInstOperands,
26728 // GIR_Coverage, 19732,
26729 GIR_EraseRootFromParent_Done,
26730 // Label 2048: @69404
26731 GIM_Try, /*On fail goto*//*Label 2049*/ GIMT_Encode4(69449), // Rule ID 19734 //
26732 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26733 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26734 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
26735 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26736 // (uint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src)
26737 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
26738 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26739 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26740 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26741 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTUSI642SSZrr),
26742 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26743 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26744 GIR_RootToRootCopy, /*OpIdx*/1, // src
26745 GIR_RootConstrainSelectedInstOperands,
26746 // GIR_Coverage, 19734,
26747 GIR_EraseRootFromParent_Done,
26748 // Label 2049: @69449
26749 GIM_Reject,
26750 // Label 2035: @69450
26751 GIM_Try, /*On fail goto*//*Label 2050*/ GIMT_Encode4(69495), // Rule ID 19736 //
26752 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26753 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
26754 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
26755 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
26756 // (uint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src)
26757 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
26758 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26759 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26760 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26761 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTUSI2SDZrr),
26762 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26763 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26764 GIR_RootToRootCopy, /*OpIdx*/1, // src
26765 GIR_RootConstrainSelectedInstOperands,
26766 // GIR_Coverage, 19736,
26767 GIR_EraseRootFromParent_Done,
26768 // Label 2050: @69495
26769 GIM_Try, /*On fail goto*//*Label 2051*/ GIMT_Encode4(69540), // Rule ID 19738 //
26770 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26771 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
26772 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
26773 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
26774 // (uint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src)
26775 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
26776 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
26777 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
26778 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
26779 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTUSI642SDZrr),
26780 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
26781 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
26782 GIR_RootToRootCopy, /*OpIdx*/1, // src
26783 GIR_RootConstrainSelectedInstOperands,
26784 // GIR_Coverage, 19738,
26785 GIR_EraseRootFromParent_Done,
26786 // Label 2051: @69540
26787 GIM_Reject,
26788 // Label 2036: @69541
26789 GIM_Try, /*On fail goto*//*Label 2052*/ GIMT_Encode4(69571), // Rule ID 11300 //
26790 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
26791 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
26792 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26793 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26794 // (uint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTUQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src)
26795 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUQQ2PDZ128rr),
26796 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26797 GIR_RootConstrainSelectedInstOperands,
26798 // GIR_Coverage, 11300,
26799 GIR_Done,
26800 // Label 2052: @69571
26801 GIM_Reject,
26802 // Label 2037: @69572
26803 GIM_Try, /*On fail goto*//*Label 2053*/ GIMT_Encode4(69602), // Rule ID 10844 //
26804 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
26805 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
26806 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26807 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26808 // (uint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src)
26809 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUDQ2PSZ128rr),
26810 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26811 GIR_RootConstrainSelectedInstOperands,
26812 // GIR_Coverage, 10844,
26813 GIR_Done,
26814 // Label 2053: @69602
26815 GIM_Try, /*On fail goto*//*Label 2054*/ GIMT_Encode4(69632), // Rule ID 11420 //
26816 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
26817 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
26818 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26819 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26820 // (uint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src)
26821 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUQQ2PSZ256rr),
26822 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26823 GIR_RootConstrainSelectedInstOperands,
26824 // GIR_Coverage, 11420,
26825 GIR_Done,
26826 // Label 2054: @69632
26827 GIM_Reject,
26828 // Label 2038: @69633
26829 GIM_Try, /*On fail goto*//*Label 2055*/ GIMT_Encode4(69659), // Rule ID 10817 //
26830 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
26831 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
26832 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26833 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26834 // (uint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src)
26835 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUDQ2PDZ256rr),
26836 GIR_RootConstrainSelectedInstOperands,
26837 // GIR_Coverage, 10817,
26838 GIR_Done,
26839 // Label 2055: @69659
26840 GIM_Try, /*On fail goto*//*Label 2056*/ GIMT_Encode4(69689), // Rule ID 11312 //
26841 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX),
26842 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
26843 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26844 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26845 // (uint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src)
26846 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUQQ2PDZ256rr),
26847 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26848 GIR_RootConstrainSelectedInstOperands,
26849 // GIR_Coverage, 11312,
26850 GIR_Done,
26851 // Label 2056: @69689
26852 GIM_Reject,
26853 // Label 2039: @69690
26854 GIM_Try, /*On fail goto*//*Label 2057*/ GIMT_Encode4(69720), // Rule ID 11366 //
26855 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
26856 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
26857 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26858 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26859 // (uint_to_fp:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PHZ256rr:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src)
26860 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUDQ2PHZ256rr),
26861 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26862 GIR_RootConstrainSelectedInstOperands,
26863 // GIR_Coverage, 11366,
26864 GIR_Done,
26865 // Label 2057: @69720
26866 GIM_Try, /*On fail goto*//*Label 2058*/ GIMT_Encode4(69750), // Rule ID 14621 //
26867 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
26868 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
26869 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26870 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26871 // (uint_to_fp:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src) => (VCVTUW2PHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src)
26872 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUW2PHZ128rr),
26873 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26874 GIR_RootConstrainSelectedInstOperands,
26875 // GIR_Coverage, 14621,
26876 GIR_Done,
26877 // Label 2058: @69750
26878 GIM_Try, /*On fail goto*//*Label 2059*/ GIMT_Encode4(69780), // Rule ID 15083 //
26879 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26880 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
26881 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
26882 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26883 // (uint_to_fp:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PHZrr:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src)
26884 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUQQ2PHZrr),
26885 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26886 GIR_RootConstrainSelectedInstOperands,
26887 // GIR_Coverage, 15083,
26888 GIR_Done,
26889 // Label 2059: @69780
26890 GIM_Reject,
26891 // Label 2040: @69781
26892 GIM_Try, /*On fail goto*//*Label 2060*/ GIMT_Encode4(69811), // Rule ID 10856 //
26893 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
26894 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
26895 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26896 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26897 // (uint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src)
26898 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUDQ2PSZ256rr),
26899 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26900 GIR_RootConstrainSelectedInstOperands,
26901 // GIR_Coverage, 10856,
26902 GIR_Done,
26903 // Label 2060: @69811
26904 GIM_Try, /*On fail goto*//*Label 2061*/ GIMT_Encode4(69841), // Rule ID 11405 //
26905 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
26906 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
26907 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26908 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26909 // (uint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src)
26910 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUQQ2PSZrr),
26911 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26912 GIR_RootConstrainSelectedInstOperands,
26913 // GIR_Coverage, 11405,
26914 GIR_Done,
26915 // Label 2061: @69841
26916 GIM_Reject,
26917 // Label 2041: @69842
26918 GIM_Try, /*On fail goto*//*Label 2062*/ GIMT_Encode4(69868), // Rule ID 10793 //
26919 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26920 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
26921 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26922 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26923 // (uint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src)
26924 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUDQ2PDZrr),
26925 GIR_RootConstrainSelectedInstOperands,
26926 // GIR_Coverage, 10793,
26927 GIR_Done,
26928 // Label 2062: @69868
26929 GIM_Try, /*On fail goto*//*Label 2063*/ GIMT_Encode4(69898), // Rule ID 11285 //
26930 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI),
26931 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
26932 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26933 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26934 // (uint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src)
26935 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUQQ2PDZrr),
26936 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26937 GIR_RootConstrainSelectedInstOperands,
26938 // GIR_Coverage, 11285,
26939 GIR_Done,
26940 // Label 2063: @69898
26941 GIM_Reject,
26942 // Label 2042: @69899
26943 GIM_Try, /*On fail goto*//*Label 2064*/ GIMT_Encode4(69929), // Rule ID 11351 //
26944 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26945 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
26946 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26947 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26948 // (uint_to_fp:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src) => (VCVTUDQ2PHZrr:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src)
26949 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUDQ2PHZrr),
26950 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26951 GIR_RootConstrainSelectedInstOperands,
26952 // GIR_Coverage, 11351,
26953 GIR_Done,
26954 // Label 2064: @69929
26955 GIM_Try, /*On fail goto*//*Label 2065*/ GIMT_Encode4(69959), // Rule ID 14633 //
26956 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
26957 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
26958 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26959 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
26960 // (uint_to_fp:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src) => (VCVTUW2PHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src)
26961 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUW2PHZ256rr),
26962 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26963 GIR_RootConstrainSelectedInstOperands,
26964 // GIR_Coverage, 14633,
26965 GIR_Done,
26966 // Label 2065: @69959
26967 GIM_Reject,
26968 // Label 2043: @69960
26969 GIM_Try, /*On fail goto*//*Label 2066*/ GIMT_Encode4(69990), // Rule ID 10829 //
26970 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
26971 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
26972 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26973 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26974 // (uint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTUDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src)
26975 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUDQ2PSZrr),
26976 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26977 GIR_RootConstrainSelectedInstOperands,
26978 // GIR_Coverage, 10829,
26979 GIR_Done,
26980 // Label 2066: @69990
26981 GIM_Reject,
26982 // Label 2044: @69991
26983 GIM_Try, /*On fail goto*//*Label 2067*/ GIMT_Encode4(70021), // Rule ID 14606 //
26984 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
26985 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
26986 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26987 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
26988 // (uint_to_fp:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src) => (VCVTUW2PHZrr:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src)
26989 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTUW2PHZrr),
26990 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
26991 GIR_RootConstrainSelectedInstOperands,
26992 // GIR_Coverage, 14606,
26993 GIR_Done,
26994 // Label 2067: @70021
26995 GIM_Reject,
26996 // Label 2045: @70022
26997 GIM_Reject,
26998 // Label 45: @70023
26999 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(6), /*)*//*default:*//*Label 2071*/ GIMT_Encode4(70145),
27000 /*GILLT_s32*//*Label 2068*/ GIMT_Encode4(70046),
27001 /*GILLT_s64*//*Label 2069*/ GIMT_Encode4(70079),
27002 /*GILLT_s80*//*Label 2070*/ GIMT_Encode4(70112),
27003 // Label 2068: @70046
27004 GIM_Try, /*On fail goto*//*Label 2072*/ GIMT_Encode4(70078), // Rule ID 1033 //
27005 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
27006 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
27007 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
27008 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
27009 // (fabs:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (ABS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src)
27010 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ABS_Fp32),
27011 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
27012 GIR_RootConstrainSelectedInstOperands,
27013 // GIR_Coverage, 1033,
27014 GIR_Done,
27015 // Label 2072: @70078
27016 GIM_Reject,
27017 // Label 2069: @70079
27018 GIM_Try, /*On fail goto*//*Label 2073*/ GIMT_Encode4(70111), // Rule ID 1034 //
27019 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
27020 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
27021 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
27022 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
27023 // (fabs:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (ABS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src)
27024 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ABS_Fp64),
27025 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
27026 GIR_RootConstrainSelectedInstOperands,
27027 // GIR_Coverage, 1034,
27028 GIR_Done,
27029 // Label 2073: @70111
27030 GIM_Reject,
27031 // Label 2070: @70112
27032 GIM_Try, /*On fail goto*//*Label 2074*/ GIMT_Encode4(70144), // Rule ID 1035 //
27033 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
27034 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
27035 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
27036 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
27037 // (fabs:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (ABS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src)
27038 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ABS_Fp80),
27039 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
27040 GIR_RootConstrainSelectedInstOperands,
27041 // GIR_Coverage, 1035,
27042 GIR_Done,
27043 // Label 2074: @70144
27044 GIM_Reject,
27045 // Label 2071: @70145
27046 GIM_Reject,
27047 // Label 46: @70146
27048 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(25), /*)*//*default:*//*Label 2087*/ GIMT_Encode4(71254),
27049 /*GILLT_v2s64*//*Label 2075*/ GIMT_Encode4(70225), GIMT_Encode4(0),
27050 /*GILLT_v4s32*//*Label 2076*/ GIMT_Encode4(70430),
27051 /*GILLT_v4s64*//*Label 2077*/ GIMT_Encode4(70524), GIMT_Encode4(0),
27052 /*GILLT_v8s16*//*Label 2078*/ GIMT_Encode4(70729),
27053 /*GILLT_v8s32*//*Label 2079*/ GIMT_Encode4(70823),
27054 /*GILLT_v8s64*//*Label 2080*/ GIMT_Encode4(70890), GIMT_Encode4(0),
27055 /*GILLT_v16s8*//*Label 2081*/ GIMT_Encode4(70924),
27056 /*GILLT_v16s16*//*Label 2082*/ GIMT_Encode4(71018),
27057 /*GILLT_v16s32*//*Label 2083*/ GIMT_Encode4(71085), GIMT_Encode4(0),
27058 /*GILLT_v32s8*//*Label 2084*/ GIMT_Encode4(71119),
27059 /*GILLT_v32s16*//*Label 2085*/ GIMT_Encode4(71186), GIMT_Encode4(0),
27060 /*GILLT_v64s8*//*Label 2086*/ GIMT_Encode4(71220),
27061 // Label 2075: @70225
27062 GIM_Try, /*On fail goto*//*Label 2088*/ GIMT_Encode4(70429),
27063 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
27064 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
27065 GIM_Try, /*On fail goto*//*Label 2089*/ GIMT_Encode4(70263), // Rule ID 5539 //
27066 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27067 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27068 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27069 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27070 // (smin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMINSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
27071 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSQZ128rr),
27072 GIR_RootConstrainSelectedInstOperands,
27073 // GIR_Coverage, 5539,
27074 GIR_Done,
27075 // Label 2089: @70263
27076 GIM_Try, /*On fail goto*//*Label 2090*/ GIMT_Encode4(70428), // Rule ID 18594 //
27077 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
27078 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27079 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27080 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27081 // (smin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMINSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
27082 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
27083 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
27084 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
27085 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
27086 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
27087 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27088 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27089 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
27090 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27091 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27092 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
27093 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
27094 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
27095 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27096 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27097 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
27098 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27099 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27100 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
27101 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27102 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27103 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
27104 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
27105 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
27106 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27107 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27108 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
27109 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMINSQZrr),
27110 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27111 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
27112 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
27113 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
27114 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
27115 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
27116 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
27117 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
27118 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27119 // GIR_Coverage, 18594,
27120 GIR_EraseRootFromParent_Done,
27121 // Label 2090: @70428
27122 GIM_Reject,
27123 // Label 2088: @70429
27124 GIM_Reject,
27125 // Label 2076: @70430
27126 GIM_Try, /*On fail goto*//*Label 2091*/ GIMT_Encode4(70523),
27127 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
27128 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
27129 GIM_Try, /*On fail goto*//*Label 2092*/ GIMT_Encode4(70468), // Rule ID 3133 //
27130 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
27131 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27132 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27133 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27134 // (smin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMINSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
27135 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSDrr),
27136 GIR_RootConstrainSelectedInstOperands,
27137 // GIR_Coverage, 3133,
27138 GIR_Done,
27139 // Label 2092: @70468
27140 GIM_Try, /*On fail goto*//*Label 2093*/ GIMT_Encode4(70495), // Rule ID 3171 //
27141 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
27142 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27143 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27144 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27145 // (smin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMINSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
27146 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMINSDrr),
27147 GIR_RootConstrainSelectedInstOperands,
27148 // GIR_Coverage, 3171,
27149 GIR_Done,
27150 // Label 2093: @70495
27151 GIM_Try, /*On fail goto*//*Label 2094*/ GIMT_Encode4(70522), // Rule ID 5512 //
27152 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27153 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27154 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27155 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27156 // (smin:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMINSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
27157 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSDZ128rr),
27158 GIR_RootConstrainSelectedInstOperands,
27159 // GIR_Coverage, 5512,
27160 GIR_Done,
27161 // Label 2094: @70522
27162 GIM_Reject,
27163 // Label 2091: @70523
27164 GIM_Reject,
27165 // Label 2077: @70524
27166 GIM_Try, /*On fail goto*//*Label 2095*/ GIMT_Encode4(70728),
27167 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
27168 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
27169 GIM_Try, /*On fail goto*//*Label 2096*/ GIMT_Encode4(70562), // Rule ID 5530 //
27170 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27171 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27172 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27173 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27174 // (smin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMINSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
27175 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSQZ256rr),
27176 GIR_RootConstrainSelectedInstOperands,
27177 // GIR_Coverage, 5530,
27178 GIR_Done,
27179 // Label 2096: @70562
27180 GIM_Try, /*On fail goto*//*Label 2097*/ GIMT_Encode4(70727), // Rule ID 18592 //
27181 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
27182 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27183 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27184 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27185 // (smin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMINSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
27186 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
27187 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
27188 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
27189 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
27190 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
27191 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27192 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27193 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
27194 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27195 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27196 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
27197 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
27198 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
27199 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27200 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27201 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
27202 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27203 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27204 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
27205 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27206 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27207 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
27208 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
27209 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
27210 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27211 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27212 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
27213 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMINSQZrr),
27214 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27215 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
27216 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
27217 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
27218 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
27219 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
27220 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
27221 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
27222 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27223 // GIR_Coverage, 18592,
27224 GIR_EraseRootFromParent_Done,
27225 // Label 2097: @70727
27226 GIM_Reject,
27227 // Label 2095: @70728
27228 GIM_Reject,
27229 // Label 2078: @70729
27230 GIM_Try, /*On fail goto*//*Label 2098*/ GIMT_Encode4(70822),
27231 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
27232 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
27233 GIM_Try, /*On fail goto*//*Label 2099*/ GIMT_Encode4(70767), // Rule ID 2590 //
27234 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
27235 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27236 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27237 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27238 // (smin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMINSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
27239 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSWrr),
27240 GIR_RootConstrainSelectedInstOperands,
27241 // GIR_Coverage, 2590,
27242 GIR_Done,
27243 // Label 2099: @70767
27244 GIM_Try, /*On fail goto*//*Label 2100*/ GIMT_Encode4(70794), // Rule ID 2592 //
27245 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
27246 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27247 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27248 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27249 // (smin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMINSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
27250 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMINSWrr),
27251 GIR_RootConstrainSelectedInstOperands,
27252 // GIR_Coverage, 2592,
27253 GIR_Done,
27254 // Label 2100: @70794
27255 GIM_Try, /*On fail goto*//*Label 2101*/ GIMT_Encode4(70821), // Rule ID 5488 //
27256 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27257 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27258 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27259 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27260 // (smin:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMINSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
27261 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSWZ128rr),
27262 GIR_RootConstrainSelectedInstOperands,
27263 // GIR_Coverage, 5488,
27264 GIR_Done,
27265 // Label 2101: @70821
27266 GIM_Reject,
27267 // Label 2098: @70822
27268 GIM_Reject,
27269 // Label 2079: @70823
27270 GIM_Try, /*On fail goto*//*Label 2102*/ GIMT_Encode4(70889),
27271 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
27272 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
27273 GIM_Try, /*On fail goto*//*Label 2103*/ GIMT_Encode4(70861), // Rule ID 3151 //
27274 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
27275 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27276 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27277 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27278 // (smin:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMINSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
27279 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSDYrr),
27280 GIR_RootConstrainSelectedInstOperands,
27281 // GIR_Coverage, 3151,
27282 GIR_Done,
27283 // Label 2103: @70861
27284 GIM_Try, /*On fail goto*//*Label 2104*/ GIMT_Encode4(70888), // Rule ID 5503 //
27285 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27286 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27287 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27288 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27289 // (smin:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMINSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
27290 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSDZ256rr),
27291 GIR_RootConstrainSelectedInstOperands,
27292 // GIR_Coverage, 5503,
27293 GIR_Done,
27294 // Label 2104: @70888
27295 GIM_Reject,
27296 // Label 2102: @70889
27297 GIM_Reject,
27298 // Label 2080: @70890
27299 GIM_Try, /*On fail goto*//*Label 2105*/ GIMT_Encode4(70923), // Rule ID 5521 //
27300 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
27301 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
27302 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
27303 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27304 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27305 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27306 // (smin:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMINSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
27307 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSQZrr),
27308 GIR_RootConstrainSelectedInstOperands,
27309 // GIR_Coverage, 5521,
27310 GIR_Done,
27311 // Label 2105: @70923
27312 GIM_Reject,
27313 // Label 2081: @70924
27314 GIM_Try, /*On fail goto*//*Label 2106*/ GIMT_Encode4(71017),
27315 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
27316 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
27317 GIM_Try, /*On fail goto*//*Label 2107*/ GIMT_Encode4(70962), // Rule ID 3143 //
27318 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
27319 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27320 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27321 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27322 // (smin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMINSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
27323 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSBrr),
27324 GIR_RootConstrainSelectedInstOperands,
27325 // GIR_Coverage, 3143,
27326 GIR_Done,
27327 // Label 2107: @70962
27328 GIM_Try, /*On fail goto*//*Label 2108*/ GIMT_Encode4(70989), // Rule ID 3169 //
27329 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
27330 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27331 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27332 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27333 // (smin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMINSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
27334 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMINSBrr),
27335 GIR_RootConstrainSelectedInstOperands,
27336 // GIR_Coverage, 3169,
27337 GIR_Done,
27338 // Label 2108: @70989
27339 GIM_Try, /*On fail goto*//*Label 2109*/ GIMT_Encode4(71016), // Rule ID 5470 //
27340 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27341 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27342 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27343 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27344 // (smin:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMINSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
27345 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSBZ128rr),
27346 GIR_RootConstrainSelectedInstOperands,
27347 // GIR_Coverage, 5470,
27348 GIR_Done,
27349 // Label 2109: @71016
27350 GIM_Reject,
27351 // Label 2106: @71017
27352 GIM_Reject,
27353 // Label 2082: @71018
27354 GIM_Try, /*On fail goto*//*Label 2110*/ GIMT_Encode4(71084),
27355 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
27356 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
27357 GIM_Try, /*On fail goto*//*Label 2111*/ GIMT_Encode4(71056), // Rule ID 2594 //
27358 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
27359 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27360 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27361 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27362 // (smin:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMINSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
27363 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSWYrr),
27364 GIR_RootConstrainSelectedInstOperands,
27365 // GIR_Coverage, 2594,
27366 GIR_Done,
27367 // Label 2111: @71056
27368 GIM_Try, /*On fail goto*//*Label 2112*/ GIMT_Encode4(71083), // Rule ID 5482 //
27369 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27370 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27371 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27372 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27373 // (smin:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMINSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
27374 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSWZ256rr),
27375 GIR_RootConstrainSelectedInstOperands,
27376 // GIR_Coverage, 5482,
27377 GIR_Done,
27378 // Label 2112: @71083
27379 GIM_Reject,
27380 // Label 2110: @71084
27381 GIM_Reject,
27382 // Label 2083: @71085
27383 GIM_Try, /*On fail goto*//*Label 2113*/ GIMT_Encode4(71118), // Rule ID 5494 //
27384 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
27385 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
27386 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
27387 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27388 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27389 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27390 // (smin:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMINSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
27391 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSDZrr),
27392 GIR_RootConstrainSelectedInstOperands,
27393 // GIR_Coverage, 5494,
27394 GIR_Done,
27395 // Label 2113: @71118
27396 GIM_Reject,
27397 // Label 2084: @71119
27398 GIM_Try, /*On fail goto*//*Label 2114*/ GIMT_Encode4(71185),
27399 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
27400 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
27401 GIM_Try, /*On fail goto*//*Label 2115*/ GIMT_Encode4(71157), // Rule ID 3161 //
27402 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
27403 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27404 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27405 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27406 // (smin:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMINSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
27407 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSBYrr),
27408 GIR_RootConstrainSelectedInstOperands,
27409 // GIR_Coverage, 3161,
27410 GIR_Done,
27411 // Label 2115: @71157
27412 GIM_Try, /*On fail goto*//*Label 2116*/ GIMT_Encode4(71184), // Rule ID 5464 //
27413 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27414 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27415 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27416 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27417 // (smin:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMINSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
27418 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSBZ256rr),
27419 GIR_RootConstrainSelectedInstOperands,
27420 // GIR_Coverage, 5464,
27421 GIR_Done,
27422 // Label 2116: @71184
27423 GIM_Reject,
27424 // Label 2114: @71185
27425 GIM_Reject,
27426 // Label 2085: @71186
27427 GIM_Try, /*On fail goto*//*Label 2117*/ GIMT_Encode4(71219), // Rule ID 5476 //
27428 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
27429 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
27430 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
27431 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27432 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27433 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27434 // (smin:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMINSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
27435 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSWZrr),
27436 GIR_RootConstrainSelectedInstOperands,
27437 // GIR_Coverage, 5476,
27438 GIR_Done,
27439 // Label 2117: @71219
27440 GIM_Reject,
27441 // Label 2086: @71220
27442 GIM_Try, /*On fail goto*//*Label 2118*/ GIMT_Encode4(71253), // Rule ID 5458 //
27443 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
27444 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
27445 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
27446 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27447 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27448 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27449 // (smin:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMINSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
27450 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINSBZrr),
27451 GIR_RootConstrainSelectedInstOperands,
27452 // GIR_Coverage, 5458,
27453 GIR_Done,
27454 // Label 2118: @71253
27455 GIM_Reject,
27456 // Label 2087: @71254
27457 GIM_Reject,
27458 // Label 47: @71255
27459 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(25), /*)*//*default:*//*Label 2131*/ GIMT_Encode4(72363),
27460 /*GILLT_v2s64*//*Label 2119*/ GIMT_Encode4(71334), GIMT_Encode4(0),
27461 /*GILLT_v4s32*//*Label 2120*/ GIMT_Encode4(71539),
27462 /*GILLT_v4s64*//*Label 2121*/ GIMT_Encode4(71633), GIMT_Encode4(0),
27463 /*GILLT_v8s16*//*Label 2122*/ GIMT_Encode4(71838),
27464 /*GILLT_v8s32*//*Label 2123*/ GIMT_Encode4(71932),
27465 /*GILLT_v8s64*//*Label 2124*/ GIMT_Encode4(71999), GIMT_Encode4(0),
27466 /*GILLT_v16s8*//*Label 2125*/ GIMT_Encode4(72033),
27467 /*GILLT_v16s16*//*Label 2126*/ GIMT_Encode4(72127),
27468 /*GILLT_v16s32*//*Label 2127*/ GIMT_Encode4(72194), GIMT_Encode4(0),
27469 /*GILLT_v32s8*//*Label 2128*/ GIMT_Encode4(72228),
27470 /*GILLT_v32s16*//*Label 2129*/ GIMT_Encode4(72295), GIMT_Encode4(0),
27471 /*GILLT_v64s8*//*Label 2130*/ GIMT_Encode4(72329),
27472 // Label 2119: @71334
27473 GIM_Try, /*On fail goto*//*Label 2132*/ GIMT_Encode4(71538),
27474 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
27475 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
27476 GIM_Try, /*On fail goto*//*Label 2133*/ GIMT_Encode4(71372), // Rule ID 5359 //
27477 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27478 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27479 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27480 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27481 // (smax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMAXSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
27482 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSQZ128rr),
27483 GIR_RootConstrainSelectedInstOperands,
27484 // GIR_Coverage, 5359,
27485 GIR_Done,
27486 // Label 2133: @71372
27487 GIM_Try, /*On fail goto*//*Label 2134*/ GIMT_Encode4(71537), // Rule ID 18590 //
27488 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
27489 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27490 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27491 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27492 // (smax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMAXSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
27493 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
27494 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
27495 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
27496 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
27497 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
27498 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27499 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27500 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
27501 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27502 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27503 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
27504 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
27505 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
27506 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27507 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27508 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
27509 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27510 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27511 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
27512 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27513 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27514 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
27515 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
27516 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
27517 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27518 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27519 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
27520 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMAXSQZrr),
27521 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27522 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
27523 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
27524 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
27525 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
27526 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
27527 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
27528 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
27529 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27530 // GIR_Coverage, 18590,
27531 GIR_EraseRootFromParent_Done,
27532 // Label 2134: @71537
27533 GIM_Reject,
27534 // Label 2132: @71538
27535 GIM_Reject,
27536 // Label 2120: @71539
27537 GIM_Try, /*On fail goto*//*Label 2135*/ GIMT_Encode4(71632),
27538 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
27539 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
27540 GIM_Try, /*On fail goto*//*Label 2136*/ GIMT_Encode4(71577), // Rule ID 3137 //
27541 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
27542 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27543 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27544 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27545 // (smax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMAXSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
27546 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSDrr),
27547 GIR_RootConstrainSelectedInstOperands,
27548 // GIR_Coverage, 3137,
27549 GIR_Done,
27550 // Label 2136: @71577
27551 GIM_Try, /*On fail goto*//*Label 2137*/ GIMT_Encode4(71604), // Rule ID 3179 //
27552 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
27553 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27554 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27555 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27556 // (smax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMAXSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
27557 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMAXSDrr),
27558 GIR_RootConstrainSelectedInstOperands,
27559 // GIR_Coverage, 3179,
27560 GIR_Done,
27561 // Label 2137: @71604
27562 GIM_Try, /*On fail goto*//*Label 2138*/ GIMT_Encode4(71631), // Rule ID 5332 //
27563 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27564 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27565 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27566 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27567 // (smax:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMAXSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
27568 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSDZ128rr),
27569 GIR_RootConstrainSelectedInstOperands,
27570 // GIR_Coverage, 5332,
27571 GIR_Done,
27572 // Label 2138: @71631
27573 GIM_Reject,
27574 // Label 2135: @71632
27575 GIM_Reject,
27576 // Label 2121: @71633
27577 GIM_Try, /*On fail goto*//*Label 2139*/ GIMT_Encode4(71837),
27578 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
27579 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
27580 GIM_Try, /*On fail goto*//*Label 2140*/ GIMT_Encode4(71671), // Rule ID 5350 //
27581 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27582 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27583 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27584 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27585 // (smax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMAXSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
27586 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSQZ256rr),
27587 GIR_RootConstrainSelectedInstOperands,
27588 // GIR_Coverage, 5350,
27589 GIR_Done,
27590 // Label 2140: @71671
27591 GIM_Try, /*On fail goto*//*Label 2141*/ GIMT_Encode4(71836), // Rule ID 18588 //
27592 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
27593 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27594 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27595 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27596 // (smax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMAXSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
27597 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
27598 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
27599 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
27600 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
27601 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
27602 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27603 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27604 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
27605 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27606 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27607 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
27608 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
27609 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
27610 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27611 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27612 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
27613 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27614 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27615 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
27616 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27617 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27618 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
27619 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
27620 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
27621 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27622 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27623 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
27624 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMAXSQZrr),
27625 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27626 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
27627 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
27628 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
27629 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
27630 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
27631 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
27632 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
27633 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27634 // GIR_Coverage, 18588,
27635 GIR_EraseRootFromParent_Done,
27636 // Label 2141: @71836
27637 GIM_Reject,
27638 // Label 2139: @71837
27639 GIM_Reject,
27640 // Label 2122: @71838
27641 GIM_Try, /*On fail goto*//*Label 2142*/ GIMT_Encode4(71931),
27642 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
27643 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
27644 GIM_Try, /*On fail goto*//*Label 2143*/ GIMT_Encode4(71876), // Rule ID 2602 //
27645 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
27646 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27647 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27648 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27649 // (smax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMAXSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
27650 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSWrr),
27651 GIR_RootConstrainSelectedInstOperands,
27652 // GIR_Coverage, 2602,
27653 GIR_Done,
27654 // Label 2143: @71876
27655 GIM_Try, /*On fail goto*//*Label 2144*/ GIMT_Encode4(71903), // Rule ID 2604 //
27656 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
27657 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27658 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27659 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27660 // (smax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMAXSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
27661 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMAXSWrr),
27662 GIR_RootConstrainSelectedInstOperands,
27663 // GIR_Coverage, 2604,
27664 GIR_Done,
27665 // Label 2144: @71903
27666 GIM_Try, /*On fail goto*//*Label 2145*/ GIMT_Encode4(71930), // Rule ID 5308 //
27667 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27668 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27669 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27670 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27671 // (smax:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMAXSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
27672 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSWZ128rr),
27673 GIR_RootConstrainSelectedInstOperands,
27674 // GIR_Coverage, 5308,
27675 GIR_Done,
27676 // Label 2145: @71930
27677 GIM_Reject,
27678 // Label 2142: @71931
27679 GIM_Reject,
27680 // Label 2123: @71932
27681 GIM_Try, /*On fail goto*//*Label 2146*/ GIMT_Encode4(71998),
27682 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
27683 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
27684 GIM_Try, /*On fail goto*//*Label 2147*/ GIMT_Encode4(71970), // Rule ID 3155 //
27685 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
27686 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27687 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27688 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27689 // (smax:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMAXSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
27690 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSDYrr),
27691 GIR_RootConstrainSelectedInstOperands,
27692 // GIR_Coverage, 3155,
27693 GIR_Done,
27694 // Label 2147: @71970
27695 GIM_Try, /*On fail goto*//*Label 2148*/ GIMT_Encode4(71997), // Rule ID 5323 //
27696 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27697 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27698 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27699 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27700 // (smax:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMAXSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
27701 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSDZ256rr),
27702 GIR_RootConstrainSelectedInstOperands,
27703 // GIR_Coverage, 5323,
27704 GIR_Done,
27705 // Label 2148: @71997
27706 GIM_Reject,
27707 // Label 2146: @71998
27708 GIM_Reject,
27709 // Label 2124: @71999
27710 GIM_Try, /*On fail goto*//*Label 2149*/ GIMT_Encode4(72032), // Rule ID 5341 //
27711 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
27712 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
27713 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
27714 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27715 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27716 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27717 // (smax:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMAXSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
27718 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSQZrr),
27719 GIR_RootConstrainSelectedInstOperands,
27720 // GIR_Coverage, 5341,
27721 GIR_Done,
27722 // Label 2149: @72032
27723 GIM_Reject,
27724 // Label 2125: @72033
27725 GIM_Try, /*On fail goto*//*Label 2150*/ GIMT_Encode4(72126),
27726 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
27727 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
27728 GIM_Try, /*On fail goto*//*Label 2151*/ GIMT_Encode4(72071), // Rule ID 3147 //
27729 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
27730 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27731 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27732 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27733 // (smax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMAXSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
27734 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSBrr),
27735 GIR_RootConstrainSelectedInstOperands,
27736 // GIR_Coverage, 3147,
27737 GIR_Done,
27738 // Label 2151: @72071
27739 GIM_Try, /*On fail goto*//*Label 2152*/ GIMT_Encode4(72098), // Rule ID 3177 //
27740 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
27741 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27742 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27743 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27744 // (smax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMAXSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
27745 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMAXSBrr),
27746 GIR_RootConstrainSelectedInstOperands,
27747 // GIR_Coverage, 3177,
27748 GIR_Done,
27749 // Label 2152: @72098
27750 GIM_Try, /*On fail goto*//*Label 2153*/ GIMT_Encode4(72125), // Rule ID 5290 //
27751 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27752 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27753 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27754 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27755 // (smax:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMAXSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
27756 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSBZ128rr),
27757 GIR_RootConstrainSelectedInstOperands,
27758 // GIR_Coverage, 5290,
27759 GIR_Done,
27760 // Label 2153: @72125
27761 GIM_Reject,
27762 // Label 2150: @72126
27763 GIM_Reject,
27764 // Label 2126: @72127
27765 GIM_Try, /*On fail goto*//*Label 2154*/ GIMT_Encode4(72193),
27766 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
27767 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
27768 GIM_Try, /*On fail goto*//*Label 2155*/ GIMT_Encode4(72165), // Rule ID 2606 //
27769 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
27770 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27771 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27772 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27773 // (smax:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMAXSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
27774 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSWYrr),
27775 GIR_RootConstrainSelectedInstOperands,
27776 // GIR_Coverage, 2606,
27777 GIR_Done,
27778 // Label 2155: @72165
27779 GIM_Try, /*On fail goto*//*Label 2156*/ GIMT_Encode4(72192), // Rule ID 5302 //
27780 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27781 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27782 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27783 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27784 // (smax:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMAXSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
27785 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSWZ256rr),
27786 GIR_RootConstrainSelectedInstOperands,
27787 // GIR_Coverage, 5302,
27788 GIR_Done,
27789 // Label 2156: @72192
27790 GIM_Reject,
27791 // Label 2154: @72193
27792 GIM_Reject,
27793 // Label 2127: @72194
27794 GIM_Try, /*On fail goto*//*Label 2157*/ GIMT_Encode4(72227), // Rule ID 5314 //
27795 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
27796 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
27797 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
27798 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27799 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27800 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27801 // (smax:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMAXSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
27802 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSDZrr),
27803 GIR_RootConstrainSelectedInstOperands,
27804 // GIR_Coverage, 5314,
27805 GIR_Done,
27806 // Label 2157: @72227
27807 GIM_Reject,
27808 // Label 2128: @72228
27809 GIM_Try, /*On fail goto*//*Label 2158*/ GIMT_Encode4(72294),
27810 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
27811 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
27812 GIM_Try, /*On fail goto*//*Label 2159*/ GIMT_Encode4(72266), // Rule ID 3165 //
27813 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
27814 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27815 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27816 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
27817 // (smax:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMAXSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
27818 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSBYrr),
27819 GIR_RootConstrainSelectedInstOperands,
27820 // GIR_Coverage, 3165,
27821 GIR_Done,
27822 // Label 2159: @72266
27823 GIM_Try, /*On fail goto*//*Label 2160*/ GIMT_Encode4(72293), // Rule ID 5284 //
27824 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
27825 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27826 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27827 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27828 // (smax:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMAXSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
27829 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSBZ256rr),
27830 GIR_RootConstrainSelectedInstOperands,
27831 // GIR_Coverage, 5284,
27832 GIR_Done,
27833 // Label 2160: @72293
27834 GIM_Reject,
27835 // Label 2158: @72294
27836 GIM_Reject,
27837 // Label 2129: @72295
27838 GIM_Try, /*On fail goto*//*Label 2161*/ GIMT_Encode4(72328), // Rule ID 5296 //
27839 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
27840 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
27841 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
27842 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27843 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27844 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27845 // (smax:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMAXSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
27846 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSWZrr),
27847 GIR_RootConstrainSelectedInstOperands,
27848 // GIR_Coverage, 5296,
27849 GIR_Done,
27850 // Label 2161: @72328
27851 GIM_Reject,
27852 // Label 2130: @72329
27853 GIM_Try, /*On fail goto*//*Label 2162*/ GIMT_Encode4(72362), // Rule ID 5278 //
27854 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
27855 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
27856 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
27857 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27858 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27859 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27860 // (smax:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMAXSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
27861 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXSBZrr),
27862 GIR_RootConstrainSelectedInstOperands,
27863 // GIR_Coverage, 5278,
27864 GIR_Done,
27865 // Label 2162: @72362
27866 GIM_Reject,
27867 // Label 2131: @72363
27868 GIM_Reject,
27869 // Label 48: @72364
27870 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(25), /*)*//*default:*//*Label 2175*/ GIMT_Encode4(73472),
27871 /*GILLT_v2s64*//*Label 2163*/ GIMT_Encode4(72443), GIMT_Encode4(0),
27872 /*GILLT_v4s32*//*Label 2164*/ GIMT_Encode4(72648),
27873 /*GILLT_v4s64*//*Label 2165*/ GIMT_Encode4(72742), GIMT_Encode4(0),
27874 /*GILLT_v8s16*//*Label 2166*/ GIMT_Encode4(72947),
27875 /*GILLT_v8s32*//*Label 2167*/ GIMT_Encode4(73041),
27876 /*GILLT_v8s64*//*Label 2168*/ GIMT_Encode4(73108), GIMT_Encode4(0),
27877 /*GILLT_v16s8*//*Label 2169*/ GIMT_Encode4(73142),
27878 /*GILLT_v16s16*//*Label 2170*/ GIMT_Encode4(73236),
27879 /*GILLT_v16s32*//*Label 2171*/ GIMT_Encode4(73303), GIMT_Encode4(0),
27880 /*GILLT_v32s8*//*Label 2172*/ GIMT_Encode4(73337),
27881 /*GILLT_v32s16*//*Label 2173*/ GIMT_Encode4(73404), GIMT_Encode4(0),
27882 /*GILLT_v64s8*//*Label 2174*/ GIMT_Encode4(73438),
27883 // Label 2163: @72443
27884 GIM_Try, /*On fail goto*//*Label 2176*/ GIMT_Encode4(72647),
27885 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
27886 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
27887 GIM_Try, /*On fail goto*//*Label 2177*/ GIMT_Encode4(72481), // Rule ID 5629 //
27888 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27889 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27890 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27891 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27892 // (umin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMINUQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
27893 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUQZ128rr),
27894 GIR_RootConstrainSelectedInstOperands,
27895 // GIR_Coverage, 5629,
27896 GIR_Done,
27897 // Label 2177: @72481
27898 GIM_Try, /*On fail goto*//*Label 2178*/ GIMT_Encode4(72646), // Rule ID 18586 //
27899 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
27900 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
27901 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27902 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27903 // (umin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMINUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
27904 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
27905 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
27906 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
27907 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
27908 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
27909 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27910 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27911 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
27912 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27913 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27914 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
27915 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
27916 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
27917 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27918 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27919 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
27920 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
27921 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27922 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
27923 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
27924 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27925 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
27926 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
27927 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
27928 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
27929 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27930 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
27931 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMINUQZrr),
27932 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
27933 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
27934 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
27935 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
27936 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
27937 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
27938 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
27939 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
27940 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
27941 // GIR_Coverage, 18586,
27942 GIR_EraseRootFromParent_Done,
27943 // Label 2178: @72646
27944 GIM_Reject,
27945 // Label 2176: @72647
27946 GIM_Reject,
27947 // Label 2164: @72648
27948 GIM_Try, /*On fail goto*//*Label 2179*/ GIMT_Encode4(72741),
27949 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
27950 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
27951 GIM_Try, /*On fail goto*//*Label 2180*/ GIMT_Encode4(72686), // Rule ID 3135 //
27952 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
27953 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27954 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27955 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27956 // (umin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMINUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
27957 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUDrr),
27958 GIR_RootConstrainSelectedInstOperands,
27959 // GIR_Coverage, 3135,
27960 GIR_Done,
27961 // Label 2180: @72686
27962 GIM_Try, /*On fail goto*//*Label 2181*/ GIMT_Encode4(72713), // Rule ID 3173 //
27963 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
27964 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27965 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27966 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
27967 // (umin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMINUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
27968 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMINUDrr),
27969 GIR_RootConstrainSelectedInstOperands,
27970 // GIR_Coverage, 3173,
27971 GIR_Done,
27972 // Label 2181: @72713
27973 GIM_Try, /*On fail goto*//*Label 2182*/ GIMT_Encode4(72740), // Rule ID 5602 //
27974 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27975 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27976 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27977 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
27978 // (umin:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMINUDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
27979 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUDZ128rr),
27980 GIR_RootConstrainSelectedInstOperands,
27981 // GIR_Coverage, 5602,
27982 GIR_Done,
27983 // Label 2182: @72740
27984 GIM_Reject,
27985 // Label 2179: @72741
27986 GIM_Reject,
27987 // Label 2165: @72742
27988 GIM_Try, /*On fail goto*//*Label 2183*/ GIMT_Encode4(72946),
27989 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
27990 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
27991 GIM_Try, /*On fail goto*//*Label 2184*/ GIMT_Encode4(72780), // Rule ID 5620 //
27992 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
27993 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27994 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27995 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
27996 // (umin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMINUQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
27997 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUQZ256rr),
27998 GIR_RootConstrainSelectedInstOperands,
27999 // GIR_Coverage, 5620,
28000 GIR_Done,
28001 // Label 2184: @72780
28002 GIM_Try, /*On fail goto*//*Label 2185*/ GIMT_Encode4(72945), // Rule ID 18584 //
28003 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
28004 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28005 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28006 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28007 // (umin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMINUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
28008 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
28009 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
28010 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
28011 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
28012 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
28013 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28014 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28015 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
28016 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28017 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28018 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
28019 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
28020 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
28021 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28022 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28023 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
28024 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28025 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28026 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
28027 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28028 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28029 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
28030 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
28031 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
28032 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28033 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28034 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
28035 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMINUQZrr),
28036 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28037 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
28038 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
28039 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
28040 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
28041 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
28042 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
28043 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
28044 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28045 // GIR_Coverage, 18584,
28046 GIR_EraseRootFromParent_Done,
28047 // Label 2185: @72945
28048 GIM_Reject,
28049 // Label 2183: @72946
28050 GIM_Reject,
28051 // Label 2166: @72947
28052 GIM_Try, /*On fail goto*//*Label 2186*/ GIMT_Encode4(73040),
28053 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
28054 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
28055 GIM_Try, /*On fail goto*//*Label 2187*/ GIMT_Encode4(72985), // Rule ID 3145 //
28056 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
28057 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28058 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28059 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28060 // (umin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMINUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
28061 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUWrr),
28062 GIR_RootConstrainSelectedInstOperands,
28063 // GIR_Coverage, 3145,
28064 GIR_Done,
28065 // Label 2187: @72985
28066 GIM_Try, /*On fail goto*//*Label 2188*/ GIMT_Encode4(73012), // Rule ID 3175 //
28067 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
28068 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28069 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28070 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28071 // (umin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMINUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
28072 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMINUWrr),
28073 GIR_RootConstrainSelectedInstOperands,
28074 // GIR_Coverage, 3175,
28075 GIR_Done,
28076 // Label 2188: @73012
28077 GIM_Try, /*On fail goto*//*Label 2189*/ GIMT_Encode4(73039), // Rule ID 5578 //
28078 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28079 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28080 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28081 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28082 // (umin:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMINUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
28083 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUWZ128rr),
28084 GIR_RootConstrainSelectedInstOperands,
28085 // GIR_Coverage, 5578,
28086 GIR_Done,
28087 // Label 2189: @73039
28088 GIM_Reject,
28089 // Label 2186: @73040
28090 GIM_Reject,
28091 // Label 2167: @73041
28092 GIM_Try, /*On fail goto*//*Label 2190*/ GIMT_Encode4(73107),
28093 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
28094 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
28095 GIM_Try, /*On fail goto*//*Label 2191*/ GIMT_Encode4(73079), // Rule ID 3153 //
28096 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
28097 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28098 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28099 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28100 // (umin:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMINUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
28101 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUDYrr),
28102 GIR_RootConstrainSelectedInstOperands,
28103 // GIR_Coverage, 3153,
28104 GIR_Done,
28105 // Label 2191: @73079
28106 GIM_Try, /*On fail goto*//*Label 2192*/ GIMT_Encode4(73106), // Rule ID 5593 //
28107 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28108 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28109 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28110 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28111 // (umin:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMINUDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
28112 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUDZ256rr),
28113 GIR_RootConstrainSelectedInstOperands,
28114 // GIR_Coverage, 5593,
28115 GIR_Done,
28116 // Label 2192: @73106
28117 GIM_Reject,
28118 // Label 2190: @73107
28119 GIM_Reject,
28120 // Label 2168: @73108
28121 GIM_Try, /*On fail goto*//*Label 2193*/ GIMT_Encode4(73141), // Rule ID 5611 //
28122 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
28123 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
28124 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
28125 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28126 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28127 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28128 // (umin:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMINUQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
28129 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUQZrr),
28130 GIR_RootConstrainSelectedInstOperands,
28131 // GIR_Coverage, 5611,
28132 GIR_Done,
28133 // Label 2193: @73141
28134 GIM_Reject,
28135 // Label 2169: @73142
28136 GIM_Try, /*On fail goto*//*Label 2194*/ GIMT_Encode4(73235),
28137 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
28138 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
28139 GIM_Try, /*On fail goto*//*Label 2195*/ GIMT_Encode4(73180), // Rule ID 2584 //
28140 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
28141 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28142 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28143 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28144 // (umin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMINUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
28145 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUBrr),
28146 GIR_RootConstrainSelectedInstOperands,
28147 // GIR_Coverage, 2584,
28148 GIR_Done,
28149 // Label 2195: @73180
28150 GIM_Try, /*On fail goto*//*Label 2196*/ GIMT_Encode4(73207), // Rule ID 2586 //
28151 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
28152 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28153 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28154 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28155 // (umin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMINUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
28156 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMINUBrr),
28157 GIR_RootConstrainSelectedInstOperands,
28158 // GIR_Coverage, 2586,
28159 GIR_Done,
28160 // Label 2196: @73207
28161 GIM_Try, /*On fail goto*//*Label 2197*/ GIMT_Encode4(73234), // Rule ID 5560 //
28162 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28163 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28164 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28165 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28166 // (umin:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMINUBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
28167 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUBZ128rr),
28168 GIR_RootConstrainSelectedInstOperands,
28169 // GIR_Coverage, 5560,
28170 GIR_Done,
28171 // Label 2197: @73234
28172 GIM_Reject,
28173 // Label 2194: @73235
28174 GIM_Reject,
28175 // Label 2170: @73236
28176 GIM_Try, /*On fail goto*//*Label 2198*/ GIMT_Encode4(73302),
28177 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
28178 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
28179 GIM_Try, /*On fail goto*//*Label 2199*/ GIMT_Encode4(73274), // Rule ID 3163 //
28180 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
28181 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28182 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28183 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28184 // (umin:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMINUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
28185 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUWYrr),
28186 GIR_RootConstrainSelectedInstOperands,
28187 // GIR_Coverage, 3163,
28188 GIR_Done,
28189 // Label 2199: @73274
28190 GIM_Try, /*On fail goto*//*Label 2200*/ GIMT_Encode4(73301), // Rule ID 5572 //
28191 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28192 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28193 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28194 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28195 // (umin:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMINUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
28196 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUWZ256rr),
28197 GIR_RootConstrainSelectedInstOperands,
28198 // GIR_Coverage, 5572,
28199 GIR_Done,
28200 // Label 2200: @73301
28201 GIM_Reject,
28202 // Label 2198: @73302
28203 GIM_Reject,
28204 // Label 2171: @73303
28205 GIM_Try, /*On fail goto*//*Label 2201*/ GIMT_Encode4(73336), // Rule ID 5584 //
28206 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
28207 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
28208 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
28209 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28210 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28211 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28212 // (umin:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMINUDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
28213 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUDZrr),
28214 GIR_RootConstrainSelectedInstOperands,
28215 // GIR_Coverage, 5584,
28216 GIR_Done,
28217 // Label 2201: @73336
28218 GIM_Reject,
28219 // Label 2172: @73337
28220 GIM_Try, /*On fail goto*//*Label 2202*/ GIMT_Encode4(73403),
28221 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
28222 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
28223 GIM_Try, /*On fail goto*//*Label 2203*/ GIMT_Encode4(73375), // Rule ID 2588 //
28224 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
28225 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28226 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28227 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28228 // (umin:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMINUBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
28229 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUBYrr),
28230 GIR_RootConstrainSelectedInstOperands,
28231 // GIR_Coverage, 2588,
28232 GIR_Done,
28233 // Label 2203: @73375
28234 GIM_Try, /*On fail goto*//*Label 2204*/ GIMT_Encode4(73402), // Rule ID 5554 //
28235 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28236 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28237 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28238 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28239 // (umin:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMINUBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
28240 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUBZ256rr),
28241 GIR_RootConstrainSelectedInstOperands,
28242 // GIR_Coverage, 5554,
28243 GIR_Done,
28244 // Label 2204: @73402
28245 GIM_Reject,
28246 // Label 2202: @73403
28247 GIM_Reject,
28248 // Label 2173: @73404
28249 GIM_Try, /*On fail goto*//*Label 2205*/ GIMT_Encode4(73437), // Rule ID 5566 //
28250 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
28251 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
28252 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
28253 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28254 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28255 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28256 // (umin:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMINUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
28257 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUWZrr),
28258 GIR_RootConstrainSelectedInstOperands,
28259 // GIR_Coverage, 5566,
28260 GIR_Done,
28261 // Label 2205: @73437
28262 GIM_Reject,
28263 // Label 2174: @73438
28264 GIM_Try, /*On fail goto*//*Label 2206*/ GIMT_Encode4(73471), // Rule ID 5548 //
28265 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
28266 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
28267 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
28268 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28269 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28270 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28271 // (umin:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMINUBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
28272 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMINUBZrr),
28273 GIR_RootConstrainSelectedInstOperands,
28274 // GIR_Coverage, 5548,
28275 GIR_Done,
28276 // Label 2206: @73471
28277 GIM_Reject,
28278 // Label 2175: @73472
28279 GIM_Reject,
28280 // Label 49: @73473
28281 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(25), /*)*//*default:*//*Label 2219*/ GIMT_Encode4(74581),
28282 /*GILLT_v2s64*//*Label 2207*/ GIMT_Encode4(73552), GIMT_Encode4(0),
28283 /*GILLT_v4s32*//*Label 2208*/ GIMT_Encode4(73757),
28284 /*GILLT_v4s64*//*Label 2209*/ GIMT_Encode4(73851), GIMT_Encode4(0),
28285 /*GILLT_v8s16*//*Label 2210*/ GIMT_Encode4(74056),
28286 /*GILLT_v8s32*//*Label 2211*/ GIMT_Encode4(74150),
28287 /*GILLT_v8s64*//*Label 2212*/ GIMT_Encode4(74217), GIMT_Encode4(0),
28288 /*GILLT_v16s8*//*Label 2213*/ GIMT_Encode4(74251),
28289 /*GILLT_v16s16*//*Label 2214*/ GIMT_Encode4(74345),
28290 /*GILLT_v16s32*//*Label 2215*/ GIMT_Encode4(74412), GIMT_Encode4(0),
28291 /*GILLT_v32s8*//*Label 2216*/ GIMT_Encode4(74446),
28292 /*GILLT_v32s16*//*Label 2217*/ GIMT_Encode4(74513), GIMT_Encode4(0),
28293 /*GILLT_v64s8*//*Label 2218*/ GIMT_Encode4(74547),
28294 // Label 2207: @73552
28295 GIM_Try, /*On fail goto*//*Label 2220*/ GIMT_Encode4(73756),
28296 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
28297 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
28298 GIM_Try, /*On fail goto*//*Label 2221*/ GIMT_Encode4(73590), // Rule ID 5449 //
28299 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28300 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28301 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28302 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28303 // (umax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMAXUQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
28304 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUQZ128rr),
28305 GIR_RootConstrainSelectedInstOperands,
28306 // GIR_Coverage, 5449,
28307 GIR_Done,
28308 // Label 2221: @73590
28309 GIM_Try, /*On fail goto*//*Label 2222*/ GIMT_Encode4(73755), // Rule ID 18582 //
28310 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
28311 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28312 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28313 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28314 // (umax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMAXUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
28315 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
28316 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
28317 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
28318 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
28319 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
28320 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28321 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28322 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
28323 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28324 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28325 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
28326 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
28327 GIR_AddImm8, /*InsnID*/4, /*Imm*/9,
28328 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28329 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28330 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
28331 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28332 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28333 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
28334 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28335 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28336 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
28337 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
28338 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
28339 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28340 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28341 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
28342 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMAXUQZrr),
28343 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28344 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
28345 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
28346 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
28347 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
28348 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
28349 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
28350 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
28351 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28352 // GIR_Coverage, 18582,
28353 GIR_EraseRootFromParent_Done,
28354 // Label 2222: @73755
28355 GIM_Reject,
28356 // Label 2220: @73756
28357 GIM_Reject,
28358 // Label 2208: @73757
28359 GIM_Try, /*On fail goto*//*Label 2223*/ GIMT_Encode4(73850),
28360 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
28361 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
28362 GIM_Try, /*On fail goto*//*Label 2224*/ GIMT_Encode4(73795), // Rule ID 3139 //
28363 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
28364 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28365 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28366 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28367 // (umax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMAXUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
28368 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUDrr),
28369 GIR_RootConstrainSelectedInstOperands,
28370 // GIR_Coverage, 3139,
28371 GIR_Done,
28372 // Label 2224: @73795
28373 GIM_Try, /*On fail goto*//*Label 2225*/ GIMT_Encode4(73822), // Rule ID 3181 //
28374 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
28375 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28376 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28377 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28378 // (umax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMAXUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
28379 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMAXUDrr),
28380 GIR_RootConstrainSelectedInstOperands,
28381 // GIR_Coverage, 3181,
28382 GIR_Done,
28383 // Label 2225: @73822
28384 GIM_Try, /*On fail goto*//*Label 2226*/ GIMT_Encode4(73849), // Rule ID 5422 //
28385 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28386 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28387 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28388 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28389 // (umax:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMAXUDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
28390 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUDZ128rr),
28391 GIR_RootConstrainSelectedInstOperands,
28392 // GIR_Coverage, 5422,
28393 GIR_Done,
28394 // Label 2226: @73849
28395 GIM_Reject,
28396 // Label 2223: @73850
28397 GIM_Reject,
28398 // Label 2209: @73851
28399 GIM_Try, /*On fail goto*//*Label 2227*/ GIMT_Encode4(74055),
28400 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
28401 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
28402 GIM_Try, /*On fail goto*//*Label 2228*/ GIMT_Encode4(73889), // Rule ID 5440 //
28403 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28404 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28405 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28406 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28407 // (umax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMAXUQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
28408 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUQZ256rr),
28409 GIR_RootConstrainSelectedInstOperands,
28410 // GIR_Coverage, 5440,
28411 GIR_Done,
28412 // Label 2228: @73889
28413 GIM_Try, /*On fail goto*//*Label 2229*/ GIMT_Encode4(74054), // Rule ID 18580 //
28414 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
28415 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28416 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28417 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28418 // (umax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMAXUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
28419 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
28420 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
28421 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
28422 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64,
28423 GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64,
28424 GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28425 GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28426 GIR_ConstrainSelectedInstOperands, /*InsnID*/5,
28427 GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28428 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28429 GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4,
28430 GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2
28431 GIR_AddImm8, /*InsnID*/4, /*Imm*/10,
28432 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28433 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28434 GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
28435 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28436 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28437 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
28438 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28439 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28440 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
28441 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
28442 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
28443 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28444 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28445 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
28446 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMAXUQZrr),
28447 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28448 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
28449 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3,
28450 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
28451 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
28452 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
28453 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
28454 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
28455 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28456 // GIR_Coverage, 18580,
28457 GIR_EraseRootFromParent_Done,
28458 // Label 2229: @74054
28459 GIM_Reject,
28460 // Label 2227: @74055
28461 GIM_Reject,
28462 // Label 2210: @74056
28463 GIM_Try, /*On fail goto*//*Label 2230*/ GIMT_Encode4(74149),
28464 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
28465 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
28466 GIM_Try, /*On fail goto*//*Label 2231*/ GIMT_Encode4(74094), // Rule ID 3149 //
28467 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
28468 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28469 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28470 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28471 // (umax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMAXUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
28472 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUWrr),
28473 GIR_RootConstrainSelectedInstOperands,
28474 // GIR_Coverage, 3149,
28475 GIR_Done,
28476 // Label 2231: @74094
28477 GIM_Try, /*On fail goto*//*Label 2232*/ GIMT_Encode4(74121), // Rule ID 3183 //
28478 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41),
28479 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28480 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28481 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28482 // (umax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMAXUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
28483 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMAXUWrr),
28484 GIR_RootConstrainSelectedInstOperands,
28485 // GIR_Coverage, 3183,
28486 GIR_Done,
28487 // Label 2232: @74121
28488 GIM_Try, /*On fail goto*//*Label 2233*/ GIMT_Encode4(74148), // Rule ID 5398 //
28489 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28490 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28491 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28492 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28493 // (umax:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMAXUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
28494 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUWZ128rr),
28495 GIR_RootConstrainSelectedInstOperands,
28496 // GIR_Coverage, 5398,
28497 GIR_Done,
28498 // Label 2233: @74148
28499 GIM_Reject,
28500 // Label 2230: @74149
28501 GIM_Reject,
28502 // Label 2211: @74150
28503 GIM_Try, /*On fail goto*//*Label 2234*/ GIMT_Encode4(74216),
28504 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
28505 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
28506 GIM_Try, /*On fail goto*//*Label 2235*/ GIMT_Encode4(74188), // Rule ID 3157 //
28507 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
28508 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28509 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28510 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28511 // (umax:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMAXUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
28512 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUDYrr),
28513 GIR_RootConstrainSelectedInstOperands,
28514 // GIR_Coverage, 3157,
28515 GIR_Done,
28516 // Label 2235: @74188
28517 GIM_Try, /*On fail goto*//*Label 2236*/ GIMT_Encode4(74215), // Rule ID 5413 //
28518 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28519 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28520 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28521 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28522 // (umax:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMAXUDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
28523 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUDZ256rr),
28524 GIR_RootConstrainSelectedInstOperands,
28525 // GIR_Coverage, 5413,
28526 GIR_Done,
28527 // Label 2236: @74215
28528 GIM_Reject,
28529 // Label 2234: @74216
28530 GIM_Reject,
28531 // Label 2212: @74217
28532 GIM_Try, /*On fail goto*//*Label 2237*/ GIMT_Encode4(74250), // Rule ID 5431 //
28533 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
28534 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
28535 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
28536 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28537 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28538 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28539 // (umax:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMAXUQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
28540 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUQZrr),
28541 GIR_RootConstrainSelectedInstOperands,
28542 // GIR_Coverage, 5431,
28543 GIR_Done,
28544 // Label 2237: @74250
28545 GIM_Reject,
28546 // Label 2213: @74251
28547 GIM_Try, /*On fail goto*//*Label 2238*/ GIMT_Encode4(74344),
28548 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
28549 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
28550 GIM_Try, /*On fail goto*//*Label 2239*/ GIMT_Encode4(74289), // Rule ID 2596 //
28551 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
28552 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28553 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28554 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28555 // (umax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMAXUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
28556 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUBrr),
28557 GIR_RootConstrainSelectedInstOperands,
28558 // GIR_Coverage, 2596,
28559 GIR_Done,
28560 // Label 2239: @74289
28561 GIM_Try, /*On fail goto*//*Label 2240*/ GIMT_Encode4(74316), // Rule ID 2598 //
28562 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
28563 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28564 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28565 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28566 // (umax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMAXUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
28567 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMAXUBrr),
28568 GIR_RootConstrainSelectedInstOperands,
28569 // GIR_Coverage, 2598,
28570 GIR_Done,
28571 // Label 2240: @74316
28572 GIM_Try, /*On fail goto*//*Label 2241*/ GIMT_Encode4(74343), // Rule ID 5380 //
28573 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28574 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28575 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28576 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28577 // (umax:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMAXUBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
28578 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUBZ128rr),
28579 GIR_RootConstrainSelectedInstOperands,
28580 // GIR_Coverage, 5380,
28581 GIR_Done,
28582 // Label 2241: @74343
28583 GIM_Reject,
28584 // Label 2238: @74344
28585 GIM_Reject,
28586 // Label 2214: @74345
28587 GIM_Try, /*On fail goto*//*Label 2242*/ GIMT_Encode4(74411),
28588 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
28589 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
28590 GIM_Try, /*On fail goto*//*Label 2243*/ GIMT_Encode4(74383), // Rule ID 3167 //
28591 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
28592 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28593 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28594 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28595 // (umax:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMAXUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
28596 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUWYrr),
28597 GIR_RootConstrainSelectedInstOperands,
28598 // GIR_Coverage, 3167,
28599 GIR_Done,
28600 // Label 2243: @74383
28601 GIM_Try, /*On fail goto*//*Label 2244*/ GIMT_Encode4(74410), // Rule ID 5392 //
28602 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28603 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28604 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28605 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28606 // (umax:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMAXUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
28607 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUWZ256rr),
28608 GIR_RootConstrainSelectedInstOperands,
28609 // GIR_Coverage, 5392,
28610 GIR_Done,
28611 // Label 2244: @74410
28612 GIM_Reject,
28613 // Label 2242: @74411
28614 GIM_Reject,
28615 // Label 2215: @74412
28616 GIM_Try, /*On fail goto*//*Label 2245*/ GIMT_Encode4(74445), // Rule ID 5404 //
28617 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
28618 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
28619 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
28620 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28621 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28622 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28623 // (umax:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMAXUDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
28624 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUDZrr),
28625 GIR_RootConstrainSelectedInstOperands,
28626 // GIR_Coverage, 5404,
28627 GIR_Done,
28628 // Label 2245: @74445
28629 GIM_Reject,
28630 // Label 2216: @74446
28631 GIM_Try, /*On fail goto*//*Label 2246*/ GIMT_Encode4(74512),
28632 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
28633 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8,
28634 GIM_Try, /*On fail goto*//*Label 2247*/ GIMT_Encode4(74484), // Rule ID 2600 //
28635 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
28636 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28637 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28638 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28639 // (umax:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMAXUBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
28640 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUBYrr),
28641 GIR_RootConstrainSelectedInstOperands,
28642 // GIR_Coverage, 2600,
28643 GIR_Done,
28644 // Label 2247: @74484
28645 GIM_Try, /*On fail goto*//*Label 2248*/ GIMT_Encode4(74511), // Rule ID 5374 //
28646 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28647 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28648 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28649 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28650 // (umax:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMAXUBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
28651 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUBZ256rr),
28652 GIR_RootConstrainSelectedInstOperands,
28653 // GIR_Coverage, 5374,
28654 GIR_Done,
28655 // Label 2248: @74511
28656 GIM_Reject,
28657 // Label 2246: @74512
28658 GIM_Reject,
28659 // Label 2217: @74513
28660 GIM_Try, /*On fail goto*//*Label 2249*/ GIMT_Encode4(74546), // Rule ID 5386 //
28661 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
28662 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
28663 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
28664 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28665 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28666 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28667 // (umax:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMAXUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
28668 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUWZrr),
28669 GIR_RootConstrainSelectedInstOperands,
28670 // GIR_Coverage, 5386,
28671 GIR_Done,
28672 // Label 2249: @74546
28673 GIM_Reject,
28674 // Label 2218: @74547
28675 GIM_Try, /*On fail goto*//*Label 2250*/ GIMT_Encode4(74580), // Rule ID 5368 //
28676 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
28677 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
28678 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8,
28679 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28680 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28681 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28682 // (umax:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMAXUBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
28683 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMAXUBZrr),
28684 GIR_RootConstrainSelectedInstOperands,
28685 // GIR_Coverage, 5368,
28686 GIR_Done,
28687 // Label 2250: @74580
28688 GIM_Reject,
28689 // Label 2219: @74581
28690 GIM_Reject,
28691 // Label 50: @74582
28692 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(25), /*)*//*default:*//*Label 2263*/ GIMT_Encode4(75454),
28693 /*GILLT_v2s64*//*Label 2251*/ GIMT_Encode4(74661), GIMT_Encode4(0),
28694 /*GILLT_v4s32*//*Label 2252*/ GIMT_Encode4(74801),
28695 /*GILLT_v4s64*//*Label 2253*/ GIMT_Encode4(74880), GIMT_Encode4(0),
28696 /*GILLT_v8s16*//*Label 2254*/ GIMT_Encode4(75020),
28697 /*GILLT_v8s32*//*Label 2255*/ GIMT_Encode4(75099),
28698 /*GILLT_v8s64*//*Label 2256*/ GIMT_Encode4(75155), GIMT_Encode4(0),
28699 /*GILLT_v16s8*//*Label 2257*/ GIMT_Encode4(75182),
28700 /*GILLT_v16s16*//*Label 2258*/ GIMT_Encode4(75261),
28701 /*GILLT_v16s32*//*Label 2259*/ GIMT_Encode4(75317), GIMT_Encode4(0),
28702 /*GILLT_v32s8*//*Label 2260*/ GIMT_Encode4(75344),
28703 /*GILLT_v32s16*//*Label 2261*/ GIMT_Encode4(75400), GIMT_Encode4(0),
28704 /*GILLT_v64s8*//*Label 2262*/ GIMT_Encode4(75427),
28705 // Label 2251: @74661
28706 GIM_Try, /*On fail goto*//*Label 2264*/ GIMT_Encode4(74800),
28707 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
28708 GIM_Try, /*On fail goto*//*Label 2265*/ GIMT_Encode4(74692), // Rule ID 13150 //
28709 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28710 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28711 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28712 // (abs:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPABSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1)
28713 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSQZ128rr),
28714 GIR_RootConstrainSelectedInstOperands,
28715 // GIR_Coverage, 13150,
28716 GIR_Done,
28717 // Label 2265: @74692
28718 GIM_Try, /*On fail goto*//*Label 2266*/ GIMT_Encode4(74799), // Rule ID 20368 //
28719 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
28720 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28721 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28722 // (abs:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPABSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
28723 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
28724 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
28725 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
28726 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28727 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28728 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
28729 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28730 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28731 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
28732 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
28733 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
28734 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28735 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28736 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
28737 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPABSQZrr),
28738 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28739 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
28740 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
28741 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
28742 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
28743 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
28744 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
28745 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28746 // GIR_Coverage, 20368,
28747 GIR_EraseRootFromParent_Done,
28748 // Label 2266: @74799
28749 GIM_Reject,
28750 // Label 2264: @74800
28751 GIM_Reject,
28752 // Label 2252: @74801
28753 GIM_Try, /*On fail goto*//*Label 2267*/ GIMT_Encode4(74879),
28754 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
28755 GIM_Try, /*On fail goto*//*Label 2268*/ GIMT_Encode4(74832), // Rule ID 2942 //
28756 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
28757 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28758 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28759 // (abs:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src) => (VPABSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src)
28760 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSDrr),
28761 GIR_RootConstrainSelectedInstOperands,
28762 // GIR_Coverage, 2942,
28763 GIR_Done,
28764 // Label 2268: @74832
28765 GIM_Try, /*On fail goto*//*Label 2269*/ GIMT_Encode4(74855), // Rule ID 2954 //
28766 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
28767 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28768 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28769 // (abs:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src) => (PABSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src)
28770 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PABSDrr),
28771 GIR_RootConstrainSelectedInstOperands,
28772 // GIR_Coverage, 2954,
28773 GIR_Done,
28774 // Label 2269: @74855
28775 GIM_Try, /*On fail goto*//*Label 2270*/ GIMT_Encode4(74878), // Rule ID 13177 //
28776 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28777 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28778 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28779 // (abs:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPABSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1)
28780 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSDZ128rr),
28781 GIR_RootConstrainSelectedInstOperands,
28782 // GIR_Coverage, 13177,
28783 GIR_Done,
28784 // Label 2270: @74878
28785 GIM_Reject,
28786 // Label 2267: @74879
28787 GIM_Reject,
28788 // Label 2253: @74880
28789 GIM_Try, /*On fail goto*//*Label 2271*/ GIMT_Encode4(75019),
28790 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
28791 GIM_Try, /*On fail goto*//*Label 2272*/ GIMT_Encode4(74911), // Rule ID 13141 //
28792 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28793 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28794 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28795 // (abs:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPABSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1)
28796 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSQZ256rr),
28797 GIR_RootConstrainSelectedInstOperands,
28798 // GIR_Coverage, 13141,
28799 GIR_Done,
28800 // Label 2272: @74911
28801 GIM_Try, /*On fail goto*//*Label 2273*/ GIMT_Encode4(75018), // Rule ID 20367 //
28802 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX),
28803 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28804 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28805 // (abs:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPABSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
28806 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
28807 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
28808 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
28809 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
28810 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28811 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
28812 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
28813 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28814 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
28815 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
28816 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
28817 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
28818 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28819 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
28820 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPABSQZrr),
28821 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
28822 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
28823 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
28824 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
28825 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
28826 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
28827 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
28828 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
28829 // GIR_Coverage, 20367,
28830 GIR_EraseRootFromParent_Done,
28831 // Label 2273: @75018
28832 GIM_Reject,
28833 // Label 2271: @75019
28834 GIM_Reject,
28835 // Label 2254: @75020
28836 GIM_Try, /*On fail goto*//*Label 2274*/ GIMT_Encode4(75098),
28837 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
28838 GIM_Try, /*On fail goto*//*Label 2275*/ GIMT_Encode4(75051), // Rule ID 2940 //
28839 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
28840 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28841 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28842 // (abs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src) => (VPABSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src)
28843 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSWrr),
28844 GIR_RootConstrainSelectedInstOperands,
28845 // GIR_Coverage, 2940,
28846 GIR_Done,
28847 // Label 2275: @75051
28848 GIM_Try, /*On fail goto*//*Label 2276*/ GIMT_Encode4(75074), // Rule ID 2952 //
28849 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
28850 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28851 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28852 // (abs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src) => (PABSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src)
28853 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PABSWrr),
28854 GIR_RootConstrainSelectedInstOperands,
28855 // GIR_Coverage, 2952,
28856 GIR_Done,
28857 // Label 2276: @75074
28858 GIM_Try, /*On fail goto*//*Label 2277*/ GIMT_Encode4(75097), // Rule ID 13198 //
28859 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28860 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28861 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28862 // (abs:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (VPABSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1)
28863 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSWZ128rr),
28864 GIR_RootConstrainSelectedInstOperands,
28865 // GIR_Coverage, 13198,
28866 GIR_Done,
28867 // Label 2277: @75097
28868 GIM_Reject,
28869 // Label 2274: @75098
28870 GIM_Reject,
28871 // Label 2255: @75099
28872 GIM_Try, /*On fail goto*//*Label 2278*/ GIMT_Encode4(75154),
28873 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
28874 GIM_Try, /*On fail goto*//*Label 2279*/ GIMT_Encode4(75130), // Rule ID 2948 //
28875 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX),
28876 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28877 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28878 // (abs:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src) => (VPABSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src)
28879 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSDYrr),
28880 GIR_RootConstrainSelectedInstOperands,
28881 // GIR_Coverage, 2948,
28882 GIR_Done,
28883 // Label 2279: @75130
28884 GIM_Try, /*On fail goto*//*Label 2280*/ GIMT_Encode4(75153), // Rule ID 13168 //
28885 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
28886 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28887 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28888 // (abs:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPABSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1)
28889 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSDZ256rr),
28890 GIR_RootConstrainSelectedInstOperands,
28891 // GIR_Coverage, 13168,
28892 GIR_Done,
28893 // Label 2280: @75153
28894 GIM_Reject,
28895 // Label 2278: @75154
28896 GIM_Reject,
28897 // Label 2256: @75155
28898 GIM_Try, /*On fail goto*//*Label 2281*/ GIMT_Encode4(75181), // Rule ID 13132 //
28899 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
28900 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
28901 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28902 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28903 // (abs:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPABSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1)
28904 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSQZrr),
28905 GIR_RootConstrainSelectedInstOperands,
28906 // GIR_Coverage, 13132,
28907 GIR_Done,
28908 // Label 2281: @75181
28909 GIM_Reject,
28910 // Label 2257: @75182
28911 GIM_Try, /*On fail goto*//*Label 2282*/ GIMT_Encode4(75260),
28912 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
28913 GIM_Try, /*On fail goto*//*Label 2283*/ GIMT_Encode4(75213), // Rule ID 2938 //
28914 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI),
28915 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28916 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28917 // (abs:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src) => (VPABSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src)
28918 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSBrr),
28919 GIR_RootConstrainSelectedInstOperands,
28920 // GIR_Coverage, 2938,
28921 GIR_Done,
28922 // Label 2283: @75213
28923 GIM_Try, /*On fail goto*//*Label 2284*/ GIMT_Encode4(75236), // Rule ID 2950 //
28924 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3),
28925 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28926 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
28927 // (abs:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src) => (PABSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src)
28928 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PABSBrr),
28929 GIR_RootConstrainSelectedInstOperands,
28930 // GIR_Coverage, 2950,
28931 GIR_Done,
28932 // Label 2284: @75236
28933 GIM_Try, /*On fail goto*//*Label 2285*/ GIMT_Encode4(75259), // Rule ID 13216 //
28934 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28935 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28936 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
28937 // (abs:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (VPABSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1)
28938 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSBZ128rr),
28939 GIR_RootConstrainSelectedInstOperands,
28940 // GIR_Coverage, 13216,
28941 GIR_Done,
28942 // Label 2285: @75259
28943 GIM_Reject,
28944 // Label 2282: @75260
28945 GIM_Reject,
28946 // Label 2258: @75261
28947 GIM_Try, /*On fail goto*//*Label 2286*/ GIMT_Encode4(75316),
28948 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
28949 GIM_Try, /*On fail goto*//*Label 2287*/ GIMT_Encode4(75292), // Rule ID 2946 //
28950 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
28951 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28952 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28953 // (abs:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src) => (VPABSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src)
28954 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSWYrr),
28955 GIR_RootConstrainSelectedInstOperands,
28956 // GIR_Coverage, 2946,
28957 GIR_Done,
28958 // Label 2287: @75292
28959 GIM_Try, /*On fail goto*//*Label 2288*/ GIMT_Encode4(75315), // Rule ID 13192 //
28960 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
28961 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28962 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
28963 // (abs:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (VPABSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1)
28964 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSWZ256rr),
28965 GIR_RootConstrainSelectedInstOperands,
28966 // GIR_Coverage, 13192,
28967 GIR_Done,
28968 // Label 2288: @75315
28969 GIM_Reject,
28970 // Label 2286: @75316
28971 GIM_Reject,
28972 // Label 2259: @75317
28973 GIM_Try, /*On fail goto*//*Label 2289*/ GIMT_Encode4(75343), // Rule ID 13159 //
28974 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
28975 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
28976 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28977 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
28978 // (abs:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPABSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1)
28979 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSDZrr),
28980 GIR_RootConstrainSelectedInstOperands,
28981 // GIR_Coverage, 13159,
28982 GIR_Done,
28983 // Label 2289: @75343
28984 GIM_Reject,
28985 // Label 2260: @75344
28986 GIM_Try, /*On fail goto*//*Label 2290*/ GIMT_Encode4(75399),
28987 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
28988 GIM_Try, /*On fail goto*//*Label 2291*/ GIMT_Encode4(75375), // Rule ID 2944 //
28989 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI),
28990 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28991 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
28992 // (abs:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src) => (VPABSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src)
28993 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSBYrr),
28994 GIR_RootConstrainSelectedInstOperands,
28995 // GIR_Coverage, 2944,
28996 GIR_Done,
28997 // Label 2291: @75375
28998 GIM_Try, /*On fail goto*//*Label 2292*/ GIMT_Encode4(75398), // Rule ID 13210 //
28999 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX),
29000 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29001 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29002 // (abs:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (VPABSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1)
29003 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSBZ256rr),
29004 GIR_RootConstrainSelectedInstOperands,
29005 // GIR_Coverage, 13210,
29006 GIR_Done,
29007 // Label 2292: @75398
29008 GIM_Reject,
29009 // Label 2290: @75399
29010 GIM_Reject,
29011 // Label 2261: @75400
29012 GIM_Try, /*On fail goto*//*Label 2293*/ GIMT_Encode4(75426), // Rule ID 13186 //
29013 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
29014 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
29015 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29016 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29017 // (abs:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) => (VPABSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1)
29018 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSWZrr),
29019 GIR_RootConstrainSelectedInstOperands,
29020 // GIR_Coverage, 13186,
29021 GIR_Done,
29022 // Label 2293: @75426
29023 GIM_Reject,
29024 // Label 2262: @75427
29025 GIM_Try, /*On fail goto*//*Label 2294*/ GIMT_Encode4(75453), // Rule ID 13204 //
29026 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI),
29027 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
29028 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29029 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29030 // (abs:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) => (VPABSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1)
29031 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPABSBZrr),
29032 GIR_RootConstrainSelectedInstOperands,
29033 // GIR_Coverage, 13204,
29034 GIR_Done,
29035 // Label 2294: @75453
29036 GIM_Reject,
29037 // Label 2263: @75454
29038 GIM_Reject,
29039 // Label 51: @75455
29040 GIM_Try, /*On fail goto*//*Label 2295*/ GIMT_Encode4(75470), // Rule ID 619 //
29041 // MIs[0] dst
29042 GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
29043 // (br (bb:{ *:[Other] }):$dst) => (JMP_1 (bb:{ *:[Other] }):$dst)
29044 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::JMP_1),
29045 GIR_RootConstrainSelectedInstOperands,
29046 // GIR_Coverage, 619,
29047 GIR_Done,
29048 // Label 2295: @75470
29049 GIM_Reject,
29050 // Label 52: @75471
29051 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 2299*/ GIMT_Encode4(75584),
29052 /*GILLT_s16*//*Label 2296*/ GIMT_Encode4(75494),
29053 /*GILLT_s32*//*Label 2297*/ GIMT_Encode4(75524),
29054 /*GILLT_s64*//*Label 2298*/ GIMT_Encode4(75554),
29055 // Label 2296: @75494
29056 GIM_Try, /*On fail goto*//*Label 2300*/ GIMT_Encode4(75523), // Rule ID 21389 //
29057 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
29058 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
29059 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
29060 // (cttz_zero_undef:{ *:[i16] } GR16:{ *:[i16] }:$src) => (BSF16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
29061 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::BSF16rr),
29062 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
29063 GIR_RootConstrainSelectedInstOperands,
29064 // GIR_Coverage, 21389,
29065 GIR_Done,
29066 // Label 2300: @75523
29067 GIM_Reject,
29068 // Label 2297: @75524
29069 GIM_Try, /*On fail goto*//*Label 2301*/ GIMT_Encode4(75553), // Rule ID 21390 //
29070 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
29071 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
29072 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
29073 // (cttz_zero_undef:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSF32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
29074 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::BSF32rr),
29075 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
29076 GIR_RootConstrainSelectedInstOperands,
29077 // GIR_Coverage, 21390,
29078 GIR_Done,
29079 // Label 2301: @75553
29080 GIM_Reject,
29081 // Label 2298: @75554
29082 GIM_Try, /*On fail goto*//*Label 2302*/ GIMT_Encode4(75583), // Rule ID 21391 //
29083 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
29084 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
29085 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
29086 // (cttz_zero_undef:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSF64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
29087 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::BSF64rr),
29088 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead),
29089 GIR_RootConstrainSelectedInstOperands,
29090 // GIR_Coverage, 21391,
29091 GIR_Done,
29092 // Label 2302: @75583
29093 GIM_Reject,
29094 // Label 2299: @75584
29095 GIM_Reject,
29096 // Label 53: @75585
29097 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(20), /*)*//*default:*//*Label 2309*/ GIMT_Encode4(76258),
29098 /*GILLT_v2s64*//*Label 2303*/ GIMT_Encode4(75644), GIMT_Encode4(0),
29099 /*GILLT_v4s32*//*Label 2304*/ GIMT_Encode4(75784),
29100 /*GILLT_v4s64*//*Label 2305*/ GIMT_Encode4(75924), GIMT_Encode4(0), GIMT_Encode4(0),
29101 /*GILLT_v8s32*//*Label 2306*/ GIMT_Encode4(76064),
29102 /*GILLT_v8s64*//*Label 2307*/ GIMT_Encode4(76204), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
29103 /*GILLT_v16s32*//*Label 2308*/ GIMT_Encode4(76231),
29104 // Label 2303: @75644
29105 GIM_Try, /*On fail goto*//*Label 2310*/ GIMT_Encode4(75783),
29106 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
29107 GIM_Try, /*On fail goto*//*Label 2311*/ GIMT_Encode4(75675), // Rule ID 13240 //
29108 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasVLX),
29109 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29110 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29111 // (ctlz:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPLZCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1)
29112 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPLZCNTQZ128rr),
29113 GIR_RootConstrainSelectedInstOperands,
29114 // GIR_Coverage, 13240,
29115 GIR_Done,
29116 // Label 2311: @75675
29117 GIM_Try, /*On fail goto*//*Label 2312*/ GIMT_Encode4(75782), // Rule ID 20370 //
29118 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasEVEX512_NoVLX),
29119 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29120 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29121 // (ctlz:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPLZCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
29122 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29123 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
29124 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
29125 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29126 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29127 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29128 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29129 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29130 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29131 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29132 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
29133 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29134 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29135 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
29136 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPLZCNTQZrr),
29137 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29138 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29139 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29140 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29141 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29142 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
29143 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
29144 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29145 // GIR_Coverage, 20370,
29146 GIR_EraseRootFromParent_Done,
29147 // Label 2312: @75782
29148 GIM_Reject,
29149 // Label 2310: @75783
29150 GIM_Reject,
29151 // Label 2304: @75784
29152 GIM_Try, /*On fail goto*//*Label 2313*/ GIMT_Encode4(75923),
29153 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
29154 GIM_Try, /*On fail goto*//*Label 2314*/ GIMT_Encode4(75815), // Rule ID 13267 //
29155 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasVLX),
29156 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29157 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29158 // (ctlz:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPLZCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1)
29159 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPLZCNTDZ128rr),
29160 GIR_RootConstrainSelectedInstOperands,
29161 // GIR_Coverage, 13267,
29162 GIR_Done,
29163 // Label 2314: @75815
29164 GIM_Try, /*On fail goto*//*Label 2315*/ GIMT_Encode4(75922), // Rule ID 20372 //
29165 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasEVEX512_NoVLX),
29166 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29167 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29168 // (ctlz:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPLZCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
29169 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29170 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
29171 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
29172 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29173 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29174 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29175 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29176 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29177 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29178 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29179 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
29180 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29181 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29182 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
29183 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPLZCNTDZrr),
29184 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29185 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29186 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29187 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29188 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29189 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
29190 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
29191 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29192 // GIR_Coverage, 20372,
29193 GIR_EraseRootFromParent_Done,
29194 // Label 2315: @75922
29195 GIM_Reject,
29196 // Label 2313: @75923
29197 GIM_Reject,
29198 // Label 2305: @75924
29199 GIM_Try, /*On fail goto*//*Label 2316*/ GIMT_Encode4(76063),
29200 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
29201 GIM_Try, /*On fail goto*//*Label 2317*/ GIMT_Encode4(75955), // Rule ID 13231 //
29202 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasVLX),
29203 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29204 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29205 // (ctlz:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPLZCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1)
29206 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPLZCNTQZ256rr),
29207 GIR_RootConstrainSelectedInstOperands,
29208 // GIR_Coverage, 13231,
29209 GIR_Done,
29210 // Label 2317: @75955
29211 GIM_Try, /*On fail goto*//*Label 2318*/ GIMT_Encode4(76062), // Rule ID 20369 //
29212 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasEVEX512_NoVLX),
29213 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29214 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29215 // (ctlz:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPLZCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
29216 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29217 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
29218 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
29219 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29220 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29221 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29222 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29223 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29224 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29225 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29226 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
29227 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29228 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29229 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
29230 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPLZCNTQZrr),
29231 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29232 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29233 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29234 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29235 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29236 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
29237 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
29238 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29239 // GIR_Coverage, 20369,
29240 GIR_EraseRootFromParent_Done,
29241 // Label 2318: @76062
29242 GIM_Reject,
29243 // Label 2316: @76063
29244 GIM_Reject,
29245 // Label 2306: @76064
29246 GIM_Try, /*On fail goto*//*Label 2319*/ GIMT_Encode4(76203),
29247 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
29248 GIM_Try, /*On fail goto*//*Label 2320*/ GIMT_Encode4(76095), // Rule ID 13258 //
29249 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasVLX),
29250 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29251 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29252 // (ctlz:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPLZCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1)
29253 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPLZCNTDZ256rr),
29254 GIR_RootConstrainSelectedInstOperands,
29255 // GIR_Coverage, 13258,
29256 GIR_Done,
29257 // Label 2320: @76095
29258 GIM_Try, /*On fail goto*//*Label 2321*/ GIMT_Encode4(76202), // Rule ID 20371 //
29259 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI_HasEVEX512_NoVLX),
29260 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29261 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29262 // (ctlz:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPLZCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
29263 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29264 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
29265 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
29266 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29267 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29268 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29269 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29270 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29271 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29272 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29273 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
29274 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29275 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29276 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
29277 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPLZCNTDZrr),
29278 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29279 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29280 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29281 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29282 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29283 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
29284 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
29285 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29286 // GIR_Coverage, 20371,
29287 GIR_EraseRootFromParent_Done,
29288 // Label 2321: @76202
29289 GIM_Reject,
29290 // Label 2319: @76203
29291 GIM_Reject,
29292 // Label 2307: @76204
29293 GIM_Try, /*On fail goto*//*Label 2322*/ GIMT_Encode4(76230), // Rule ID 13222 //
29294 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI),
29295 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
29296 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29297 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29298 // (ctlz:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPLZCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1)
29299 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPLZCNTQZrr),
29300 GIR_RootConstrainSelectedInstOperands,
29301 // GIR_Coverage, 13222,
29302 GIR_Done,
29303 // Label 2322: @76230
29304 GIM_Reject,
29305 // Label 2308: @76231
29306 GIM_Try, /*On fail goto*//*Label 2323*/ GIMT_Encode4(76257), // Rule ID 13249 //
29307 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCDI),
29308 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
29309 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29310 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29311 // (ctlz:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPLZCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1)
29312 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPLZCNTDZrr),
29313 GIR_RootConstrainSelectedInstOperands,
29314 // GIR_Coverage, 13249,
29315 GIR_Done,
29316 // Label 2323: @76257
29317 GIM_Reject,
29318 // Label 2309: @76258
29319 GIM_Reject,
29320 // Label 54: @76259
29321 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(25), /*)*//*default:*//*Label 2336*/ GIMT_Encode4(77566),
29322 /*GILLT_v2s64*//*Label 2324*/ GIMT_Encode4(76338), GIMT_Encode4(0),
29323 /*GILLT_v4s32*//*Label 2325*/ GIMT_Encode4(76478),
29324 /*GILLT_v4s64*//*Label 2326*/ GIMT_Encode4(76618), GIMT_Encode4(0),
29325 /*GILLT_v8s16*//*Label 2327*/ GIMT_Encode4(76758),
29326 /*GILLT_v8s32*//*Label 2328*/ GIMT_Encode4(76898),
29327 /*GILLT_v8s64*//*Label 2329*/ GIMT_Encode4(77038), GIMT_Encode4(0),
29328 /*GILLT_v16s8*//*Label 2330*/ GIMT_Encode4(77065),
29329 /*GILLT_v16s16*//*Label 2331*/ GIMT_Encode4(77205),
29330 /*GILLT_v16s32*//*Label 2332*/ GIMT_Encode4(77345), GIMT_Encode4(0),
29331 /*GILLT_v32s8*//*Label 2333*/ GIMT_Encode4(77372),
29332 /*GILLT_v32s16*//*Label 2334*/ GIMT_Encode4(77512), GIMT_Encode4(0),
29333 /*GILLT_v64s8*//*Label 2335*/ GIMT_Encode4(77539),
29334 // Label 2324: @76338
29335 GIM_Try, /*On fail goto*//*Label 2337*/ GIMT_Encode4(76477),
29336 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
29337 GIM_Try, /*On fail goto*//*Label 2338*/ GIMT_Encode4(76369), // Rule ID 13348 //
29338 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPOPCNTDQ),
29339 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29340 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29341 // (ctpop:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPOPCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1)
29342 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTQZ128rr),
29343 GIR_RootConstrainSelectedInstOperands,
29344 // GIR_Coverage, 13348,
29345 GIR_Done,
29346 // Label 2338: @76369
29347 GIM_Try, /*On fail goto*//*Label 2339*/ GIMT_Encode4(76476), // Rule ID 20374 //
29348 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasEVEX512_HasVPOPCNTDQ_NoVLX),
29349 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29350 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29351 // (ctpop:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPOPCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
29352 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29353 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
29354 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
29355 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29356 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29357 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29358 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29359 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29360 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29361 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29362 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
29363 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29364 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29365 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
29366 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTQZrr),
29367 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29368 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29369 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29370 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29371 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29372 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
29373 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
29374 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29375 // GIR_Coverage, 20374,
29376 GIR_EraseRootFromParent_Done,
29377 // Label 2339: @76476
29378 GIM_Reject,
29379 // Label 2337: @76477
29380 GIM_Reject,
29381 // Label 2325: @76478
29382 GIM_Try, /*On fail goto*//*Label 2340*/ GIMT_Encode4(76617),
29383 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
29384 GIM_Try, /*On fail goto*//*Label 2341*/ GIMT_Encode4(76509), // Rule ID 13375 //
29385 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPOPCNTDQ),
29386 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29387 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29388 // (ctpop:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPOPCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1)
29389 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTDZ128rr),
29390 GIR_RootConstrainSelectedInstOperands,
29391 // GIR_Coverage, 13375,
29392 GIR_Done,
29393 // Label 2341: @76509
29394 GIM_Try, /*On fail goto*//*Label 2342*/ GIMT_Encode4(76616), // Rule ID 20376 //
29395 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasEVEX512_HasVPOPCNTDQ_NoVLX),
29396 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29397 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29398 // (ctpop:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPOPCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
29399 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29400 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
29401 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
29402 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29403 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29404 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29405 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29406 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29407 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29408 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29409 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
29410 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29411 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29412 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
29413 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTDZrr),
29414 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29415 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29416 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29417 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29418 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29419 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
29420 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
29421 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29422 // GIR_Coverage, 20376,
29423 GIR_EraseRootFromParent_Done,
29424 // Label 2342: @76616
29425 GIM_Reject,
29426 // Label 2340: @76617
29427 GIM_Reject,
29428 // Label 2326: @76618
29429 GIM_Try, /*On fail goto*//*Label 2343*/ GIMT_Encode4(76757),
29430 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
29431 GIM_Try, /*On fail goto*//*Label 2344*/ GIMT_Encode4(76649), // Rule ID 13339 //
29432 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPOPCNTDQ),
29433 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29434 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29435 // (ctpop:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPOPCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1)
29436 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTQZ256rr),
29437 GIR_RootConstrainSelectedInstOperands,
29438 // GIR_Coverage, 13339,
29439 GIR_Done,
29440 // Label 2344: @76649
29441 GIM_Try, /*On fail goto*//*Label 2345*/ GIMT_Encode4(76756), // Rule ID 20373 //
29442 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasEVEX512_HasVPOPCNTDQ_NoVLX),
29443 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29444 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29445 // (ctpop:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPOPCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
29446 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29447 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64,
29448 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64,
29449 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29450 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29451 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29452 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29453 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29454 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29455 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29456 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
29457 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29458 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29459 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
29460 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTQZrr),
29461 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29462 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29463 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29464 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29465 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29466 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
29467 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
29468 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29469 // GIR_Coverage, 20373,
29470 GIR_EraseRootFromParent_Done,
29471 // Label 2345: @76756
29472 GIM_Reject,
29473 // Label 2343: @76757
29474 GIM_Reject,
29475 // Label 2327: @76758
29476 GIM_Try, /*On fail goto*//*Label 2346*/ GIMT_Encode4(76897),
29477 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
29478 GIM_Try, /*On fail goto*//*Label 2347*/ GIMT_Encode4(76789), // Rule ID 14402 //
29479 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasVLX),
29480 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29481 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29482 // (ctpop:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (VPOPCNTWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1)
29483 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTWZ128rr),
29484 GIR_RootConstrainSelectedInstOperands,
29485 // GIR_Coverage, 14402,
29486 GIR_Done,
29487 // Label 2347: @76789
29488 GIM_Try, /*On fail goto*//*Label 2348*/ GIMT_Encode4(76896), // Rule ID 20665 //
29489 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasEVEX512_NoVLX),
29490 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29491 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29492 // (ctpop:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (EXTRACT_SUBREG:{ *:[v8i16] } (VPOPCNTWZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR128X:{ *:[v8i16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
29493 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29494 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
29495 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
29496 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29497 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29498 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29499 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29500 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29501 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29502 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29503 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
29504 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29505 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29506 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
29507 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTWZrr),
29508 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29509 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29510 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29511 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29512 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29513 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
29514 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
29515 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29516 // GIR_Coverage, 20665,
29517 GIR_EraseRootFromParent_Done,
29518 // Label 2348: @76896
29519 GIM_Reject,
29520 // Label 2346: @76897
29521 GIM_Reject,
29522 // Label 2328: @76898
29523 GIM_Try, /*On fail goto*//*Label 2349*/ GIMT_Encode4(77037),
29524 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
29525 GIM_Try, /*On fail goto*//*Label 2350*/ GIMT_Encode4(76929), // Rule ID 13366 //
29526 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPOPCNTDQ),
29527 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29528 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29529 // (ctpop:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPOPCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1)
29530 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTDZ256rr),
29531 GIR_RootConstrainSelectedInstOperands,
29532 // GIR_Coverage, 13366,
29533 GIR_Done,
29534 // Label 2350: @76929
29535 GIM_Try, /*On fail goto*//*Label 2351*/ GIMT_Encode4(77036), // Rule ID 20375 //
29536 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasEVEX512_HasVPOPCNTDQ_NoVLX),
29537 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29538 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29539 // (ctpop:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPOPCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
29540 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29541 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32,
29542 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32,
29543 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29544 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29545 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29546 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29547 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29548 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29549 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29550 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
29551 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29552 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29553 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
29554 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTDZrr),
29555 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29556 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29557 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29558 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29559 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29560 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
29561 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
29562 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29563 // GIR_Coverage, 20375,
29564 GIR_EraseRootFromParent_Done,
29565 // Label 2351: @77036
29566 GIM_Reject,
29567 // Label 2349: @77037
29568 GIM_Reject,
29569 // Label 2329: @77038
29570 GIM_Try, /*On fail goto*//*Label 2352*/ GIMT_Encode4(77064), // Rule ID 13330 //
29571 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVPOPCNTDQ),
29572 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
29573 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29574 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29575 // (ctpop:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPOPCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1)
29576 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTQZrr),
29577 GIR_RootConstrainSelectedInstOperands,
29578 // GIR_Coverage, 13330,
29579 GIR_Done,
29580 // Label 2352: @77064
29581 GIM_Reject,
29582 // Label 2330: @77065
29583 GIM_Try, /*On fail goto*//*Label 2353*/ GIMT_Encode4(77204),
29584 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
29585 GIM_Try, /*On fail goto*//*Label 2354*/ GIMT_Encode4(77096), // Rule ID 14384 //
29586 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasVLX),
29587 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29588 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29589 // (ctpop:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (VPOPCNTBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1)
29590 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTBZ128rr),
29591 GIR_RootConstrainSelectedInstOperands,
29592 // GIR_Coverage, 14384,
29593 GIR_Done,
29594 // Label 2354: @77096
29595 GIM_Try, /*On fail goto*//*Label 2355*/ GIMT_Encode4(77203), // Rule ID 20663 //
29596 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasEVEX512_NoVLX),
29597 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29598 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
29599 // (ctpop:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (EXTRACT_SUBREG:{ *:[v16i8] } (VPOPCNTBZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR128X:{ *:[v16i8] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] })
29600 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29601 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8,
29602 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
29603 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29604 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29605 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29606 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29607 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29608 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29609 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29610 GIR_AddImm8, /*InsnID*/2, /*Imm*/9,
29611 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29612 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29613 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID),
29614 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTBZrr),
29615 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29616 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29617 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29618 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29619 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29620 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm),
29621 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID),
29622 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29623 // GIR_Coverage, 20663,
29624 GIR_EraseRootFromParent_Done,
29625 // Label 2355: @77203
29626 GIM_Reject,
29627 // Label 2353: @77204
29628 GIM_Reject,
29629 // Label 2331: @77205
29630 GIM_Try, /*On fail goto*//*Label 2356*/ GIMT_Encode4(77344),
29631 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
29632 GIM_Try, /*On fail goto*//*Label 2357*/ GIMT_Encode4(77236), // Rule ID 14396 //
29633 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasVLX),
29634 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29635 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29636 // (ctpop:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (VPOPCNTWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1)
29637 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTWZ256rr),
29638 GIR_RootConstrainSelectedInstOperands,
29639 // GIR_Coverage, 14396,
29640 GIR_Done,
29641 // Label 2357: @77236
29642 GIM_Try, /*On fail goto*//*Label 2358*/ GIMT_Encode4(77343), // Rule ID 20664 //
29643 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasEVEX512_NoVLX),
29644 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29645 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29646 // (ctpop:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (EXTRACT_SUBREG:{ *:[v16i16] } (VPOPCNTWZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
29647 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29648 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16,
29649 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16,
29650 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29651 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29652 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29653 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29654 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29655 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29656 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29657 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
29658 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29659 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29660 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
29661 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTWZrr),
29662 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29663 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29664 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29665 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29666 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29667 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
29668 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
29669 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29670 // GIR_Coverage, 20664,
29671 GIR_EraseRootFromParent_Done,
29672 // Label 2358: @77343
29673 GIM_Reject,
29674 // Label 2356: @77344
29675 GIM_Reject,
29676 // Label 2332: @77345
29677 GIM_Try, /*On fail goto*//*Label 2359*/ GIMT_Encode4(77371), // Rule ID 13357 //
29678 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVPOPCNTDQ),
29679 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
29680 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29681 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29682 // (ctpop:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPOPCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1)
29683 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTDZrr),
29684 GIR_RootConstrainSelectedInstOperands,
29685 // GIR_Coverage, 13357,
29686 GIR_Done,
29687 // Label 2359: @77371
29688 GIM_Reject,
29689 // Label 2333: @77372
29690 GIM_Try, /*On fail goto*//*Label 2360*/ GIMT_Encode4(77511),
29691 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8,
29692 GIM_Try, /*On fail goto*//*Label 2361*/ GIMT_Encode4(77403), // Rule ID 14378 //
29693 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasVLX),
29694 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29695 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29696 // (ctpop:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (VPOPCNTBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1)
29697 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTBZ256rr),
29698 GIR_RootConstrainSelectedInstOperands,
29699 // GIR_Coverage, 14378,
29700 GIR_Done,
29701 // Label 2361: @77403
29702 GIM_Try, /*On fail goto*//*Label 2362*/ GIMT_Encode4(77510), // Rule ID 20662 //
29703 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG_HasEVEX512_NoVLX),
29704 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29705 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
29706 // (ctpop:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (EXTRACT_SUBREG:{ *:[v32i8] } (VPOPCNTBZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR256X:{ *:[v32i8] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] })
29707 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8,
29708 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8,
29709 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8,
29710 GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29711 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29712 GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
29713 GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG),
29714 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29715 GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2,
29716 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
29717 GIR_AddImm8, /*InsnID*/2, /*Imm*/10,
29718 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID),
29719 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29720 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID),
29721 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPOPCNTBZrr),
29722 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29723 GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
29724 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29725 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
29726 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29727 GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm),
29728 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID),
29729 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID),
29730 // GIR_Coverage, 20662,
29731 GIR_EraseRootFromParent_Done,
29732 // Label 2362: @77510
29733 GIM_Reject,
29734 // Label 2360: @77511
29735 GIM_Reject,
29736 // Label 2334: @77512
29737 GIM_Try, /*On fail goto*//*Label 2363*/ GIMT_Encode4(77538), // Rule ID 14390 //
29738 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG),
29739 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
29740 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29741 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29742 // (ctpop:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) => (VPOPCNTWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1)
29743 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTWZrr),
29744 GIR_RootConstrainSelectedInstOperands,
29745 // GIR_Coverage, 14390,
29746 GIR_Done,
29747 // Label 2363: @77538
29748 GIM_Reject,
29749 // Label 2335: @77539
29750 GIM_Try, /*On fail goto*//*Label 2364*/ GIMT_Encode4(77565), // Rule ID 14372 //
29751 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBITALG),
29752 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8,
29753 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29754 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
29755 // (ctpop:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) => (VPOPCNTBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1)
29756 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPOPCNTBZrr),
29757 GIR_RootConstrainSelectedInstOperands,
29758 // GIR_Coverage, 14372,
29759 GIR_Done,
29760 // Label 2364: @77565
29761 GIM_Reject,
29762 // Label 2336: @77566
29763 GIM_Reject,
29764 // Label 55: @77567
29765 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 2368*/ GIMT_Encode4(77742),
29766 /*GILLT_s16*//*Label 2365*/ GIMT_Encode4(77590),
29767 /*GILLT_s32*//*Label 2366*/ GIMT_Encode4(77646),
29768 /*GILLT_s64*//*Label 2367*/ GIMT_Encode4(77694),
29769 // Label 2365: @77590
29770 GIM_Try, /*On fail goto*//*Label 2369*/ GIMT_Encode4(77645),
29771 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
29772 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
29773 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID),
29774 GIM_Try, /*On fail goto*//*Label 2370*/ GIMT_Encode4(77621), // Rule ID 61 //
29775 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasMOVBE_HasNDD_In64BitMode),
29776 // (bswap:{ *:[i16] } GR16:{ *:[i16] }:$src1) => (MOVBE16rr:{ *:[i16] } GR16:{ *:[i16] }:$src1)
29777 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVBE16rr),
29778 GIR_RootConstrainSelectedInstOperands,
29779 // GIR_Coverage, 61,
29780 GIR_Done,
29781 // Label 2370: @77621
29782 GIM_Try, /*On fail goto*//*Label 2371*/ GIMT_Encode4(77644), // Rule ID 21395 //
29783 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasMOVBE),
29784 // (bswap:{ *:[i16] } GR16:{ *:[i16] }:$src) => (ROL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src, 8:{ *:[i8] })
29785 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ROL16ri),
29786 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29787 GIR_RootToRootCopy, /*OpIdx*/1, // src
29788 GIR_AddImm8, /*InsnID*/0, /*Imm*/8,
29789 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0,
29790 GIR_RootConstrainSelectedInstOperands,
29791 // GIR_Coverage, 21395,
29792 GIR_EraseRootFromParent_Done,
29793 // Label 2371: @77644
29794 GIM_Reject,
29795 // Label 2369: @77645
29796 GIM_Reject,
29797 // Label 2366: @77646
29798 GIM_Try, /*On fail goto*//*Label 2372*/ GIMT_Encode4(77693),
29799 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
29800 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
29801 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID),
29802 GIM_Try, /*On fail goto*//*Label 2373*/ GIMT_Encode4(77677), // Rule ID 5 //
29803 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_Or_NoMOVBE),
29804 // (bswap:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSWAP32r:{ *:[i32] } GR32:{ *:[i32] }:$src)
29805 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::BSWAP32r),
29806 GIR_RootConstrainSelectedInstOperands,
29807 // GIR_Coverage, 5,
29808 GIR_Done,
29809 // Label 2373: @77677
29810 GIM_Try, /*On fail goto*//*Label 2374*/ GIMT_Encode4(77692), // Rule ID 62 //
29811 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasMOVBE_HasNDD_In64BitMode),
29812 // (bswap:{ *:[i32] } GR32:{ *:[i32] }:$src1) => (MOVBE32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1)
29813 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVBE32rr),
29814 GIR_RootConstrainSelectedInstOperands,
29815 // GIR_Coverage, 62,
29816 GIR_Done,
29817 // Label 2374: @77692
29818 GIM_Reject,
29819 // Label 2372: @77693
29820 GIM_Reject,
29821 // Label 2367: @77694
29822 GIM_Try, /*On fail goto*//*Label 2375*/ GIMT_Encode4(77741),
29823 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
29824 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
29825 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID),
29826 GIM_Try, /*On fail goto*//*Label 2376*/ GIMT_Encode4(77725), // Rule ID 6 //
29827 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_Or_NoMOVBE),
29828 // (bswap:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSWAP64r:{ *:[i64] } GR64:{ *:[i64] }:$src)
29829 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::BSWAP64r),
29830 GIR_RootConstrainSelectedInstOperands,
29831 // GIR_Coverage, 6,
29832 GIR_Done,
29833 // Label 2376: @77725
29834 GIM_Try, /*On fail goto*//*Label 2377*/ GIMT_Encode4(77740), // Rule ID 63 //
29835 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasMOVBE_HasNDD_In64BitMode),
29836 // (bswap:{ *:[i64] } GR64:{ *:[i64] }:$src1) => (MOVBE64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1)
29837 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVBE64rr),
29838 GIR_RootConstrainSelectedInstOperands,
29839 // GIR_Coverage, 63,
29840 GIR_Done,
29841 // Label 2377: @77740
29842 GIM_Reject,
29843 // Label 2375: @77741
29844 GIM_Reject,
29845 // Label 2368: @77742
29846 GIM_Reject,
29847 // Label 56: @77743
29848 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2391*/ GIMT_Encode4(78694),
29849 /*GILLT_s16*//*Label 2378*/ GIMT_Encode4(77838),
29850 /*GILLT_s32*//*Label 2379*/ GIMT_Encode4(77884),
29851 /*GILLT_s64*//*Label 2380*/ GIMT_Encode4(78038),
29852 /*GILLT_s80*//*Label 2381*/ GIMT_Encode4(78192), GIMT_Encode4(0), GIMT_Encode4(0),
29853 /*GILLT_v2s64*//*Label 2382*/ GIMT_Encode4(78229), GIMT_Encode4(0),
29854 /*GILLT_v4s32*//*Label 2383*/ GIMT_Encode4(78320),
29855 /*GILLT_v4s64*//*Label 2384*/ GIMT_Encode4(78411), GIMT_Encode4(0),
29856 /*GILLT_v8s16*//*Label 2385*/ GIMT_Encode4(78475),
29857 /*GILLT_v8s32*//*Label 2386*/ GIMT_Encode4(78506),
29858 /*GILLT_v8s64*//*Label 2387*/ GIMT_Encode4(78570), GIMT_Encode4(0), GIMT_Encode4(0),
29859 /*GILLT_v16s16*//*Label 2388*/ GIMT_Encode4(78601),
29860 /*GILLT_v16s32*//*Label 2389*/ GIMT_Encode4(78632), GIMT_Encode4(0), GIMT_Encode4(0),
29861 /*GILLT_v32s16*//*Label 2390*/ GIMT_Encode4(78663),
29862 // Label 2378: @77838
29863 GIM_Try, /*On fail goto*//*Label 2392*/ GIMT_Encode4(77883), // Rule ID 19999 //
29864 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
29865 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
29866 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
29867 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
29868 // (fsqrt:{ *:[f16] } FR16X:{ *:[f16] }:$src) => (VSQRTSHZr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR16X:{ *:[f16] }:$src)
29869 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
29870 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29871 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29872 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29873 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSHZr),
29874 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29875 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
29876 GIR_RootToRootCopy, /*OpIdx*/1, // src
29877 GIR_RootConstrainSelectedInstOperands,
29878 // GIR_Coverage, 19999,
29879 GIR_EraseRootFromParent_Done,
29880 // Label 2392: @77883
29881 GIM_Reject,
29882 // Label 2379: @77884
29883 GIM_Try, /*On fail goto*//*Label 2393*/ GIMT_Encode4(78037),
29884 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
29885 GIM_Try, /*On fail goto*//*Label 2394*/ GIMT_Encode4(77925), // Rule ID 1037 //
29886 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
29887 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
29888 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
29889 // (fsqrt:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (SQRT_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src)
29890 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRT_Fp32),
29891 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
29892 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
29893 GIR_RootConstrainSelectedInstOperands,
29894 // GIR_Coverage, 1037,
29895 GIR_Done,
29896 // Label 2394: @77925
29897 GIM_Try, /*On fail goto*//*Label 2395*/ GIMT_Encode4(77952), // Rule ID 2395 //
29898 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
29899 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
29900 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
29901 // (fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src1) => (SQRTSSr:{ *:[f32] } FR32:{ *:[f32] }:$src1)
29902 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTSSr),
29903 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
29904 GIR_RootConstrainSelectedInstOperands,
29905 // GIR_Coverage, 2395,
29906 GIR_Done,
29907 // Label 2395: @77952
29908 GIM_Try, /*On fail goto*//*Label 2396*/ GIMT_Encode4(77994), // Rule ID 16785 //
29909 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
29910 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
29911 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
29912 // (fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src) => (VSQRTSSr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32:{ *:[f32] }:$src)
29913 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
29914 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29915 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29916 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29917 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSSr),
29918 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29919 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
29920 GIR_RootToRootCopy, /*OpIdx*/1, // src
29921 GIR_RootConstrainSelectedInstOperands,
29922 // GIR_Coverage, 16785,
29923 GIR_EraseRootFromParent_Done,
29924 // Label 2396: @77994
29925 GIM_Try, /*On fail goto*//*Label 2397*/ GIMT_Encode4(78036), // Rule ID 20003 //
29926 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
29927 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
29928 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
29929 // (fsqrt:{ *:[f32] } FR32X:{ *:[f32] }:$src) => (VSQRTSSZr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32X:{ *:[f32] }:$src)
29930 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
29931 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29932 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29933 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29934 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSSZr),
29935 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29936 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
29937 GIR_RootToRootCopy, /*OpIdx*/1, // src
29938 GIR_RootConstrainSelectedInstOperands,
29939 // GIR_Coverage, 20003,
29940 GIR_EraseRootFromParent_Done,
29941 // Label 2397: @78036
29942 GIM_Reject,
29943 // Label 2393: @78037
29944 GIM_Reject,
29945 // Label 2380: @78038
29946 GIM_Try, /*On fail goto*//*Label 2398*/ GIMT_Encode4(78191),
29947 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
29948 GIM_Try, /*On fail goto*//*Label 2399*/ GIMT_Encode4(78079), // Rule ID 1039 //
29949 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
29950 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
29951 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
29952 // (fsqrt:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (SQRT_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src)
29953 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRT_Fp64),
29954 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
29955 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
29956 GIR_RootConstrainSelectedInstOperands,
29957 // GIR_Coverage, 1039,
29958 GIR_Done,
29959 // Label 2399: @78079
29960 GIM_Try, /*On fail goto*//*Label 2400*/ GIMT_Encode4(78106), // Rule ID 2411 //
29961 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
29962 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
29963 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
29964 // (fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src1) => (SQRTSDr:{ *:[f64] } FR64:{ *:[f64] }:$src1)
29965 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTSDr),
29966 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
29967 GIR_RootConstrainSelectedInstOperands,
29968 // GIR_Coverage, 2411,
29969 GIR_Done,
29970 // Label 2400: @78106
29971 GIM_Try, /*On fail goto*//*Label 2401*/ GIMT_Encode4(78148), // Rule ID 16789 //
29972 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
29973 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
29974 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
29975 // (fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src) => (VSQRTSDr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64:{ *:[f64] }:$src)
29976 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
29977 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29978 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29979 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29980 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSDr),
29981 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29982 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
29983 GIR_RootToRootCopy, /*OpIdx*/1, // src
29984 GIR_RootConstrainSelectedInstOperands,
29985 // GIR_Coverage, 16789,
29986 GIR_EraseRootFromParent_Done,
29987 // Label 2401: @78148
29988 GIM_Try, /*On fail goto*//*Label 2402*/ GIMT_Encode4(78190), // Rule ID 20007 //
29989 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
29990 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
29991 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
29992 // (fsqrt:{ *:[f64] } FR64X:{ *:[f64] }:$src) => (VSQRTSDZr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64X:{ *:[f64] }:$src)
29993 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
29994 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
29995 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
29996 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
29997 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSDZr),
29998 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
29999 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
30000 GIR_RootToRootCopy, /*OpIdx*/1, // src
30001 GIR_RootConstrainSelectedInstOperands,
30002 // GIR_Coverage, 20007,
30003 GIR_EraseRootFromParent_Done,
30004 // Label 2402: @78190
30005 GIM_Reject,
30006 // Label 2398: @78191
30007 GIM_Reject,
30008 // Label 2381: @78192
30009 GIM_Try, /*On fail goto*//*Label 2403*/ GIMT_Encode4(78228), // Rule ID 1041 //
30010 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
30011 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
30012 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30013 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30014 // (fsqrt:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (SQRT_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src)
30015 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRT_Fp80),
30016 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
30017 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
30018 GIR_RootConstrainSelectedInstOperands,
30019 // GIR_Coverage, 1041,
30020 GIR_Done,
30021 // Label 2403: @78228
30022 GIM_Reject,
30023 // Label 2382: @78229
30024 GIM_Try, /*On fail goto*//*Label 2404*/ GIMT_Encode4(78319),
30025 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
30026 GIM_Try, /*On fail goto*//*Label 2405*/ GIMT_Encode4(78264), // Rule ID 2415 //
30027 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30028 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30029 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30030 // (fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (VSQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
30031 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDr),
30032 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30033 GIR_RootConstrainSelectedInstOperands,
30034 // GIR_Coverage, 2415,
30035 GIR_Done,
30036 // Label 2405: @78264
30037 GIM_Try, /*On fail goto*//*Label 2406*/ GIMT_Encode4(78291), // Rule ID 2423 //
30038 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
30039 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30040 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30041 // (fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (SQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
30042 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTPDr),
30043 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30044 GIR_RootConstrainSelectedInstOperands,
30045 // GIR_Coverage, 2423,
30046 GIR_Done,
30047 // Label 2406: @78291
30048 GIM_Try, /*On fail goto*//*Label 2407*/ GIMT_Encode4(78318), // Rule ID 11969 //
30049 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
30050 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30051 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30052 // (fsqrt:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) => (VSQRTPDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src)
30053 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDZ128r),
30054 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30055 GIR_RootConstrainSelectedInstOperands,
30056 // GIR_Coverage, 11969,
30057 GIR_Done,
30058 // Label 2407: @78318
30059 GIM_Reject,
30060 // Label 2404: @78319
30061 GIM_Reject,
30062 // Label 2383: @78320
30063 GIM_Try, /*On fail goto*//*Label 2408*/ GIMT_Encode4(78410),
30064 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
30065 GIM_Try, /*On fail goto*//*Label 2409*/ GIMT_Encode4(78355), // Rule ID 2399 //
30066 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30067 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30068 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30069 // (fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (VSQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
30070 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSr),
30071 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30072 GIR_RootConstrainSelectedInstOperands,
30073 // GIR_Coverage, 2399,
30074 GIR_Done,
30075 // Label 2409: @78355
30076 GIM_Try, /*On fail goto*//*Label 2410*/ GIMT_Encode4(78382), // Rule ID 2407 //
30077 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
30078 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30079 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30080 // (fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (SQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
30081 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTPSr),
30082 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30083 GIR_RootConstrainSelectedInstOperands,
30084 // GIR_Coverage, 2407,
30085 GIR_Done,
30086 // Label 2410: @78382
30087 GIM_Try, /*On fail goto*//*Label 2411*/ GIMT_Encode4(78409), // Rule ID 11945 //
30088 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
30089 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30090 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30091 // (fsqrt:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) => (VSQRTPSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src)
30092 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSZ128r),
30093 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30094 GIR_RootConstrainSelectedInstOperands,
30095 // GIR_Coverage, 11945,
30096 GIR_Done,
30097 // Label 2411: @78409
30098 GIM_Reject,
30099 // Label 2408: @78410
30100 GIM_Reject,
30101 // Label 2384: @78411
30102 GIM_Try, /*On fail goto*//*Label 2412*/ GIMT_Encode4(78474),
30103 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
30104 GIM_Try, /*On fail goto*//*Label 2413*/ GIMT_Encode4(78446), // Rule ID 2419 //
30105 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30106 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30107 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30108 // (fsqrt:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) => (VSQRTPDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src)
30109 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDYr),
30110 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30111 GIR_RootConstrainSelectedInstOperands,
30112 // GIR_Coverage, 2419,
30113 GIR_Done,
30114 // Label 2413: @78446
30115 GIM_Try, /*On fail goto*//*Label 2414*/ GIMT_Encode4(78473), // Rule ID 11981 //
30116 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
30117 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30118 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30119 // (fsqrt:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) => (VSQRTPDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src)
30120 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDZ256r),
30121 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30122 GIR_RootConstrainSelectedInstOperands,
30123 // GIR_Coverage, 11981,
30124 GIR_Done,
30125 // Label 2414: @78473
30126 GIM_Reject,
30127 // Label 2412: @78474
30128 GIM_Reject,
30129 // Label 2385: @78475
30130 GIM_Try, /*On fail goto*//*Label 2415*/ GIMT_Encode4(78505), // Rule ID 11897 //
30131 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
30132 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
30133 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30134 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30135 // (fsqrt:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src) => (VSQRTPHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src)
30136 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPHZ128r),
30137 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30138 GIR_RootConstrainSelectedInstOperands,
30139 // GIR_Coverage, 11897,
30140 GIR_Done,
30141 // Label 2415: @78505
30142 GIM_Reject,
30143 // Label 2386: @78506
30144 GIM_Try, /*On fail goto*//*Label 2416*/ GIMT_Encode4(78569),
30145 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
30146 GIM_Try, /*On fail goto*//*Label 2417*/ GIMT_Encode4(78541), // Rule ID 2403 //
30147 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30148 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30149 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30150 // (fsqrt:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) => (VSQRTPSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src)
30151 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSYr),
30152 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30153 GIR_RootConstrainSelectedInstOperands,
30154 // GIR_Coverage, 2403,
30155 GIR_Done,
30156 // Label 2417: @78541
30157 GIM_Try, /*On fail goto*//*Label 2418*/ GIMT_Encode4(78568), // Rule ID 11957 //
30158 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
30159 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30160 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30161 // (fsqrt:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) => (VSQRTPSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src)
30162 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSZ256r),
30163 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30164 GIR_RootConstrainSelectedInstOperands,
30165 // GIR_Coverage, 11957,
30166 GIR_Done,
30167 // Label 2418: @78568
30168 GIM_Reject,
30169 // Label 2416: @78569
30170 GIM_Reject,
30171 // Label 2387: @78570
30172 GIM_Try, /*On fail goto*//*Label 2419*/ GIMT_Encode4(78600), // Rule ID 11933 //
30173 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30174 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
30175 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30176 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30177 // (fsqrt:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) => (VSQRTPDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src)
30178 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDZr),
30179 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30180 GIR_RootConstrainSelectedInstOperands,
30181 // GIR_Coverage, 11933,
30182 GIR_Done,
30183 // Label 2419: @78600
30184 GIM_Reject,
30185 // Label 2388: @78601
30186 GIM_Try, /*On fail goto*//*Label 2420*/ GIMT_Encode4(78631), // Rule ID 11909 //
30187 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
30188 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
30189 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30190 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30191 // (fsqrt:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src) => (VSQRTPHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src)
30192 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPHZ256r),
30193 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30194 GIR_RootConstrainSelectedInstOperands,
30195 // GIR_Coverage, 11909,
30196 GIR_Done,
30197 // Label 2420: @78631
30198 GIM_Reject,
30199 // Label 2389: @78632
30200 GIM_Try, /*On fail goto*//*Label 2421*/ GIMT_Encode4(78662), // Rule ID 11921 //
30201 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30202 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
30203 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30204 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30205 // (fsqrt:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) => (VSQRTPSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src)
30206 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSZr),
30207 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30208 GIR_RootConstrainSelectedInstOperands,
30209 // GIR_Coverage, 11921,
30210 GIR_Done,
30211 // Label 2421: @78662
30212 GIM_Reject,
30213 // Label 2390: @78663
30214 GIM_Try, /*On fail goto*//*Label 2422*/ GIMT_Encode4(78693), // Rule ID 11885 //
30215 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
30216 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
30217 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30218 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30219 // (fsqrt:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src) => (VSQRTPHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src)
30220 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPHZr),
30221 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30222 GIR_RootConstrainSelectedInstOperands,
30223 // GIR_Coverage, 11885,
30224 GIR_Done,
30225 // Label 2422: @78693
30226 GIM_Reject,
30227 // Label 2391: @78694
30228 GIM_Reject,
30229 // Label 57: @78695
30230 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2436*/ GIMT_Encode4(79710),
30231 /*GILLT_s16*//*Label 2423*/ GIMT_Encode4(78790),
30232 /*GILLT_s32*//*Label 2424*/ GIMT_Encode4(78828),
30233 /*GILLT_s64*//*Label 2425*/ GIMT_Encode4(78971),
30234 /*GILLT_s80*//*Label 2426*/ GIMT_Encode4(79114), GIMT_Encode4(0), GIMT_Encode4(0),
30235 /*GILLT_v2s64*//*Label 2427*/ GIMT_Encode4(79158), GIMT_Encode4(0),
30236 /*GILLT_v4s32*//*Label 2428*/ GIMT_Encode4(79264),
30237 /*GILLT_v4s64*//*Label 2429*/ GIMT_Encode4(79370), GIMT_Encode4(0),
30238 /*GILLT_v8s16*//*Label 2430*/ GIMT_Encode4(79445),
30239 /*GILLT_v8s32*//*Label 2431*/ GIMT_Encode4(79483),
30240 /*GILLT_v8s64*//*Label 2432*/ GIMT_Encode4(79558), GIMT_Encode4(0), GIMT_Encode4(0),
30241 /*GILLT_v16s16*//*Label 2433*/ GIMT_Encode4(79596),
30242 /*GILLT_v16s32*//*Label 2434*/ GIMT_Encode4(79634), GIMT_Encode4(0), GIMT_Encode4(0),
30243 /*GILLT_v32s16*//*Label 2435*/ GIMT_Encode4(79672),
30244 // Label 2423: @78790
30245 GIM_Try, /*On fail goto*//*Label 2437*/ GIMT_Encode4(78827), // Rule ID 5904 //
30246 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
30247 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
30248 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
30249 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
30250 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
30251 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
30252 // (strict_fadd:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VADDSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
30253 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSHZrr),
30254 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30255 GIR_RootConstrainSelectedInstOperands,
30256 // GIR_Coverage, 5904,
30257 GIR_Done,
30258 // Label 2437: @78827
30259 GIM_Reject,
30260 // Label 2424: @78828
30261 GIM_Try, /*On fail goto*//*Label 2438*/ GIMT_Encode4(78970),
30262 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
30263 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
30264 GIM_Try, /*On fail goto*//*Label 2439*/ GIMT_Encode4(78876), // Rule ID 874 //
30265 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
30266 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
30267 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
30268 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
30269 // (strict_fadd:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (ADD_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
30270 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD_Fp32),
30271 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
30272 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
30273 GIR_RootConstrainSelectedInstOperands,
30274 // GIR_Coverage, 874,
30275 GIR_Done,
30276 // Label 2439: @78876
30277 GIM_Try, /*On fail goto*//*Label 2440*/ GIMT_Encode4(78907), // Rule ID 2146 //
30278 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
30279 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30280 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30281 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30282 // (strict_fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
30283 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSSrr),
30284 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30285 GIR_RootConstrainSelectedInstOperands,
30286 // GIR_Coverage, 2146,
30287 GIR_Done,
30288 // Label 2440: @78907
30289 GIM_Try, /*On fail goto*//*Label 2441*/ GIMT_Encode4(78938), // Rule ID 2154 //
30290 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
30291 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30292 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30293 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30294 // (strict_fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (ADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
30295 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDSSrr),
30296 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30297 GIR_RootConstrainSelectedInstOperands,
30298 // GIR_Coverage, 2154,
30299 GIR_Done,
30300 // Label 2441: @78938
30301 GIM_Try, /*On fail goto*//*Label 2442*/ GIMT_Encode4(78969), // Rule ID 5866 //
30302 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30303 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
30304 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
30305 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
30306 // (strict_fadd:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VADDSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
30307 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSSZrr),
30308 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30309 GIR_RootConstrainSelectedInstOperands,
30310 // GIR_Coverage, 5866,
30311 GIR_Done,
30312 // Label 2442: @78969
30313 GIM_Reject,
30314 // Label 2438: @78970
30315 GIM_Reject,
30316 // Label 2425: @78971
30317 GIM_Try, /*On fail goto*//*Label 2443*/ GIMT_Encode4(79113),
30318 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
30319 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
30320 GIM_Try, /*On fail goto*//*Label 2444*/ GIMT_Encode4(79019), // Rule ID 876 //
30321 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
30322 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
30323 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
30324 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
30325 // (strict_fadd:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (ADD_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
30326 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD_Fp64),
30327 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
30328 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
30329 GIR_RootConstrainSelectedInstOperands,
30330 // GIR_Coverage, 876,
30331 GIR_Done,
30332 // Label 2444: @79019
30333 GIM_Try, /*On fail goto*//*Label 2445*/ GIMT_Encode4(79050), // Rule ID 2150 //
30334 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
30335 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30336 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30337 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30338 // (strict_fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
30339 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSDrr),
30340 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30341 GIR_RootConstrainSelectedInstOperands,
30342 // GIR_Coverage, 2150,
30343 GIR_Done,
30344 // Label 2445: @79050
30345 GIM_Try, /*On fail goto*//*Label 2446*/ GIMT_Encode4(79081), // Rule ID 2158 //
30346 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
30347 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30348 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30349 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30350 // (strict_fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (ADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
30351 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDSDrr),
30352 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30353 GIR_RootConstrainSelectedInstOperands,
30354 // GIR_Coverage, 2158,
30355 GIR_Done,
30356 // Label 2446: @79081
30357 GIM_Try, /*On fail goto*//*Label 2447*/ GIMT_Encode4(79112), // Rule ID 5885 //
30358 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30359 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
30360 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
30361 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
30362 // (strict_fadd:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VADDSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
30363 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDSDZrr),
30364 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30365 GIR_RootConstrainSelectedInstOperands,
30366 // GIR_Coverage, 5885,
30367 GIR_Done,
30368 // Label 2447: @79112
30369 GIM_Reject,
30370 // Label 2443: @79113
30371 GIM_Reject,
30372 // Label 2426: @79114
30373 GIM_Try, /*On fail goto*//*Label 2448*/ GIMT_Encode4(79157), // Rule ID 878 //
30374 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
30375 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
30376 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
30377 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30378 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30379 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30380 // (strict_fadd:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (ADD_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
30381 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD_Fp80),
30382 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
30383 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
30384 GIR_RootConstrainSelectedInstOperands,
30385 // GIR_Coverage, 878,
30386 GIR_Done,
30387 // Label 2448: @79157
30388 GIM_Reject,
30389 // Label 2427: @79158
30390 GIM_Try, /*On fail goto*//*Label 2449*/ GIMT_Encode4(79263),
30391 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
30392 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
30393 GIM_Try, /*On fail goto*//*Label 2450*/ GIMT_Encode4(79200), // Rule ID 2126 //
30394 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30395 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30396 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30397 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30398 // (strict_fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
30399 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDrr),
30400 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30401 GIR_RootConstrainSelectedInstOperands,
30402 // GIR_Coverage, 2126,
30403 GIR_Done,
30404 // Label 2450: @79200
30405 GIM_Try, /*On fail goto*//*Label 2451*/ GIMT_Encode4(79231), // Rule ID 2142 //
30406 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
30407 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30408 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30409 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30410 // (strict_fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (ADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
30411 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDPDrr),
30412 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30413 GIR_RootConstrainSelectedInstOperands,
30414 // GIR_Coverage, 2142,
30415 GIR_Done,
30416 // Label 2451: @79231
30417 GIM_Try, /*On fail goto*//*Label 2452*/ GIMT_Encode4(79262), // Rule ID 6244 //
30418 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30419 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30420 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30421 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30422 // (strict_fadd:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VADDPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
30423 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDZ128rr),
30424 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30425 GIR_RootConstrainSelectedInstOperands,
30426 // GIR_Coverage, 6244,
30427 GIR_Done,
30428 // Label 2452: @79262
30429 GIM_Reject,
30430 // Label 2449: @79263
30431 GIM_Reject,
30432 // Label 2428: @79264
30433 GIM_Try, /*On fail goto*//*Label 2453*/ GIMT_Encode4(79369),
30434 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
30435 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
30436 GIM_Try, /*On fail goto*//*Label 2454*/ GIMT_Encode4(79306), // Rule ID 2122 //
30437 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30438 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30439 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30440 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30441 // (strict_fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
30442 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSrr),
30443 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30444 GIR_RootConstrainSelectedInstOperands,
30445 // GIR_Coverage, 2122,
30446 GIR_Done,
30447 // Label 2454: @79306
30448 GIM_Try, /*On fail goto*//*Label 2455*/ GIMT_Encode4(79337), // Rule ID 2138 //
30449 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
30450 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30451 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30452 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30453 // (strict_fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (ADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
30454 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADDPSrr),
30455 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30456 GIR_RootConstrainSelectedInstOperands,
30457 // GIR_Coverage, 2138,
30458 GIR_Done,
30459 // Label 2455: @79337
30460 GIM_Try, /*On fail goto*//*Label 2456*/ GIMT_Encode4(79368), // Rule ID 6220 //
30461 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30462 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30463 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30464 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30465 // (strict_fadd:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VADDPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
30466 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSZ128rr),
30467 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30468 GIR_RootConstrainSelectedInstOperands,
30469 // GIR_Coverage, 6220,
30470 GIR_Done,
30471 // Label 2456: @79368
30472 GIM_Reject,
30473 // Label 2453: @79369
30474 GIM_Reject,
30475 // Label 2429: @79370
30476 GIM_Try, /*On fail goto*//*Label 2457*/ GIMT_Encode4(79444),
30477 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
30478 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
30479 GIM_Try, /*On fail goto*//*Label 2458*/ GIMT_Encode4(79412), // Rule ID 2134 //
30480 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30481 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30482 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30483 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30484 // (strict_fadd:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VADDPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
30485 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDYrr),
30486 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30487 GIR_RootConstrainSelectedInstOperands,
30488 // GIR_Coverage, 2134,
30489 GIR_Done,
30490 // Label 2458: @79412
30491 GIM_Try, /*On fail goto*//*Label 2459*/ GIMT_Encode4(79443), // Rule ID 6256 //
30492 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30493 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30494 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30495 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30496 // (strict_fadd:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VADDPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
30497 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDZ256rr),
30498 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30499 GIR_RootConstrainSelectedInstOperands,
30500 // GIR_Coverage, 6256,
30501 GIR_Done,
30502 // Label 2459: @79443
30503 GIM_Reject,
30504 // Label 2457: @79444
30505 GIM_Reject,
30506 // Label 2430: @79445
30507 GIM_Try, /*On fail goto*//*Label 2460*/ GIMT_Encode4(79482), // Rule ID 6280 //
30508 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
30509 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
30510 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
30511 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30512 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30513 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30514 // (strict_fadd:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VADDPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
30515 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPHZ128rr),
30516 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30517 GIR_RootConstrainSelectedInstOperands,
30518 // GIR_Coverage, 6280,
30519 GIR_Done,
30520 // Label 2460: @79482
30521 GIM_Reject,
30522 // Label 2431: @79483
30523 GIM_Try, /*On fail goto*//*Label 2461*/ GIMT_Encode4(79557),
30524 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
30525 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
30526 GIM_Try, /*On fail goto*//*Label 2462*/ GIMT_Encode4(79525), // Rule ID 2130 //
30527 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30528 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30529 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30530 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30531 // (strict_fadd:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VADDPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
30532 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSYrr),
30533 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30534 GIR_RootConstrainSelectedInstOperands,
30535 // GIR_Coverage, 2130,
30536 GIR_Done,
30537 // Label 2462: @79525
30538 GIM_Try, /*On fail goto*//*Label 2463*/ GIMT_Encode4(79556), // Rule ID 6232 //
30539 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30540 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30541 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30542 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30543 // (strict_fadd:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VADDPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
30544 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSZ256rr),
30545 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30546 GIR_RootConstrainSelectedInstOperands,
30547 // GIR_Coverage, 6232,
30548 GIR_Done,
30549 // Label 2463: @79556
30550 GIM_Reject,
30551 // Label 2461: @79557
30552 GIM_Reject,
30553 // Label 2432: @79558
30554 GIM_Try, /*On fail goto*//*Label 2464*/ GIMT_Encode4(79595), // Rule ID 6208 //
30555 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30556 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
30557 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
30558 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30559 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30560 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30561 // (strict_fadd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
30562 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPDZrr),
30563 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30564 GIR_RootConstrainSelectedInstOperands,
30565 // GIR_Coverage, 6208,
30566 GIR_Done,
30567 // Label 2464: @79595
30568 GIM_Reject,
30569 // Label 2433: @79596
30570 GIM_Try, /*On fail goto*//*Label 2465*/ GIMT_Encode4(79633), // Rule ID 6292 //
30571 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
30572 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
30573 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
30574 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30575 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30576 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30577 // (strict_fadd:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VADDPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
30578 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPHZ256rr),
30579 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30580 GIR_RootConstrainSelectedInstOperands,
30581 // GIR_Coverage, 6292,
30582 GIR_Done,
30583 // Label 2465: @79633
30584 GIM_Reject,
30585 // Label 2434: @79634
30586 GIM_Try, /*On fail goto*//*Label 2466*/ GIMT_Encode4(79671), // Rule ID 6196 //
30587 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30588 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
30589 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
30590 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30591 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30592 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30593 // (strict_fadd:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VADDPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
30594 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPSZrr),
30595 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30596 GIR_RootConstrainSelectedInstOperands,
30597 // GIR_Coverage, 6196,
30598 GIR_Done,
30599 // Label 2466: @79671
30600 GIM_Reject,
30601 // Label 2435: @79672
30602 GIM_Try, /*On fail goto*//*Label 2467*/ GIMT_Encode4(79709), // Rule ID 6268 //
30603 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
30604 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
30605 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
30606 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30607 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30608 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30609 // (strict_fadd:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VADDPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
30610 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VADDPHZrr),
30611 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30612 GIR_RootConstrainSelectedInstOperands,
30613 // GIR_Coverage, 6268,
30614 GIR_Done,
30615 // Label 2467: @79709
30616 GIM_Reject,
30617 // Label 2436: @79710
30618 GIM_Reject,
30619 // Label 58: @79711
30620 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2481*/ GIMT_Encode4(80726),
30621 /*GILLT_s16*//*Label 2468*/ GIMT_Encode4(79806),
30622 /*GILLT_s32*//*Label 2469*/ GIMT_Encode4(79844),
30623 /*GILLT_s64*//*Label 2470*/ GIMT_Encode4(79987),
30624 /*GILLT_s80*//*Label 2471*/ GIMT_Encode4(80130), GIMT_Encode4(0), GIMT_Encode4(0),
30625 /*GILLT_v2s64*//*Label 2472*/ GIMT_Encode4(80174), GIMT_Encode4(0),
30626 /*GILLT_v4s32*//*Label 2473*/ GIMT_Encode4(80280),
30627 /*GILLT_v4s64*//*Label 2474*/ GIMT_Encode4(80386), GIMT_Encode4(0),
30628 /*GILLT_v8s16*//*Label 2475*/ GIMT_Encode4(80461),
30629 /*GILLT_v8s32*//*Label 2476*/ GIMT_Encode4(80499),
30630 /*GILLT_v8s64*//*Label 2477*/ GIMT_Encode4(80574), GIMT_Encode4(0), GIMT_Encode4(0),
30631 /*GILLT_v16s16*//*Label 2478*/ GIMT_Encode4(80612),
30632 /*GILLT_v16s32*//*Label 2479*/ GIMT_Encode4(80650), GIMT_Encode4(0), GIMT_Encode4(0),
30633 /*GILLT_v32s16*//*Label 2480*/ GIMT_Encode4(80688),
30634 // Label 2468: @79806
30635 GIM_Try, /*On fail goto*//*Label 2482*/ GIMT_Encode4(79843), // Rule ID 6018 //
30636 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
30637 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
30638 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
30639 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
30640 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
30641 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
30642 // (strict_fsub:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VSUBSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
30643 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSHZrr),
30644 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30645 GIR_RootConstrainSelectedInstOperands,
30646 // GIR_Coverage, 6018,
30647 GIR_Done,
30648 // Label 2482: @79843
30649 GIM_Reject,
30650 // Label 2469: @79844
30651 GIM_Try, /*On fail goto*//*Label 2483*/ GIMT_Encode4(79986),
30652 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
30653 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
30654 GIM_Try, /*On fail goto*//*Label 2484*/ GIMT_Encode4(79892), // Rule ID 880 //
30655 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
30656 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
30657 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
30658 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
30659 // (strict_fsub:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (SUB_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
30660 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB_Fp32),
30661 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
30662 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
30663 GIR_RootConstrainSelectedInstOperands,
30664 // GIR_Coverage, 880,
30665 GIR_Done,
30666 // Label 2484: @79892
30667 GIM_Try, /*On fail goto*//*Label 2485*/ GIMT_Encode4(79923), // Rule ID 2226 //
30668 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
30669 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30670 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30671 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30672 // (strict_fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VSUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
30673 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSSrr),
30674 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30675 GIR_RootConstrainSelectedInstOperands,
30676 // GIR_Coverage, 2226,
30677 GIR_Done,
30678 // Label 2485: @79923
30679 GIM_Try, /*On fail goto*//*Label 2486*/ GIMT_Encode4(79954), // Rule ID 2234 //
30680 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
30681 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30682 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30683 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
30684 // (strict_fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (SUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
30685 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBSSrr),
30686 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30687 GIR_RootConstrainSelectedInstOperands,
30688 // GIR_Coverage, 2234,
30689 GIR_Done,
30690 // Label 2486: @79954
30691 GIM_Try, /*On fail goto*//*Label 2487*/ GIMT_Encode4(79985), // Rule ID 5980 //
30692 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30693 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
30694 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
30695 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
30696 // (strict_fsub:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VSUBSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
30697 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSSZrr),
30698 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30699 GIR_RootConstrainSelectedInstOperands,
30700 // GIR_Coverage, 5980,
30701 GIR_Done,
30702 // Label 2487: @79985
30703 GIM_Reject,
30704 // Label 2483: @79986
30705 GIM_Reject,
30706 // Label 2470: @79987
30707 GIM_Try, /*On fail goto*//*Label 2488*/ GIMT_Encode4(80129),
30708 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
30709 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
30710 GIM_Try, /*On fail goto*//*Label 2489*/ GIMT_Encode4(80035), // Rule ID 882 //
30711 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
30712 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
30713 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
30714 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
30715 // (strict_fsub:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (SUB_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
30716 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB_Fp64),
30717 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
30718 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
30719 GIR_RootConstrainSelectedInstOperands,
30720 // GIR_Coverage, 882,
30721 GIR_Done,
30722 // Label 2489: @80035
30723 GIM_Try, /*On fail goto*//*Label 2490*/ GIMT_Encode4(80066), // Rule ID 2230 //
30724 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
30725 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30726 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30727 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30728 // (strict_fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VSUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
30729 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSDrr),
30730 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30731 GIR_RootConstrainSelectedInstOperands,
30732 // GIR_Coverage, 2230,
30733 GIR_Done,
30734 // Label 2490: @80066
30735 GIM_Try, /*On fail goto*//*Label 2491*/ GIMT_Encode4(80097), // Rule ID 2238 //
30736 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
30737 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30738 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30739 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
30740 // (strict_fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (SUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
30741 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBSDrr),
30742 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30743 GIR_RootConstrainSelectedInstOperands,
30744 // GIR_Coverage, 2238,
30745 GIR_Done,
30746 // Label 2491: @80097
30747 GIM_Try, /*On fail goto*//*Label 2492*/ GIMT_Encode4(80128), // Rule ID 5999 //
30748 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30749 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
30750 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
30751 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
30752 // (strict_fsub:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VSUBSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
30753 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBSDZrr),
30754 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30755 GIR_RootConstrainSelectedInstOperands,
30756 // GIR_Coverage, 5999,
30757 GIR_Done,
30758 // Label 2492: @80128
30759 GIM_Reject,
30760 // Label 2488: @80129
30761 GIM_Reject,
30762 // Label 2471: @80130
30763 GIM_Try, /*On fail goto*//*Label 2493*/ GIMT_Encode4(80173), // Rule ID 884 //
30764 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
30765 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
30766 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
30767 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30768 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30769 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
30770 // (strict_fsub:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (SUB_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
30771 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB_Fp80),
30772 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
30773 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
30774 GIR_RootConstrainSelectedInstOperands,
30775 // GIR_Coverage, 884,
30776 GIR_Done,
30777 // Label 2493: @80173
30778 GIM_Reject,
30779 // Label 2472: @80174
30780 GIM_Try, /*On fail goto*//*Label 2494*/ GIMT_Encode4(80279),
30781 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
30782 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
30783 GIM_Try, /*On fail goto*//*Label 2495*/ GIMT_Encode4(80216), // Rule ID 2206 //
30784 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30785 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30786 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30787 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30788 // (strict_fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VSUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
30789 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDrr),
30790 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30791 GIR_RootConstrainSelectedInstOperands,
30792 // GIR_Coverage, 2206,
30793 GIR_Done,
30794 // Label 2495: @80216
30795 GIM_Try, /*On fail goto*//*Label 2496*/ GIMT_Encode4(80247), // Rule ID 2222 //
30796 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
30797 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30798 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30799 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30800 // (strict_fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (SUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
30801 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBPDrr),
30802 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30803 GIR_RootConstrainSelectedInstOperands,
30804 // GIR_Coverage, 2222,
30805 GIR_Done,
30806 // Label 2496: @80247
30807 GIM_Try, /*On fail goto*//*Label 2497*/ GIMT_Encode4(80278), // Rule ID 6478 //
30808 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30809 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30810 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30811 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30812 // (strict_fsub:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VSUBPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
30813 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDZ128rr),
30814 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30815 GIR_RootConstrainSelectedInstOperands,
30816 // GIR_Coverage, 6478,
30817 GIR_Done,
30818 // Label 2497: @80278
30819 GIM_Reject,
30820 // Label 2494: @80279
30821 GIM_Reject,
30822 // Label 2473: @80280
30823 GIM_Try, /*On fail goto*//*Label 2498*/ GIMT_Encode4(80385),
30824 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
30825 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
30826 GIM_Try, /*On fail goto*//*Label 2499*/ GIMT_Encode4(80322), // Rule ID 2202 //
30827 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30828 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30829 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30830 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30831 // (strict_fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VSUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
30832 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSrr),
30833 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30834 GIR_RootConstrainSelectedInstOperands,
30835 // GIR_Coverage, 2202,
30836 GIR_Done,
30837 // Label 2499: @80322
30838 GIM_Try, /*On fail goto*//*Label 2500*/ GIMT_Encode4(80353), // Rule ID 2218 //
30839 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
30840 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30841 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30842 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
30843 // (strict_fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (SUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
30844 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUBPSrr),
30845 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30846 GIR_RootConstrainSelectedInstOperands,
30847 // GIR_Coverage, 2218,
30848 GIR_Done,
30849 // Label 2500: @80353
30850 GIM_Try, /*On fail goto*//*Label 2501*/ GIMT_Encode4(80384), // Rule ID 6454 //
30851 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30852 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30853 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30854 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30855 // (strict_fsub:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VSUBPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
30856 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSZ128rr),
30857 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30858 GIR_RootConstrainSelectedInstOperands,
30859 // GIR_Coverage, 6454,
30860 GIR_Done,
30861 // Label 2501: @80384
30862 GIM_Reject,
30863 // Label 2498: @80385
30864 GIM_Reject,
30865 // Label 2474: @80386
30866 GIM_Try, /*On fail goto*//*Label 2502*/ GIMT_Encode4(80460),
30867 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
30868 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
30869 GIM_Try, /*On fail goto*//*Label 2503*/ GIMT_Encode4(80428), // Rule ID 2214 //
30870 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30871 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30872 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30873 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30874 // (strict_fsub:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VSUBPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
30875 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDYrr),
30876 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30877 GIR_RootConstrainSelectedInstOperands,
30878 // GIR_Coverage, 2214,
30879 GIR_Done,
30880 // Label 2503: @80428
30881 GIM_Try, /*On fail goto*//*Label 2504*/ GIMT_Encode4(80459), // Rule ID 6490 //
30882 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30883 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30884 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30885 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30886 // (strict_fsub:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VSUBPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
30887 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDZ256rr),
30888 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30889 GIR_RootConstrainSelectedInstOperands,
30890 // GIR_Coverage, 6490,
30891 GIR_Done,
30892 // Label 2504: @80459
30893 GIM_Reject,
30894 // Label 2502: @80460
30895 GIM_Reject,
30896 // Label 2475: @80461
30897 GIM_Try, /*On fail goto*//*Label 2505*/ GIMT_Encode4(80498), // Rule ID 6514 //
30898 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
30899 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
30900 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
30901 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30902 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30903 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
30904 // (strict_fsub:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VSUBPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
30905 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPHZ128rr),
30906 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30907 GIR_RootConstrainSelectedInstOperands,
30908 // GIR_Coverage, 6514,
30909 GIR_Done,
30910 // Label 2505: @80498
30911 GIM_Reject,
30912 // Label 2476: @80499
30913 GIM_Try, /*On fail goto*//*Label 2506*/ GIMT_Encode4(80573),
30914 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
30915 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
30916 GIM_Try, /*On fail goto*//*Label 2507*/ GIMT_Encode4(80541), // Rule ID 2210 //
30917 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
30918 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30919 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30920 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
30921 // (strict_fsub:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VSUBPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
30922 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSYrr),
30923 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30924 GIR_RootConstrainSelectedInstOperands,
30925 // GIR_Coverage, 2210,
30926 GIR_Done,
30927 // Label 2507: @80541
30928 GIM_Try, /*On fail goto*//*Label 2508*/ GIMT_Encode4(80572), // Rule ID 6466 //
30929 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
30930 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30931 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30932 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30933 // (strict_fsub:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VSUBPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
30934 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSZ256rr),
30935 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30936 GIR_RootConstrainSelectedInstOperands,
30937 // GIR_Coverage, 6466,
30938 GIR_Done,
30939 // Label 2508: @80572
30940 GIM_Reject,
30941 // Label 2506: @80573
30942 GIM_Reject,
30943 // Label 2477: @80574
30944 GIM_Try, /*On fail goto*//*Label 2509*/ GIMT_Encode4(80611), // Rule ID 6442 //
30945 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30946 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
30947 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
30948 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30949 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30950 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30951 // (strict_fsub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
30952 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPDZrr),
30953 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30954 GIR_RootConstrainSelectedInstOperands,
30955 // GIR_Coverage, 6442,
30956 GIR_Done,
30957 // Label 2509: @80611
30958 GIM_Reject,
30959 // Label 2478: @80612
30960 GIM_Try, /*On fail goto*//*Label 2510*/ GIMT_Encode4(80649), // Rule ID 6526 //
30961 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
30962 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
30963 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
30964 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30965 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30966 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
30967 // (strict_fsub:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VSUBPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
30968 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPHZ256rr),
30969 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30970 GIR_RootConstrainSelectedInstOperands,
30971 // GIR_Coverage, 6526,
30972 GIR_Done,
30973 // Label 2510: @80649
30974 GIM_Reject,
30975 // Label 2479: @80650
30976 GIM_Try, /*On fail goto*//*Label 2511*/ GIMT_Encode4(80687), // Rule ID 6430 //
30977 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
30978 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
30979 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
30980 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30981 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30982 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30983 // (strict_fsub:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VSUBPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
30984 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPSZrr),
30985 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
30986 GIR_RootConstrainSelectedInstOperands,
30987 // GIR_Coverage, 6430,
30988 GIR_Done,
30989 // Label 2511: @80687
30990 GIM_Reject,
30991 // Label 2480: @80688
30992 GIM_Try, /*On fail goto*//*Label 2512*/ GIMT_Encode4(80725), // Rule ID 6502 //
30993 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
30994 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
30995 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
30996 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30997 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30998 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
30999 // (strict_fsub:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VSUBPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
31000 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSUBPHZrr),
31001 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31002 GIR_RootConstrainSelectedInstOperands,
31003 // GIR_Coverage, 6502,
31004 GIR_Done,
31005 // Label 2512: @80725
31006 GIM_Reject,
31007 // Label 2481: @80726
31008 GIM_Reject,
31009 // Label 59: @80727
31010 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2526*/ GIMT_Encode4(81742),
31011 /*GILLT_s16*//*Label 2513*/ GIMT_Encode4(80822),
31012 /*GILLT_s32*//*Label 2514*/ GIMT_Encode4(80860),
31013 /*GILLT_s64*//*Label 2515*/ GIMT_Encode4(81003),
31014 /*GILLT_s80*//*Label 2516*/ GIMT_Encode4(81146), GIMT_Encode4(0), GIMT_Encode4(0),
31015 /*GILLT_v2s64*//*Label 2517*/ GIMT_Encode4(81190), GIMT_Encode4(0),
31016 /*GILLT_v4s32*//*Label 2518*/ GIMT_Encode4(81296),
31017 /*GILLT_v4s64*//*Label 2519*/ GIMT_Encode4(81402), GIMT_Encode4(0),
31018 /*GILLT_v8s16*//*Label 2520*/ GIMT_Encode4(81477),
31019 /*GILLT_v8s32*//*Label 2521*/ GIMT_Encode4(81515),
31020 /*GILLT_v8s64*//*Label 2522*/ GIMT_Encode4(81590), GIMT_Encode4(0), GIMT_Encode4(0),
31021 /*GILLT_v16s16*//*Label 2523*/ GIMT_Encode4(81628),
31022 /*GILLT_v16s32*//*Label 2524*/ GIMT_Encode4(81666), GIMT_Encode4(0), GIMT_Encode4(0),
31023 /*GILLT_v32s16*//*Label 2525*/ GIMT_Encode4(81704),
31024 // Label 2513: @80822
31025 GIM_Try, /*On fail goto*//*Label 2527*/ GIMT_Encode4(80859), // Rule ID 5961 //
31026 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
31027 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
31028 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
31029 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31030 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31031 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31032 // (strict_fmul:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VMULSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
31033 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSHZrr),
31034 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31035 GIR_RootConstrainSelectedInstOperands,
31036 // GIR_Coverage, 5961,
31037 GIR_Done,
31038 // Label 2527: @80859
31039 GIM_Reject,
31040 // Label 2514: @80860
31041 GIM_Try, /*On fail goto*//*Label 2528*/ GIMT_Encode4(81002),
31042 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
31043 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
31044 GIM_Try, /*On fail goto*//*Label 2529*/ GIMT_Encode4(80908), // Rule ID 886 //
31045 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
31046 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
31047 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
31048 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
31049 // (strict_fmul:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (MUL_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
31050 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MUL_Fp32),
31051 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
31052 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
31053 GIR_RootConstrainSelectedInstOperands,
31054 // GIR_Coverage, 886,
31055 GIR_Done,
31056 // Label 2529: @80908
31057 GIM_Try, /*On fail goto*//*Label 2530*/ GIMT_Encode4(80939), // Rule ID 2186 //
31058 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
31059 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31060 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31061 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31062 // (strict_fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VMULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
31063 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSSrr),
31064 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31065 GIR_RootConstrainSelectedInstOperands,
31066 // GIR_Coverage, 2186,
31067 GIR_Done,
31068 // Label 2530: @80939
31069 GIM_Try, /*On fail goto*//*Label 2531*/ GIMT_Encode4(80970), // Rule ID 2194 //
31070 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
31071 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31072 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31073 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31074 // (strict_fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (MULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
31075 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULSSrr),
31076 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31077 GIR_RootConstrainSelectedInstOperands,
31078 // GIR_Coverage, 2194,
31079 GIR_Done,
31080 // Label 2531: @80970
31081 GIM_Try, /*On fail goto*//*Label 2532*/ GIMT_Encode4(81001), // Rule ID 5923 //
31082 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31083 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31084 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31085 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31086 // (strict_fmul:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VMULSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
31087 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSSZrr),
31088 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31089 GIR_RootConstrainSelectedInstOperands,
31090 // GIR_Coverage, 5923,
31091 GIR_Done,
31092 // Label 2532: @81001
31093 GIM_Reject,
31094 // Label 2528: @81002
31095 GIM_Reject,
31096 // Label 2515: @81003
31097 GIM_Try, /*On fail goto*//*Label 2533*/ GIMT_Encode4(81145),
31098 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
31099 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
31100 GIM_Try, /*On fail goto*//*Label 2534*/ GIMT_Encode4(81051), // Rule ID 888 //
31101 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
31102 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
31103 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
31104 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
31105 // (strict_fmul:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (MUL_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
31106 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MUL_Fp64),
31107 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
31108 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
31109 GIR_RootConstrainSelectedInstOperands,
31110 // GIR_Coverage, 888,
31111 GIR_Done,
31112 // Label 2534: @81051
31113 GIM_Try, /*On fail goto*//*Label 2535*/ GIMT_Encode4(81082), // Rule ID 2190 //
31114 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
31115 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31116 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31117 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31118 // (strict_fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VMULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
31119 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSDrr),
31120 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31121 GIR_RootConstrainSelectedInstOperands,
31122 // GIR_Coverage, 2190,
31123 GIR_Done,
31124 // Label 2535: @81082
31125 GIM_Try, /*On fail goto*//*Label 2536*/ GIMT_Encode4(81113), // Rule ID 2198 //
31126 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
31127 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31128 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31129 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31130 // (strict_fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (MULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
31131 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULSDrr),
31132 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31133 GIR_RootConstrainSelectedInstOperands,
31134 // GIR_Coverage, 2198,
31135 GIR_Done,
31136 // Label 2536: @81113
31137 GIM_Try, /*On fail goto*//*Label 2537*/ GIMT_Encode4(81144), // Rule ID 5942 //
31138 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31139 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31140 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31141 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31142 // (strict_fmul:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VMULSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
31143 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULSDZrr),
31144 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31145 GIR_RootConstrainSelectedInstOperands,
31146 // GIR_Coverage, 5942,
31147 GIR_Done,
31148 // Label 2537: @81144
31149 GIM_Reject,
31150 // Label 2533: @81145
31151 GIM_Reject,
31152 // Label 2516: @81146
31153 GIM_Try, /*On fail goto*//*Label 2538*/ GIMT_Encode4(81189), // Rule ID 890 //
31154 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
31155 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
31156 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
31157 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
31158 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
31159 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
31160 // (strict_fmul:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (MUL_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
31161 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MUL_Fp80),
31162 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
31163 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
31164 GIR_RootConstrainSelectedInstOperands,
31165 // GIR_Coverage, 890,
31166 GIR_Done,
31167 // Label 2538: @81189
31168 GIM_Reject,
31169 // Label 2517: @81190
31170 GIM_Try, /*On fail goto*//*Label 2539*/ GIMT_Encode4(81295),
31171 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
31172 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
31173 GIM_Try, /*On fail goto*//*Label 2540*/ GIMT_Encode4(81232), // Rule ID 2166 //
31174 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31175 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31176 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31177 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31178 // (strict_fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VMULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
31179 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDrr),
31180 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31181 GIR_RootConstrainSelectedInstOperands,
31182 // GIR_Coverage, 2166,
31183 GIR_Done,
31184 // Label 2540: @81232
31185 GIM_Try, /*On fail goto*//*Label 2541*/ GIMT_Encode4(81263), // Rule ID 2182 //
31186 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
31187 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31188 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31189 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31190 // (strict_fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (MULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
31191 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULPDrr),
31192 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31193 GIR_RootConstrainSelectedInstOperands,
31194 // GIR_Coverage, 2182,
31195 GIR_Done,
31196 // Label 2541: @81263
31197 GIM_Try, /*On fail goto*//*Label 2542*/ GIMT_Encode4(81294), // Rule ID 6361 //
31198 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31199 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31200 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31201 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31202 // (strict_fmul:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VMULPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
31203 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDZ128rr),
31204 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31205 GIR_RootConstrainSelectedInstOperands,
31206 // GIR_Coverage, 6361,
31207 GIR_Done,
31208 // Label 2542: @81294
31209 GIM_Reject,
31210 // Label 2539: @81295
31211 GIM_Reject,
31212 // Label 2518: @81296
31213 GIM_Try, /*On fail goto*//*Label 2543*/ GIMT_Encode4(81401),
31214 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
31215 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
31216 GIM_Try, /*On fail goto*//*Label 2544*/ GIMT_Encode4(81338), // Rule ID 2162 //
31217 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31218 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31219 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31220 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31221 // (strict_fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VMULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
31222 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSrr),
31223 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31224 GIR_RootConstrainSelectedInstOperands,
31225 // GIR_Coverage, 2162,
31226 GIR_Done,
31227 // Label 2544: @81338
31228 GIM_Try, /*On fail goto*//*Label 2545*/ GIMT_Encode4(81369), // Rule ID 2178 //
31229 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
31230 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31231 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31232 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31233 // (strict_fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (MULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
31234 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MULPSrr),
31235 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31236 GIR_RootConstrainSelectedInstOperands,
31237 // GIR_Coverage, 2178,
31238 GIR_Done,
31239 // Label 2545: @81369
31240 GIM_Try, /*On fail goto*//*Label 2546*/ GIMT_Encode4(81400), // Rule ID 6337 //
31241 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31242 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31243 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31244 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31245 // (strict_fmul:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VMULPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
31246 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSZ128rr),
31247 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31248 GIR_RootConstrainSelectedInstOperands,
31249 // GIR_Coverage, 6337,
31250 GIR_Done,
31251 // Label 2546: @81400
31252 GIM_Reject,
31253 // Label 2543: @81401
31254 GIM_Reject,
31255 // Label 2519: @81402
31256 GIM_Try, /*On fail goto*//*Label 2547*/ GIMT_Encode4(81476),
31257 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
31258 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
31259 GIM_Try, /*On fail goto*//*Label 2548*/ GIMT_Encode4(81444), // Rule ID 2174 //
31260 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31261 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31262 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31263 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31264 // (strict_fmul:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VMULPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
31265 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDYrr),
31266 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31267 GIR_RootConstrainSelectedInstOperands,
31268 // GIR_Coverage, 2174,
31269 GIR_Done,
31270 // Label 2548: @81444
31271 GIM_Try, /*On fail goto*//*Label 2549*/ GIMT_Encode4(81475), // Rule ID 6373 //
31272 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31273 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31274 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31275 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31276 // (strict_fmul:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VMULPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
31277 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDZ256rr),
31278 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31279 GIR_RootConstrainSelectedInstOperands,
31280 // GIR_Coverage, 6373,
31281 GIR_Done,
31282 // Label 2549: @81475
31283 GIM_Reject,
31284 // Label 2547: @81476
31285 GIM_Reject,
31286 // Label 2520: @81477
31287 GIM_Try, /*On fail goto*//*Label 2550*/ GIMT_Encode4(81514), // Rule ID 6397 //
31288 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
31289 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
31290 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
31291 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31292 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31293 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31294 // (strict_fmul:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VMULPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
31295 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPHZ128rr),
31296 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31297 GIR_RootConstrainSelectedInstOperands,
31298 // GIR_Coverage, 6397,
31299 GIR_Done,
31300 // Label 2550: @81514
31301 GIM_Reject,
31302 // Label 2521: @81515
31303 GIM_Try, /*On fail goto*//*Label 2551*/ GIMT_Encode4(81589),
31304 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
31305 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
31306 GIM_Try, /*On fail goto*//*Label 2552*/ GIMT_Encode4(81557), // Rule ID 2170 //
31307 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31308 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31309 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31310 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31311 // (strict_fmul:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VMULPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
31312 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSYrr),
31313 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31314 GIR_RootConstrainSelectedInstOperands,
31315 // GIR_Coverage, 2170,
31316 GIR_Done,
31317 // Label 2552: @81557
31318 GIM_Try, /*On fail goto*//*Label 2553*/ GIMT_Encode4(81588), // Rule ID 6349 //
31319 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31320 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31321 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31322 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31323 // (strict_fmul:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VMULPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
31324 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSZ256rr),
31325 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31326 GIR_RootConstrainSelectedInstOperands,
31327 // GIR_Coverage, 6349,
31328 GIR_Done,
31329 // Label 2553: @81588
31330 GIM_Reject,
31331 // Label 2551: @81589
31332 GIM_Reject,
31333 // Label 2522: @81590
31334 GIM_Try, /*On fail goto*//*Label 2554*/ GIMT_Encode4(81627), // Rule ID 6325 //
31335 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31336 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
31337 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
31338 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31339 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31340 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31341 // (strict_fmul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
31342 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPDZrr),
31343 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31344 GIR_RootConstrainSelectedInstOperands,
31345 // GIR_Coverage, 6325,
31346 GIR_Done,
31347 // Label 2554: @81627
31348 GIM_Reject,
31349 // Label 2523: @81628
31350 GIM_Try, /*On fail goto*//*Label 2555*/ GIMT_Encode4(81665), // Rule ID 6409 //
31351 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
31352 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
31353 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
31354 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31355 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31356 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31357 // (strict_fmul:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VMULPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
31358 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPHZ256rr),
31359 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31360 GIR_RootConstrainSelectedInstOperands,
31361 // GIR_Coverage, 6409,
31362 GIR_Done,
31363 // Label 2555: @81665
31364 GIM_Reject,
31365 // Label 2524: @81666
31366 GIM_Try, /*On fail goto*//*Label 2556*/ GIMT_Encode4(81703), // Rule ID 6313 //
31367 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31368 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
31369 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
31370 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31371 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31372 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31373 // (strict_fmul:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VMULPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
31374 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPSZrr),
31375 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31376 GIR_RootConstrainSelectedInstOperands,
31377 // GIR_Coverage, 6313,
31378 GIR_Done,
31379 // Label 2556: @81703
31380 GIM_Reject,
31381 // Label 2525: @81704
31382 GIM_Try, /*On fail goto*//*Label 2557*/ GIMT_Encode4(81741), // Rule ID 6385 //
31383 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
31384 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
31385 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
31386 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31387 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31388 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31389 // (strict_fmul:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VMULPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
31390 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMULPHZrr),
31391 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31392 GIR_RootConstrainSelectedInstOperands,
31393 // GIR_Coverage, 6385,
31394 GIR_Done,
31395 // Label 2557: @81741
31396 GIM_Reject,
31397 // Label 2526: @81742
31398 GIM_Reject,
31399 // Label 60: @81743
31400 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2571*/ GIMT_Encode4(82758),
31401 /*GILLT_s16*//*Label 2558*/ GIMT_Encode4(81838),
31402 /*GILLT_s32*//*Label 2559*/ GIMT_Encode4(81876),
31403 /*GILLT_s64*//*Label 2560*/ GIMT_Encode4(82019),
31404 /*GILLT_s80*//*Label 2561*/ GIMT_Encode4(82162), GIMT_Encode4(0), GIMT_Encode4(0),
31405 /*GILLT_v2s64*//*Label 2562*/ GIMT_Encode4(82206), GIMT_Encode4(0),
31406 /*GILLT_v4s32*//*Label 2563*/ GIMT_Encode4(82312),
31407 /*GILLT_v4s64*//*Label 2564*/ GIMT_Encode4(82418), GIMT_Encode4(0),
31408 /*GILLT_v8s16*//*Label 2565*/ GIMT_Encode4(82493),
31409 /*GILLT_v8s32*//*Label 2566*/ GIMT_Encode4(82531),
31410 /*GILLT_v8s64*//*Label 2567*/ GIMT_Encode4(82606), GIMT_Encode4(0), GIMT_Encode4(0),
31411 /*GILLT_v16s16*//*Label 2568*/ GIMT_Encode4(82644),
31412 /*GILLT_v16s32*//*Label 2569*/ GIMT_Encode4(82682), GIMT_Encode4(0), GIMT_Encode4(0),
31413 /*GILLT_v32s16*//*Label 2570*/ GIMT_Encode4(82720),
31414 // Label 2558: @81838
31415 GIM_Try, /*On fail goto*//*Label 2572*/ GIMT_Encode4(81875), // Rule ID 6075 //
31416 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
31417 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
31418 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
31419 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31420 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31421 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31422 // (strict_fdiv:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VDIVSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2)
31423 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSHZrr),
31424 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31425 GIR_RootConstrainSelectedInstOperands,
31426 // GIR_Coverage, 6075,
31427 GIR_Done,
31428 // Label 2572: @81875
31429 GIM_Reject,
31430 // Label 2559: @81876
31431 GIM_Try, /*On fail goto*//*Label 2573*/ GIMT_Encode4(82018),
31432 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
31433 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
31434 GIM_Try, /*On fail goto*//*Label 2574*/ GIMT_Encode4(81924), // Rule ID 892 //
31435 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
31436 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
31437 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
31438 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
31439 // (strict_fdiv:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (DIV_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
31440 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIV_Fp32),
31441 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
31442 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
31443 GIR_RootConstrainSelectedInstOperands,
31444 // GIR_Coverage, 892,
31445 GIR_Done,
31446 // Label 2574: @81924
31447 GIM_Try, /*On fail goto*//*Label 2575*/ GIMT_Encode4(81955), // Rule ID 2266 //
31448 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
31449 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31450 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31451 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31452 // (strict_fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VDIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
31453 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSSrr),
31454 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31455 GIR_RootConstrainSelectedInstOperands,
31456 // GIR_Coverage, 2266,
31457 GIR_Done,
31458 // Label 2575: @81955
31459 GIM_Try, /*On fail goto*//*Label 2576*/ GIMT_Encode4(81986), // Rule ID 2274 //
31460 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
31461 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31462 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31463 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31464 // (strict_fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (DIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
31465 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVSSrr),
31466 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31467 GIR_RootConstrainSelectedInstOperands,
31468 // GIR_Coverage, 2274,
31469 GIR_Done,
31470 // Label 2576: @81986
31471 GIM_Try, /*On fail goto*//*Label 2577*/ GIMT_Encode4(82017), // Rule ID 6037 //
31472 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31473 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31474 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31475 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31476 // (strict_fdiv:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VDIVSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
31477 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSSZrr),
31478 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31479 GIR_RootConstrainSelectedInstOperands,
31480 // GIR_Coverage, 6037,
31481 GIR_Done,
31482 // Label 2577: @82017
31483 GIM_Reject,
31484 // Label 2573: @82018
31485 GIM_Reject,
31486 // Label 2560: @82019
31487 GIM_Try, /*On fail goto*//*Label 2578*/ GIMT_Encode4(82161),
31488 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
31489 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
31490 GIM_Try, /*On fail goto*//*Label 2579*/ GIMT_Encode4(82067), // Rule ID 894 //
31491 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
31492 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
31493 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
31494 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
31495 // (strict_fdiv:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (DIV_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
31496 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIV_Fp64),
31497 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
31498 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
31499 GIR_RootConstrainSelectedInstOperands,
31500 // GIR_Coverage, 894,
31501 GIR_Done,
31502 // Label 2579: @82067
31503 GIM_Try, /*On fail goto*//*Label 2580*/ GIMT_Encode4(82098), // Rule ID 2270 //
31504 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
31505 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31506 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31507 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31508 // (strict_fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VDIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
31509 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSDrr),
31510 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31511 GIR_RootConstrainSelectedInstOperands,
31512 // GIR_Coverage, 2270,
31513 GIR_Done,
31514 // Label 2580: @82098
31515 GIM_Try, /*On fail goto*//*Label 2581*/ GIMT_Encode4(82129), // Rule ID 2278 //
31516 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
31517 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31518 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31519 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31520 // (strict_fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (DIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
31521 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVSDrr),
31522 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31523 GIR_RootConstrainSelectedInstOperands,
31524 // GIR_Coverage, 2278,
31525 GIR_Done,
31526 // Label 2581: @82129
31527 GIM_Try, /*On fail goto*//*Label 2582*/ GIMT_Encode4(82160), // Rule ID 6056 //
31528 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31529 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31530 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31531 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31532 // (strict_fdiv:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VDIVSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
31533 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVSDZrr),
31534 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31535 GIR_RootConstrainSelectedInstOperands,
31536 // GIR_Coverage, 6056,
31537 GIR_Done,
31538 // Label 2582: @82160
31539 GIM_Reject,
31540 // Label 2578: @82161
31541 GIM_Reject,
31542 // Label 2561: @82162
31543 GIM_Try, /*On fail goto*//*Label 2583*/ GIMT_Encode4(82205), // Rule ID 896 //
31544 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
31545 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
31546 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s80,
31547 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
31548 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
31549 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
31550 // (strict_fdiv:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (DIV_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
31551 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIV_Fp80),
31552 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
31553 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
31554 GIR_RootConstrainSelectedInstOperands,
31555 // GIR_Coverage, 896,
31556 GIR_Done,
31557 // Label 2583: @82205
31558 GIM_Reject,
31559 // Label 2562: @82206
31560 GIM_Try, /*On fail goto*//*Label 2584*/ GIMT_Encode4(82311),
31561 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
31562 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
31563 GIM_Try, /*On fail goto*//*Label 2585*/ GIMT_Encode4(82248), // Rule ID 2246 //
31564 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31565 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31566 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31567 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31568 // (strict_fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VDIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
31569 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDrr),
31570 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31571 GIR_RootConstrainSelectedInstOperands,
31572 // GIR_Coverage, 2246,
31573 GIR_Done,
31574 // Label 2585: @82248
31575 GIM_Try, /*On fail goto*//*Label 2586*/ GIMT_Encode4(82279), // Rule ID 2262 //
31576 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
31577 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31578 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31579 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31580 // (strict_fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (DIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
31581 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVPDrr),
31582 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31583 GIR_RootConstrainSelectedInstOperands,
31584 // GIR_Coverage, 2262,
31585 GIR_Done,
31586 // Label 2586: @82279
31587 GIM_Try, /*On fail goto*//*Label 2587*/ GIMT_Encode4(82310), // Rule ID 6595 //
31588 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31589 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31590 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31591 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31592 // (strict_fdiv:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VDIVPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
31593 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDZ128rr),
31594 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31595 GIR_RootConstrainSelectedInstOperands,
31596 // GIR_Coverage, 6595,
31597 GIR_Done,
31598 // Label 2587: @82310
31599 GIM_Reject,
31600 // Label 2584: @82311
31601 GIM_Reject,
31602 // Label 2563: @82312
31603 GIM_Try, /*On fail goto*//*Label 2588*/ GIMT_Encode4(82417),
31604 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
31605 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
31606 GIM_Try, /*On fail goto*//*Label 2589*/ GIMT_Encode4(82354), // Rule ID 2242 //
31607 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31608 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31609 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31610 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31611 // (strict_fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VDIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
31612 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSrr),
31613 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31614 GIR_RootConstrainSelectedInstOperands,
31615 // GIR_Coverage, 2242,
31616 GIR_Done,
31617 // Label 2589: @82354
31618 GIM_Try, /*On fail goto*//*Label 2590*/ GIMT_Encode4(82385), // Rule ID 2258 //
31619 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
31620 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31621 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31622 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31623 // (strict_fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (DIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
31624 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::DIVPSrr),
31625 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31626 GIR_RootConstrainSelectedInstOperands,
31627 // GIR_Coverage, 2258,
31628 GIR_Done,
31629 // Label 2590: @82385
31630 GIM_Try, /*On fail goto*//*Label 2591*/ GIMT_Encode4(82416), // Rule ID 6571 //
31631 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31632 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31633 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31634 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31635 // (strict_fdiv:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VDIVPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
31636 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSZ128rr),
31637 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31638 GIR_RootConstrainSelectedInstOperands,
31639 // GIR_Coverage, 6571,
31640 GIR_Done,
31641 // Label 2591: @82416
31642 GIM_Reject,
31643 // Label 2588: @82417
31644 GIM_Reject,
31645 // Label 2564: @82418
31646 GIM_Try, /*On fail goto*//*Label 2592*/ GIMT_Encode4(82492),
31647 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
31648 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
31649 GIM_Try, /*On fail goto*//*Label 2593*/ GIMT_Encode4(82460), // Rule ID 2254 //
31650 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31651 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31652 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31653 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31654 // (strict_fdiv:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VDIVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
31655 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDYrr),
31656 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31657 GIR_RootConstrainSelectedInstOperands,
31658 // GIR_Coverage, 2254,
31659 GIR_Done,
31660 // Label 2593: @82460
31661 GIM_Try, /*On fail goto*//*Label 2594*/ GIMT_Encode4(82491), // Rule ID 6607 //
31662 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31663 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31664 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31665 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31666 // (strict_fdiv:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VDIVPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
31667 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDZ256rr),
31668 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31669 GIR_RootConstrainSelectedInstOperands,
31670 // GIR_Coverage, 6607,
31671 GIR_Done,
31672 // Label 2594: @82491
31673 GIM_Reject,
31674 // Label 2592: @82492
31675 GIM_Reject,
31676 // Label 2565: @82493
31677 GIM_Try, /*On fail goto*//*Label 2595*/ GIMT_Encode4(82530), // Rule ID 6631 //
31678 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
31679 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
31680 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
31681 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31682 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31683 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31684 // (strict_fdiv:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VDIVPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2)
31685 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPHZ128rr),
31686 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31687 GIR_RootConstrainSelectedInstOperands,
31688 // GIR_Coverage, 6631,
31689 GIR_Done,
31690 // Label 2595: @82530
31691 GIM_Reject,
31692 // Label 2566: @82531
31693 GIM_Try, /*On fail goto*//*Label 2596*/ GIMT_Encode4(82605),
31694 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
31695 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
31696 GIM_Try, /*On fail goto*//*Label 2597*/ GIMT_Encode4(82573), // Rule ID 2250 //
31697 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
31698 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31699 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31700 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
31701 // (strict_fdiv:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VDIVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
31702 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSYrr),
31703 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31704 GIR_RootConstrainSelectedInstOperands,
31705 // GIR_Coverage, 2250,
31706 GIR_Done,
31707 // Label 2597: @82573
31708 GIM_Try, /*On fail goto*//*Label 2598*/ GIMT_Encode4(82604), // Rule ID 6583 //
31709 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31710 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31711 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31712 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31713 // (strict_fdiv:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VDIVPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
31714 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSZ256rr),
31715 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31716 GIR_RootConstrainSelectedInstOperands,
31717 // GIR_Coverage, 6583,
31718 GIR_Done,
31719 // Label 2598: @82604
31720 GIM_Reject,
31721 // Label 2596: @82605
31722 GIM_Reject,
31723 // Label 2567: @82606
31724 GIM_Try, /*On fail goto*//*Label 2599*/ GIMT_Encode4(82643), // Rule ID 6559 //
31725 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31726 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
31727 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
31728 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31729 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31730 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31731 // (strict_fdiv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
31732 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPDZrr),
31733 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31734 GIR_RootConstrainSelectedInstOperands,
31735 // GIR_Coverage, 6559,
31736 GIR_Done,
31737 // Label 2599: @82643
31738 GIM_Reject,
31739 // Label 2568: @82644
31740 GIM_Try, /*On fail goto*//*Label 2600*/ GIMT_Encode4(82681), // Rule ID 6643 //
31741 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
31742 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
31743 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
31744 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31745 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31746 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
31747 // (strict_fdiv:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VDIVPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2)
31748 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPHZ256rr),
31749 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31750 GIR_RootConstrainSelectedInstOperands,
31751 // GIR_Coverage, 6643,
31752 GIR_Done,
31753 // Label 2600: @82681
31754 GIM_Reject,
31755 // Label 2569: @82682
31756 GIM_Try, /*On fail goto*//*Label 2601*/ GIMT_Encode4(82719), // Rule ID 6547 //
31757 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31758 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
31759 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
31760 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31761 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31762 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31763 // (strict_fdiv:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VDIVPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
31764 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPSZrr),
31765 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31766 GIR_RootConstrainSelectedInstOperands,
31767 // GIR_Coverage, 6547,
31768 GIR_Done,
31769 // Label 2601: @82719
31770 GIM_Reject,
31771 // Label 2570: @82720
31772 GIM_Try, /*On fail goto*//*Label 2602*/ GIMT_Encode4(82757), // Rule ID 6619 //
31773 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
31774 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
31775 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
31776 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31777 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31778 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
31779 // (strict_fdiv:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VDIVPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2)
31780 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VDIVPHZrr),
31781 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31782 GIR_RootConstrainSelectedInstOperands,
31783 // GIR_Coverage, 6619,
31784 GIR_Done,
31785 // Label 2602: @82757
31786 GIM_Reject,
31787 // Label 2571: @82758
31788 GIM_Reject,
31789 // Label 61: @82759
31790 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2615*/ GIMT_Encode4(83886),
31791 /*GILLT_s16*//*Label 2603*/ GIMT_Encode4(82854),
31792 /*GILLT_s32*//*Label 2604*/ GIMT_Encode4(82901),
31793 /*GILLT_s64*//*Label 2605*/ GIMT_Encode4(83026), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
31794 /*GILLT_v2s64*//*Label 2606*/ GIMT_Encode4(83151), GIMT_Encode4(0),
31795 /*GILLT_v4s32*//*Label 2607*/ GIMT_Encode4(83276),
31796 /*GILLT_v4s64*//*Label 2608*/ GIMT_Encode4(83401), GIMT_Encode4(0),
31797 /*GILLT_v8s16*//*Label 2609*/ GIMT_Encode4(83526),
31798 /*GILLT_v8s32*//*Label 2610*/ GIMT_Encode4(83573),
31799 /*GILLT_v8s64*//*Label 2611*/ GIMT_Encode4(83698), GIMT_Encode4(0), GIMT_Encode4(0),
31800 /*GILLT_v16s16*//*Label 2612*/ GIMT_Encode4(83745),
31801 /*GILLT_v16s32*//*Label 2613*/ GIMT_Encode4(83792), GIMT_Encode4(0), GIMT_Encode4(0),
31802 /*GILLT_v32s16*//*Label 2614*/ GIMT_Encode4(83839),
31803 // Label 2603: @82854
31804 GIM_Try, /*On fail goto*//*Label 2616*/ GIMT_Encode4(82900), // Rule ID 10036 //
31805 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
31806 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
31807 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16,
31808 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s16,
31809 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31810 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31811 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31812 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
31813 // (strict_fma:{ *:[f16] } FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src3) => (VFMADD213SHZr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src3)
31814 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SHZr),
31815 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31816 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31817 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31818 GIR_RootToRootCopy, /*OpIdx*/3, // src3
31819 GIR_RootConstrainSelectedInstOperands,
31820 // GIR_Coverage, 10036,
31821 GIR_EraseRootFromParent_Done,
31822 // Label 2616: @82900
31823 GIM_Reject,
31824 // Label 2604: @82901
31825 GIM_Try, /*On fail goto*//*Label 2617*/ GIMT_Encode4(83025),
31826 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
31827 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
31828 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
31829 GIM_Try, /*On fail goto*//*Label 2618*/ GIMT_Encode4(82952), // Rule ID 1285 //
31830 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoAVX512_NoFMA4),
31831 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31832 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31833 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31834 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31835 // (strict_fma:{ *:[f32] } FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src3) => (VFMADD213SSr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3)
31836 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SSr),
31837 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31838 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31839 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31840 GIR_RootToRootCopy, /*OpIdx*/3, // src3
31841 GIR_RootConstrainSelectedInstOperands,
31842 // GIR_Coverage, 1285,
31843 GIR_EraseRootFromParent_Done,
31844 // Label 2618: @82952
31845 GIM_Try, /*On fail goto*//*Label 2619*/ GIMT_Encode4(82987), // Rule ID 1349 //
31846 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoAVX512),
31847 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31848 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31849 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31850 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
31851 // (strict_fma:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) => (VFMADDSS4rr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3)
31852 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDSS4rr),
31853 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31854 GIR_RootConstrainSelectedInstOperands,
31855 // GIR_Coverage, 1349,
31856 GIR_Done,
31857 // Label 2619: @82987
31858 GIM_Try, /*On fail goto*//*Label 2620*/ GIMT_Encode4(83024), // Rule ID 10018 //
31859 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31860 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31861 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31862 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31863 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
31864 // (strict_fma:{ *:[f32] } FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src3) => (VFMADD213SSZr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src3)
31865 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SSZr),
31866 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31867 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31868 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31869 GIR_RootToRootCopy, /*OpIdx*/3, // src3
31870 GIR_RootConstrainSelectedInstOperands,
31871 // GIR_Coverage, 10018,
31872 GIR_EraseRootFromParent_Done,
31873 // Label 2620: @83024
31874 GIM_Reject,
31875 // Label 2617: @83025
31876 GIM_Reject,
31877 // Label 2605: @83026
31878 GIM_Try, /*On fail goto*//*Label 2621*/ GIMT_Encode4(83150),
31879 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
31880 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
31881 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
31882 GIM_Try, /*On fail goto*//*Label 2622*/ GIMT_Encode4(83077), // Rule ID 1293 //
31883 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoAVX512_NoFMA4),
31884 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31885 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31886 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31887 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31888 // (strict_fma:{ *:[f64] } FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src3) => (VFMADD213SDr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3)
31889 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SDr),
31890 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31891 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31892 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31893 GIR_RootToRootCopy, /*OpIdx*/3, // src3
31894 GIR_RootConstrainSelectedInstOperands,
31895 // GIR_Coverage, 1293,
31896 GIR_EraseRootFromParent_Done,
31897 // Label 2622: @83077
31898 GIM_Try, /*On fail goto*//*Label 2623*/ GIMT_Encode4(83112), // Rule ID 1433 //
31899 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoAVX512),
31900 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31901 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31902 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31903 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
31904 // (strict_fma:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) => (VFMADDSD4rr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3)
31905 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDSD4rr),
31906 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31907 GIR_RootConstrainSelectedInstOperands,
31908 // GIR_Coverage, 1433,
31909 GIR_Done,
31910 // Label 2623: @83112
31911 GIM_Try, /*On fail goto*//*Label 2624*/ GIMT_Encode4(83149), // Rule ID 10027 //
31912 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
31913 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31914 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31915 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31916 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
31917 // (strict_fma:{ *:[f64] } FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src3) => (VFMADD213SDZr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src3)
31918 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213SDZr),
31919 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31920 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31921 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31922 GIR_RootToRootCopy, /*OpIdx*/3, // src3
31923 GIR_RootConstrainSelectedInstOperands,
31924 // GIR_Coverage, 10027,
31925 GIR_EraseRootFromParent_Done,
31926 // Label 2624: @83149
31927 GIM_Reject,
31928 // Label 2621: @83150
31929 GIM_Reject,
31930 // Label 2606: @83151
31931 GIM_Try, /*On fail goto*//*Label 2625*/ GIMT_Encode4(83275),
31932 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
31933 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
31934 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
31935 GIM_Try, /*On fail goto*//*Label 2626*/ GIMT_Encode4(83202), // Rule ID 1173 //
31936 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
31937 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31938 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31939 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31940 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31941 // (strict_fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src3) => (VFMADD213PDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3)
31942 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDr),
31943 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31944 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31945 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31946 GIR_RootToRootCopy, /*OpIdx*/3, // src3
31947 GIR_RootConstrainSelectedInstOperands,
31948 // GIR_Coverage, 1173,
31949 GIR_EraseRootFromParent_Done,
31950 // Label 2626: @83202
31951 GIM_Try, /*On fail goto*//*Label 2627*/ GIMT_Encode4(83237), // Rule ID 1457 //
31952 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
31953 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31954 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31955 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31956 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31957 // (strict_fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) => (VFMADDPD4rr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3)
31958 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPD4rr),
31959 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
31960 GIR_RootConstrainSelectedInstOperands,
31961 // GIR_Coverage, 1457,
31962 GIR_Done,
31963 // Label 2627: @83237
31964 GIM_Try, /*On fail goto*//*Label 2628*/ GIMT_Encode4(83274), // Rule ID 8395 //
31965 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
31966 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31967 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31968 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31969 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
31970 // (strict_fma:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src3) => (VFMADD213PDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src3)
31971 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDZ128r),
31972 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31973 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31974 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31975 GIR_RootToRootCopy, /*OpIdx*/3, // src3
31976 GIR_RootConstrainSelectedInstOperands,
31977 // GIR_Coverage, 8395,
31978 GIR_EraseRootFromParent_Done,
31979 // Label 2628: @83274
31980 GIM_Reject,
31981 // Label 2625: @83275
31982 GIM_Reject,
31983 // Label 2607: @83276
31984 GIM_Try, /*On fail goto*//*Label 2629*/ GIMT_Encode4(83400),
31985 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
31986 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
31987 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
31988 GIM_Try, /*On fail goto*//*Label 2630*/ GIMT_Encode4(83327), // Rule ID 1125 //
31989 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
31990 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31991 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31992 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31993 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
31994 // (strict_fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src3) => (VFMADD213PSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3)
31995 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSr),
31996 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
31997 GIR_RootToRootCopy, /*OpIdx*/2, // src1
31998 GIR_RootToRootCopy, /*OpIdx*/1, // src2
31999 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32000 GIR_RootConstrainSelectedInstOperands,
32001 // GIR_Coverage, 1125,
32002 GIR_EraseRootFromParent_Done,
32003 // Label 2630: @83327
32004 GIM_Try, /*On fail goto*//*Label 2631*/ GIMT_Encode4(83362), // Rule ID 1373 //
32005 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
32006 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32007 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32008 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32009 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32010 // (strict_fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) => (VFMADDPS4rr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3)
32011 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPS4rr),
32012 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32013 GIR_RootConstrainSelectedInstOperands,
32014 // GIR_Coverage, 1373,
32015 GIR_Done,
32016 // Label 2631: @83362
32017 GIM_Try, /*On fail goto*//*Label 2632*/ GIMT_Encode4(83399), // Rule ID 8356 //
32018 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
32019 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32020 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32021 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32022 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32023 // (strict_fma:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src3) => (VFMADD213PSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src3)
32024 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSZ128r),
32025 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32026 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32027 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32028 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32029 GIR_RootConstrainSelectedInstOperands,
32030 // GIR_Coverage, 8356,
32031 GIR_EraseRootFromParent_Done,
32032 // Label 2632: @83399
32033 GIM_Reject,
32034 // Label 2629: @83400
32035 GIM_Reject,
32036 // Label 2608: @83401
32037 GIM_Try, /*On fail goto*//*Label 2633*/ GIMT_Encode4(83525),
32038 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
32039 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64,
32040 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64,
32041 GIM_Try, /*On fail goto*//*Label 2634*/ GIMT_Encode4(83452), // Rule ID 1181 //
32042 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
32043 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32044 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32045 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32046 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32047 // (strict_fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src3) => (VFMADD213PDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3)
32048 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDYr),
32049 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32050 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32051 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32052 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32053 GIR_RootConstrainSelectedInstOperands,
32054 // GIR_Coverage, 1181,
32055 GIR_EraseRootFromParent_Done,
32056 // Label 2634: @83452
32057 GIM_Try, /*On fail goto*//*Label 2635*/ GIMT_Encode4(83487), // Rule ID 1463 //
32058 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
32059 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32060 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32061 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32062 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32063 // (strict_fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) => (VFMADDPD4Yrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3)
32064 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPD4Yrr),
32065 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32066 GIR_RootConstrainSelectedInstOperands,
32067 // GIR_Coverage, 1463,
32068 GIR_Done,
32069 // Label 2635: @83487
32070 GIM_Try, /*On fail goto*//*Label 2636*/ GIMT_Encode4(83524), // Rule ID 8383 //
32071 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
32072 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32073 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32074 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32075 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32076 // (strict_fma:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src3) => (VFMADD213PDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src3)
32077 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDZ256r),
32078 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32079 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32080 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32081 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32082 GIR_RootConstrainSelectedInstOperands,
32083 // GIR_Coverage, 8383,
32084 GIR_EraseRootFromParent_Done,
32085 // Label 2636: @83524
32086 GIM_Reject,
32087 // Label 2633: @83525
32088 GIM_Reject,
32089 // Label 2609: @83526
32090 GIM_Try, /*On fail goto*//*Label 2637*/ GIMT_Encode4(83572), // Rule ID 8317 //
32091 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
32092 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
32093 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
32094 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
32095 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32096 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32097 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32098 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32099 // (strict_fma:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src3) => (VFMADD213PHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src3)
32100 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PHZ128r),
32101 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32102 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32103 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32104 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32105 GIR_RootConstrainSelectedInstOperands,
32106 // GIR_Coverage, 8317,
32107 GIR_EraseRootFromParent_Done,
32108 // Label 2637: @83572
32109 GIM_Reject,
32110 // Label 2610: @83573
32111 GIM_Try, /*On fail goto*//*Label 2638*/ GIMT_Encode4(83697),
32112 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
32113 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32,
32114 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32,
32115 GIM_Try, /*On fail goto*//*Label 2639*/ GIMT_Encode4(83624), // Rule ID 1133 //
32116 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA_NoFMA4_NoVLX),
32117 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32118 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32119 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32120 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32121 // (strict_fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src3) => (VFMADD213PSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3)
32122 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSYr),
32123 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32124 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32125 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32126 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32127 GIR_RootConstrainSelectedInstOperands,
32128 // GIR_Coverage, 1133,
32129 GIR_EraseRootFromParent_Done,
32130 // Label 2639: @83624
32131 GIM_Try, /*On fail goto*//*Label 2640*/ GIMT_Encode4(83659), // Rule ID 1379 //
32132 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFMA4_NoVLX),
32133 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32134 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32135 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32136 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32137 // (strict_fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) => (VFMADDPS4Yrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3)
32138 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VFMADDPS4Yrr),
32139 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32140 GIR_RootConstrainSelectedInstOperands,
32141 // GIR_Coverage, 1379,
32142 GIR_Done,
32143 // Label 2640: @83659
32144 GIM_Try, /*On fail goto*//*Label 2641*/ GIMT_Encode4(83696), // Rule ID 8344 //
32145 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX),
32146 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32147 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32148 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32149 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32150 // (strict_fma:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src3) => (VFMADD213PSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src3)
32151 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSZ256r),
32152 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32153 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32154 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32155 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32156 GIR_RootConstrainSelectedInstOperands,
32157 // GIR_Coverage, 8344,
32158 GIR_EraseRootFromParent_Done,
32159 // Label 2641: @83696
32160 GIM_Reject,
32161 // Label 2638: @83697
32162 GIM_Reject,
32163 // Label 2611: @83698
32164 GIM_Try, /*On fail goto*//*Label 2642*/ GIMT_Encode4(83744), // Rule ID 8368 //
32165 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
32166 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
32167 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64,
32168 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64,
32169 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32170 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32171 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32172 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32173 // (strict_fma:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src3) => (VFMADD213PDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src3)
32174 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PDZr),
32175 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32176 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32177 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32178 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32179 GIR_RootConstrainSelectedInstOperands,
32180 // GIR_Coverage, 8368,
32181 GIR_EraseRootFromParent_Done,
32182 // Label 2642: @83744
32183 GIM_Reject,
32184 // Label 2612: @83745
32185 GIM_Try, /*On fail goto*//*Label 2643*/ GIMT_Encode4(83791), // Rule ID 8305 //
32186 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
32187 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
32188 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16,
32189 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16,
32190 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32191 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32192 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32193 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32194 // (strict_fma:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src3) => (VFMADD213PHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src3)
32195 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PHZ256r),
32196 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32197 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32198 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32199 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32200 GIR_RootConstrainSelectedInstOperands,
32201 // GIR_Coverage, 8305,
32202 GIR_EraseRootFromParent_Done,
32203 // Label 2643: @83791
32204 GIM_Reject,
32205 // Label 2613: @83792
32206 GIM_Try, /*On fail goto*//*Label 2644*/ GIMT_Encode4(83838), // Rule ID 8329 //
32207 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
32208 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
32209 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32,
32210 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s32,
32211 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32212 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32213 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32214 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32215 // (strict_fma:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src3) => (VFMADD213PSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src3)
32216 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PSZr),
32217 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32218 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32219 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32220 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32221 GIR_RootConstrainSelectedInstOperands,
32222 // GIR_Coverage, 8329,
32223 GIR_EraseRootFromParent_Done,
32224 // Label 2644: @83838
32225 GIM_Reject,
32226 // Label 2614: @83839
32227 GIM_Try, /*On fail goto*//*Label 2645*/ GIMT_Encode4(83885), // Rule ID 8290 //
32228 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
32229 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
32230 GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16,
32231 GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s16,
32232 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32233 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32234 GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32235 GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32236 // (strict_fma:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src3) => (VFMADD213PHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src3)
32237 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFMADD213PHZr),
32238 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32239 GIR_RootToRootCopy, /*OpIdx*/2, // src1
32240 GIR_RootToRootCopy, /*OpIdx*/1, // src2
32241 GIR_RootToRootCopy, /*OpIdx*/3, // src3
32242 GIR_RootConstrainSelectedInstOperands,
32243 // GIR_Coverage, 8290,
32244 GIR_EraseRootFromParent_Done,
32245 // Label 2645: @83885
32246 GIM_Reject,
32247 // Label 2615: @83886
32248 GIM_Reject,
32249 // Label 62: @83887
32250 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 2659*/ GIMT_Encode4(84838),
32251 /*GILLT_s16*//*Label 2646*/ GIMT_Encode4(83982),
32252 /*GILLT_s32*//*Label 2647*/ GIMT_Encode4(84028),
32253 /*GILLT_s64*//*Label 2648*/ GIMT_Encode4(84182),
32254 /*GILLT_s80*//*Label 2649*/ GIMT_Encode4(84336), GIMT_Encode4(0), GIMT_Encode4(0),
32255 /*GILLT_v2s64*//*Label 2650*/ GIMT_Encode4(84373), GIMT_Encode4(0),
32256 /*GILLT_v4s32*//*Label 2651*/ GIMT_Encode4(84464),
32257 /*GILLT_v4s64*//*Label 2652*/ GIMT_Encode4(84555), GIMT_Encode4(0),
32258 /*GILLT_v8s16*//*Label 2653*/ GIMT_Encode4(84619),
32259 /*GILLT_v8s32*//*Label 2654*/ GIMT_Encode4(84650),
32260 /*GILLT_v8s64*//*Label 2655*/ GIMT_Encode4(84714), GIMT_Encode4(0), GIMT_Encode4(0),
32261 /*GILLT_v16s16*//*Label 2656*/ GIMT_Encode4(84745),
32262 /*GILLT_v16s32*//*Label 2657*/ GIMT_Encode4(84776), GIMT_Encode4(0), GIMT_Encode4(0),
32263 /*GILLT_v32s16*//*Label 2658*/ GIMT_Encode4(84807),
32264 // Label 2646: @83982
32265 GIM_Try, /*On fail goto*//*Label 2660*/ GIMT_Encode4(84027), // Rule ID 19998 //
32266 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
32267 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16,
32268 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
32269 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID),
32270 // (strict_fsqrt:{ *:[f16] } FR16X:{ *:[f16] }:$src) => (VSQRTSHZr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR16X:{ *:[f16] }:$src)
32271 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
32272 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
32273 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
32274 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
32275 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSHZr),
32276 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32277 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
32278 GIR_RootToRootCopy, /*OpIdx*/1, // src
32279 GIR_RootConstrainSelectedInstOperands,
32280 // GIR_Coverage, 19998,
32281 GIR_EraseRootFromParent_Done,
32282 // Label 2660: @84027
32283 GIM_Reject,
32284 // Label 2647: @84028
32285 GIM_Try, /*On fail goto*//*Label 2661*/ GIMT_Encode4(84181),
32286 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
32287 GIM_Try, /*On fail goto*//*Label 2662*/ GIMT_Encode4(84069), // Rule ID 1036 //
32288 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf32),
32289 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
32290 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP32RegClassID),
32291 // (strict_fsqrt:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (SQRT_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src)
32292 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRT_Fp32),
32293 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
32294 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
32295 GIR_RootConstrainSelectedInstOperands,
32296 // GIR_Coverage, 1036,
32297 GIR_Done,
32298 // Label 2662: @84069
32299 GIM_Try, /*On fail goto*//*Label 2663*/ GIMT_Encode4(84096), // Rule ID 2394 //
32300 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
32301 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
32302 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
32303 // (strict_fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src1) => (SQRTSSr:{ *:[f32] } FR32:{ *:[f32] }:$src1)
32304 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTSSr),
32305 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32306 GIR_RootConstrainSelectedInstOperands,
32307 // GIR_Coverage, 2394,
32308 GIR_Done,
32309 // Label 2663: @84096
32310 GIM_Try, /*On fail goto*//*Label 2664*/ GIMT_Encode4(84138), // Rule ID 16784 //
32311 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
32312 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
32313 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID),
32314 // (strict_fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src) => (VSQRTSSr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32:{ *:[f32] }:$src)
32315 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
32316 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
32317 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
32318 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
32319 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSSr),
32320 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32321 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
32322 GIR_RootToRootCopy, /*OpIdx*/1, // src
32323 GIR_RootConstrainSelectedInstOperands,
32324 // GIR_Coverage, 16784,
32325 GIR_EraseRootFromParent_Done,
32326 // Label 2664: @84138
32327 GIM_Try, /*On fail goto*//*Label 2665*/ GIMT_Encode4(84180), // Rule ID 20002 //
32328 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
32329 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
32330 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID),
32331 // (strict_fsqrt:{ *:[f32] } FR32X:{ *:[f32] }:$src) => (VSQRTSSZr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32X:{ *:[f32] }:$src)
32332 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
32333 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
32334 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
32335 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
32336 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSSZr),
32337 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32338 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
32339 GIR_RootToRootCopy, /*OpIdx*/1, // src
32340 GIR_RootConstrainSelectedInstOperands,
32341 // GIR_Coverage, 20002,
32342 GIR_EraseRootFromParent_Done,
32343 // Label 2665: @84180
32344 GIM_Reject,
32345 // Label 2661: @84181
32346 GIM_Reject,
32347 // Label 2648: @84182
32348 GIM_Try, /*On fail goto*//*Label 2666*/ GIMT_Encode4(84335),
32349 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
32350 GIM_Try, /*On fail goto*//*Label 2667*/ GIMT_Encode4(84223), // Rule ID 1038 //
32351 GIM_CheckFeatures, GIMT_Encode2(GIFBS_FPStackf64),
32352 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
32353 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP64RegClassID),
32354 // (strict_fsqrt:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (SQRT_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src)
32355 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRT_Fp64),
32356 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
32357 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
32358 GIR_RootConstrainSelectedInstOperands,
32359 // GIR_Coverage, 1038,
32360 GIR_Done,
32361 // Label 2667: @84223
32362 GIM_Try, /*On fail goto*//*Label 2668*/ GIMT_Encode4(84250), // Rule ID 2410 //
32363 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
32364 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
32365 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
32366 // (strict_fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src1) => (SQRTSDr:{ *:[f64] } FR64:{ *:[f64] }:$src1)
32367 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTSDr),
32368 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32369 GIR_RootConstrainSelectedInstOperands,
32370 // GIR_Coverage, 2410,
32371 GIR_Done,
32372 // Label 2668: @84250
32373 GIM_Try, /*On fail goto*//*Label 2669*/ GIMT_Encode4(84292), // Rule ID 16788 //
32374 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX),
32375 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
32376 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID),
32377 // (strict_fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src) => (VSQRTSDr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64:{ *:[f64] }:$src)
32378 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
32379 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
32380 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
32381 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
32382 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSDr),
32383 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32384 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
32385 GIR_RootToRootCopy, /*OpIdx*/1, // src
32386 GIR_RootConstrainSelectedInstOperands,
32387 // GIR_Coverage, 16788,
32388 GIR_EraseRootFromParent_Done,
32389 // Label 2669: @84292
32390 GIM_Try, /*On fail goto*//*Label 2670*/ GIMT_Encode4(84334), // Rule ID 20006 //
32391 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
32392 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
32393 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID),
32394 // (strict_fsqrt:{ *:[f64] } FR64X:{ *:[f64] }:$src) => (VSQRTSDZr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64X:{ *:[f64] }:$src)
32395 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
32396 GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
32397 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
32398 GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
32399 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSQRTSDZr),
32400 GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
32401 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
32402 GIR_RootToRootCopy, /*OpIdx*/1, // src
32403 GIR_RootConstrainSelectedInstOperands,
32404 // GIR_Coverage, 20006,
32405 GIR_EraseRootFromParent_Done,
32406 // Label 2670: @84334
32407 GIM_Reject,
32408 // Label 2666: @84335
32409 GIM_Reject,
32410 // Label 2649: @84336
32411 GIM_Try, /*On fail goto*//*Label 2671*/ GIMT_Encode4(84372), // Rule ID 1040 //
32412 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasX87),
32413 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s80,
32414 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
32415 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::RFP80RegClassID),
32416 // (strict_fsqrt:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (SQRT_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src)
32417 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRT_Fp80),
32418 GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::FPSW), GIMT_Encode2(RegState::Dead),
32419 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::FPCW),
32420 GIR_RootConstrainSelectedInstOperands,
32421 // GIR_Coverage, 1040,
32422 GIR_Done,
32423 // Label 2671: @84372
32424 GIM_Reject,
32425 // Label 2650: @84373
32426 GIM_Try, /*On fail goto*//*Label 2672*/ GIMT_Encode4(84463),
32427 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
32428 GIM_Try, /*On fail goto*//*Label 2673*/ GIMT_Encode4(84408), // Rule ID 2414 //
32429 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
32430 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32431 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32432 // (strict_fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (VSQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
32433 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDr),
32434 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32435 GIR_RootConstrainSelectedInstOperands,
32436 // GIR_Coverage, 2414,
32437 GIR_Done,
32438 // Label 2673: @84408
32439 GIM_Try, /*On fail goto*//*Label 2674*/ GIMT_Encode4(84435), // Rule ID 2422 //
32440 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2),
32441 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32442 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32443 // (strict_fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (SQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
32444 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTPDr),
32445 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32446 GIR_RootConstrainSelectedInstOperands,
32447 // GIR_Coverage, 2422,
32448 GIR_Done,
32449 // Label 2674: @84435
32450 GIM_Try, /*On fail goto*//*Label 2675*/ GIMT_Encode4(84462), // Rule ID 11968 //
32451 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
32452 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32453 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32454 // (strict_fsqrt:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) => (VSQRTPDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src)
32455 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDZ128r),
32456 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32457 GIR_RootConstrainSelectedInstOperands,
32458 // GIR_Coverage, 11968,
32459 GIR_Done,
32460 // Label 2675: @84462
32461 GIM_Reject,
32462 // Label 2672: @84463
32463 GIM_Reject,
32464 // Label 2651: @84464
32465 GIM_Try, /*On fail goto*//*Label 2676*/ GIMT_Encode4(84554),
32466 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
32467 GIM_Try, /*On fail goto*//*Label 2677*/ GIMT_Encode4(84499), // Rule ID 2398 //
32468 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
32469 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32470 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32471 // (strict_fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (VSQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
32472 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSr),
32473 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32474 GIR_RootConstrainSelectedInstOperands,
32475 // GIR_Coverage, 2398,
32476 GIR_Done,
32477 // Label 2677: @84499
32478 GIM_Try, /*On fail goto*//*Label 2678*/ GIMT_Encode4(84526), // Rule ID 2406 //
32479 GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1),
32480 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32481 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID),
32482 // (strict_fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (SQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
32483 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SQRTPSr),
32484 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32485 GIR_RootConstrainSelectedInstOperands,
32486 // GIR_Coverage, 2406,
32487 GIR_Done,
32488 // Label 2678: @84526
32489 GIM_Try, /*On fail goto*//*Label 2679*/ GIMT_Encode4(84553), // Rule ID 11944 //
32490 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
32491 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32492 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32493 // (strict_fsqrt:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) => (VSQRTPSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src)
32494 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSZ128r),
32495 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32496 GIR_RootConstrainSelectedInstOperands,
32497 // GIR_Coverage, 11944,
32498 GIR_Done,
32499 // Label 2679: @84553
32500 GIM_Reject,
32501 // Label 2676: @84554
32502 GIM_Reject,
32503 // Label 2652: @84555
32504 GIM_Try, /*On fail goto*//*Label 2680*/ GIMT_Encode4(84618),
32505 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64,
32506 GIM_Try, /*On fail goto*//*Label 2681*/ GIMT_Encode4(84590), // Rule ID 2418 //
32507 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
32508 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32509 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32510 // (strict_fsqrt:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) => (VSQRTPDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src)
32511 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDYr),
32512 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32513 GIR_RootConstrainSelectedInstOperands,
32514 // GIR_Coverage, 2418,
32515 GIR_Done,
32516 // Label 2681: @84590
32517 GIM_Try, /*On fail goto*//*Label 2682*/ GIMT_Encode4(84617), // Rule ID 11980 //
32518 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
32519 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32520 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32521 // (strict_fsqrt:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) => (VSQRTPDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src)
32522 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDZ256r),
32523 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32524 GIR_RootConstrainSelectedInstOperands,
32525 // GIR_Coverage, 11980,
32526 GIR_Done,
32527 // Label 2682: @84617
32528 GIM_Reject,
32529 // Label 2680: @84618
32530 GIM_Reject,
32531 // Label 2653: @84619
32532 GIM_Try, /*On fail goto*//*Label 2683*/ GIMT_Encode4(84649), // Rule ID 11896 //
32533 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
32534 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
32535 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32536 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID),
32537 // (strict_fsqrt:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src) => (VSQRTPHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src)
32538 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPHZ128r),
32539 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32540 GIR_RootConstrainSelectedInstOperands,
32541 // GIR_Coverage, 11896,
32542 GIR_Done,
32543 // Label 2683: @84649
32544 GIM_Reject,
32545 // Label 2654: @84650
32546 GIM_Try, /*On fail goto*//*Label 2684*/ GIMT_Encode4(84713),
32547 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32,
32548 GIM_Try, /*On fail goto*//*Label 2685*/ GIMT_Encode4(84685), // Rule ID 2402 //
32549 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX),
32550 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32551 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID),
32552 // (strict_fsqrt:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) => (VSQRTPSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src)
32553 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSYr),
32554 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32555 GIR_RootConstrainSelectedInstOperands,
32556 // GIR_Coverage, 2402,
32557 GIR_Done,
32558 // Label 2685: @84685
32559 GIM_Try, /*On fail goto*//*Label 2686*/ GIMT_Encode4(84712), // Rule ID 11956 //
32560 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX),
32561 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32562 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32563 // (strict_fsqrt:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) => (VSQRTPSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src)
32564 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSZ256r),
32565 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32566 GIR_RootConstrainSelectedInstOperands,
32567 // GIR_Coverage, 11956,
32568 GIR_Done,
32569 // Label 2686: @84712
32570 GIM_Reject,
32571 // Label 2684: @84713
32572 GIM_Reject,
32573 // Label 2655: @84714
32574 GIM_Try, /*On fail goto*//*Label 2687*/ GIMT_Encode4(84744), // Rule ID 11932 //
32575 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
32576 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64,
32577 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32578 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32579 // (strict_fsqrt:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) => (VSQRTPDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src)
32580 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPDZr),
32581 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32582 GIR_RootConstrainSelectedInstOperands,
32583 // GIR_Coverage, 11932,
32584 GIR_Done,
32585 // Label 2687: @84744
32586 GIM_Reject,
32587 // Label 2656: @84745
32588 GIM_Try, /*On fail goto*//*Label 2688*/ GIMT_Encode4(84775), // Rule ID 11908 //
32589 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasVLX),
32590 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16,
32591 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32592 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID),
32593 // (strict_fsqrt:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src) => (VSQRTPHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src)
32594 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPHZ256r),
32595 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32596 GIR_RootConstrainSelectedInstOperands,
32597 // GIR_Coverage, 11908,
32598 GIR_Done,
32599 // Label 2688: @84775
32600 GIM_Reject,
32601 // Label 2657: @84776
32602 GIM_Try, /*On fail goto*//*Label 2689*/ GIMT_Encode4(84806), // Rule ID 11920 //
32603 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512),
32604 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32,
32605 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32606 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32607 // (strict_fsqrt:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) => (VSQRTPSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src)
32608 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPSZr),
32609 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32610 GIR_RootConstrainSelectedInstOperands,
32611 // GIR_Coverage, 11920,
32612 GIR_Done,
32613 // Label 2689: @84806
32614 GIM_Reject,
32615 // Label 2658: @84807
32616 GIM_Try, /*On fail goto*//*Label 2690*/ GIMT_Encode4(84837), // Rule ID 11884 //
32617 GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
32618 GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16,
32619 GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32620 GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID),
32621 // (strict_fsqrt:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src) => (VSQRTPHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src)
32622 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VSQRTPHZr),
32623 GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR),
32624 GIR_RootConstrainSelectedInstOperands,
32625 // GIR_Coverage, 11884,
32626 GIR_Done,
32627 // Label 2690: @84837
32628 GIM_Reject,
32629 // Label 2659: @84838
32630 GIM_Reject,
32631 // Label 63: @84839
32632 GIM_Try, /*On fail goto*//*Label 2691*/ GIMT_Encode4(84851), // Rule ID 15576 //
32633 // (trap) => (TRAP)
32634 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::TRAP),
32635 GIR_RootConstrainSelectedInstOperands,
32636 // GIR_Coverage, 15576,
32637 GIR_Done,
32638 // Label 2691: @84851
32639 GIM_Reject,
32640 // Label 64: @84852
32641 GIM_Try, /*On fail goto*//*Label 2692*/ GIMT_Encode4(84867), // Rule ID 20790 //
32642 GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotPS),
32643 // (debugtrap) => (INT3)
32644 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::INT3),
32645 GIR_RootConstrainSelectedInstOperands,
32646 // GIR_Coverage, 20790,
32647 GIR_Done,
32648 // Label 2692: @84867
32649 GIM_Try, /*On fail goto*//*Label 2693*/ GIMT_Encode4(84887), // Rule ID 20791 //
32650 GIM_CheckFeatures, GIMT_Encode2(GIFBS_IsPS),
32651 // (debugtrap) => (INT 65:{ *:[i8] })
32652 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INT),
32653 GIR_AddImm8, /*InsnID*/0, /*Imm*/65,
32654 GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
32655 GIR_RootConstrainSelectedInstOperands,
32656 // GIR_Coverage, 20791,
32657 GIR_EraseRootFromParent_Done,
32658 // Label 2693: @84887
32659 GIM_Reject,
32660 // Label 65: @84888
32661 GIM_Try, /*On fail goto*//*Label 2694*/ GIMT_Encode4(84903), // Rule ID 15578 //
32662 // MIs[0] kind
32663 GIM_CheckIsImm, /*MI*/0, /*Op*/0,
32664 // (ubsantrap (timm:{ *:[i32] }):$kind) => (UBSAN_UD1 (timm:{ *:[i32] }):$kind)
32665 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::UBSAN_UD1),
32666 GIR_RootConstrainSelectedInstOperands,
32667 // GIR_Coverage, 15578,
32668 GIR_Done,
32669 // Label 2694: @84903
32670 GIM_Reject,
32671 // Label 66: @84904
32672 GIM_Reject,
32673 }; // Size: 84905 bytes
32674 return MatchTable0;
32675}
32676#undef GIMT_Encode2
32677#undef GIMT_Encode4
32678#undef GIMT_Encode8
32679
32680#endif // ifdef GET_GLOBALISEL_IMPL
32681
32682#ifdef GET_GLOBALISEL_PREDICATES_DECL
32683PredicateBitset AvailableModuleFeatures;
32684mutable PredicateBitset AvailableFunctionFeatures;
32685PredicateBitset getAvailableFeatures() const {
32686 return AvailableModuleFeatures | AvailableFunctionFeatures;
32687}
32688PredicateBitset
32689computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const;
32690PredicateBitset
32691computeAvailableFunctionFeatures(const X86Subtarget *Subtarget,
32692 const MachineFunction *MF) const;
32693void setupGeneratedPerFunctionState(MachineFunction &MF) override;
32694#endif // ifdef GET_GLOBALISEL_PREDICATES_DECL
32695#ifdef GET_GLOBALISEL_PREDICATES_INIT
32696AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
32697AvailableFunctionFeatures()
32698#endif // ifdef GET_GLOBALISEL_PREDICATES_INIT
32699